fsl-ls1028a-qds.dtsi 2.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR X11
  2. /*
  3. * NXP ls1028AQDS device tree source
  4. *
  5. * Copyright 2019 NXP
  6. *
  7. */
  8. /dts-v1/;
  9. #include "fsl-ls1028a.dtsi"
  10. / {
  11. model = "NXP Layerscape 1028a QDS Board";
  12. compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
  13. aliases {
  14. spi0 = &fspi;
  15. };
  16. };
  17. &dspi0 {
  18. status = "okay";
  19. };
  20. &dspi1 {
  21. status = "okay";
  22. };
  23. &dspi2 {
  24. status = "okay";
  25. };
  26. &esdhc0 {
  27. status = "okay";
  28. };
  29. &esdhc1 {
  30. status = "okay";
  31. };
  32. &fspi {
  33. status = "okay";
  34. mt35xu02g0: flash@0 {
  35. #address-cells = <1>;
  36. #size-cells = <1>;
  37. compatible = "jedec,spi-nor";
  38. spi-max-frequency = <50000000>;
  39. reg = <0>;
  40. spi-rx-bus-width = <8>;
  41. spi-tx-bus-width = <1>;
  42. };
  43. };
  44. &i2c0 {
  45. status = "okay";
  46. u-boot,dm-pre-reloc;
  47. fpga@66 {
  48. #address-cells = <1>;
  49. #size-cells = <0>;
  50. compatible = "simple-mfd";
  51. reg = <0x66>;
  52. mux-mdio@54 {
  53. #address-cells = <1>;
  54. #size-cells = <0>;
  55. compatible = "mdio-mux-i2creg";
  56. reg = <0x54>;
  57. #mux-control-cells = <1>;
  58. mux-reg-masks = <0x54 0xf0>;
  59. mdio-parent-bus = <&mdio0>;
  60. /* on-board MDIO with a single RGMII PHY */
  61. mdio@00 {
  62. #address-cells = <1>;
  63. #size-cells = <0>;
  64. reg = <0x00>;
  65. qds_phy0: phy@5 {
  66. reg = <5>;
  67. };
  68. };
  69. /* slot 1 */
  70. slot1: mdio@40 {
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. reg = <0x40>;
  74. };
  75. /* slot 2 */
  76. slot2: mdio@50 {
  77. #address-cells = <1>;
  78. #size-cells = <0>;
  79. reg = <0x50>;
  80. };
  81. /* slot 3 */
  82. slot3: mdio@60 {
  83. #address-cells = <1>;
  84. #size-cells = <0>;
  85. reg = <0x60>;
  86. };
  87. /* slot 4 */
  88. slot4: mdio@70 {
  89. #address-cells = <1>;
  90. #size-cells = <0>;
  91. reg = <0x70>;
  92. };
  93. };
  94. };
  95. i2c-mux@77 {
  96. compatible = "nxp,pca9547";
  97. reg = <0x77>;
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. };
  101. };
  102. &i2c1 {
  103. status = "okay";
  104. rtc@51 {
  105. compatible = "pcf2127-rtc";
  106. reg = <0x51>;
  107. };
  108. };
  109. &i2c2 {
  110. status = "okay";
  111. };
  112. &i2c3 {
  113. status = "okay";
  114. };
  115. &i2c4 {
  116. status = "okay";
  117. };
  118. &i2c5 {
  119. status = "okay";
  120. };
  121. &i2c6 {
  122. status = "okay";
  123. };
  124. &i2c7 {
  125. status = "okay";
  126. };
  127. &lpuart0 {
  128. status = "okay";
  129. };
  130. &sata {
  131. status = "okay";
  132. };
  133. &serial0 {
  134. status = "okay";
  135. };
  136. &serial1 {
  137. status = "okay";
  138. };
  139. &usb1 {
  140. status = "okay";
  141. };
  142. &usb2 {
  143. status = "okay";
  144. };
  145. &enetc1 {
  146. status = "okay";
  147. phy-mode = "rgmii";
  148. phy-handle = <&qds_phy0>;
  149. };
  150. &mdio0 {
  151. status = "okay";
  152. };