kmtuxa1.dts 2.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * ABB PGGA TUXA1 Device Tree Source
  4. *
  5. * Copyright (C) 2020 Heiko Schocher <hs@denx.de>
  6. *
  7. */
  8. /dts-v1/;
  9. #include "km8321.dtsi"
  10. / {
  11. model = "TUXA1";
  12. compatible = "ABB,kmpbec8321";
  13. #address-cells = <1>;
  14. #size-cells = <1>;
  15. aliases {
  16. ethernet0 = &enet_piggy2;
  17. serial0 = &serial0;
  18. };
  19. };
  20. &par_io {
  21. /* UCC5 as HDLC controller for ICN */
  22. pio_ucc5: ucc_pin@04 {
  23. pio-map = <
  24. /* port pin dir open_drain assignment has_irq */
  25. 2 0 1 0 2 0 /* TxD0 */
  26. 2 8 2 0 2 0 /* RxD0 */
  27. 2 29 2 0 2 0 /* CTS */
  28. 3 30 2 0 1 0 /* ICN CLK */
  29. >;
  30. };
  31. /* UCC4 Piggy Ethernet */
  32. pio_ucc4: ucc_pin@03 {
  33. pio-map = <
  34. /* port pin dir open_drain assignment has_irq */
  35. 3 4 3 0 2 0 /* MDIO */
  36. 3 5 1 0 2 0 /* MDC */
  37. 1 18 1 0 1 0 /* TxD0 */
  38. 1 19 1 0 1 0 /* TxD1 */
  39. 1 22 2 0 1 0 /* RxD0 */
  40. 1 23 2 0 1 0 /* RxD1 */
  41. 1 26 2 0 1 0 /* RX_ER */
  42. 1 28 2 0 1 0 /* RX_DV */
  43. 1 30 1 0 1 0 /* TX_EN */
  44. 1 31 2 0 1 0 /* CRS */
  45. 3 10 2 0 3 0 /* UCC4_RMII_CLK (CLK17) */
  46. >;
  47. };
  48. pio_spi: spi_pin@01 {
  49. pio-map = <
  50. /*
  51. *port pin dir open_drain assignment has_irq
  52. * SPI_MOSI (PD0, bi, f3)
  53. */
  54. 3 0 3 0 1 0
  55. /* SPI_MISO (PD1, bi, f3) */
  56. 3 1 3 0 1 0
  57. /* SPI_CLK (PD2, bi, f3) */
  58. 3 2 3 0 1 0
  59. >;
  60. };
  61. };
  62. &localbus {
  63. ranges = <0 0 0xf0000000 0x04000000 /* LB 0 Flash (boot) */
  64. 1 0 0xe8000000 0x01000000 /* LB 1 PRIO1 and Piggy */
  65. 2 0 0xa0000000 0x10000000 /* LB 2 LPXF */
  66. 3 0 0xb0000000 0x10000000>; /* LB 3 PINC2 */
  67. flash@0,0 {
  68. compatible = "cfi-flash";
  69. reg = <0 0x00000000 0x04000000>;
  70. bank-width = <2>;
  71. #address-cells = <1>;
  72. #size-cells = <1>;
  73. partition@0 { /* 768KB */
  74. label = "u-boot";
  75. reg = <0 0xC0000>;
  76. };
  77. partition@c0000 { /* 128KB */
  78. label = "env";
  79. reg = <0xc0000 0x20000>;
  80. };
  81. partition@e0000 { /* 128KB */
  82. label = "envred";
  83. reg = <0xe0000 0x20000>;
  84. };
  85. partition@100000 { /* 64512KB */
  86. label = "ubi0";
  87. reg = <0x100000 0x3F00000>;
  88. };
  89. };
  90. };