km836x.dtsi 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * ABB PGGA km836x common ports Device Tree Source
  4. *
  5. * Copyright (C) 2020 Heiko Schocher <hs@denx.de>
  6. *
  7. */
  8. /dts-v1/;
  9. / {
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. cpus {
  13. #address-cells = <1>;
  14. #size-cells = <0>;
  15. PowerPC,8360@0 {
  16. device_type = "cpu";
  17. reg = <0x0>;
  18. d-cache-line-size = <32>; /* 32 bytes */
  19. i-cache-line-size = <32>; /* 32 bytes */
  20. d-cache-size = <32768>; /* L1, 32K */
  21. i-cache-size = <32768>; /* L1, 32K */
  22. timebase-frequency = <0>; /* Filled in by U-Boot */
  23. bus-frequency = <0>; /* Filled in by U-Boot */
  24. clock-frequency = <0>; /* Filled in by U-Boot */
  25. };
  26. };
  27. memory {
  28. device_type = "memory";
  29. reg = <0 0>; /* Filled in by U-Boot */
  30. };
  31. soc: soc8360@e0000000 {
  32. #address-cells = <1>;
  33. #size-cells = <1>;
  34. device_type = "soc";
  35. compatible = "fsl,mpc8360-immr", "simple-bus";
  36. ranges = <0x0 0xe0000000 0x00200000>;
  37. reg = <0xe0000000 0x00000200>;
  38. bus-frequency = <0>;/* Filled in by U-Boot */
  39. /* power management control module*/
  40. pmc: power@b00 {
  41. compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
  42. reg = <0xb00 0x100 0xa00 0x100>;
  43. interrupts = <80 0x8>;
  44. interrupt-parent = <&ipic>;
  45. };
  46. i2c0: i2c@3000 {
  47. #address-cells = <1>;
  48. #size-cells = <0>;
  49. cell-index = <0>;
  50. compatible = "fsl,mpc8313-i2c","fsl-i2c";
  51. reg = <0x3000 0x100>;
  52. interrupts = <14 0x8>;
  53. interrupt-parent = <&ipic>;
  54. clock-frequency = <100000>;
  55. };
  56. serial0: serial@4500 {
  57. cell-index = <0>;
  58. device_type = "serial";
  59. compatible = "fsl,ns16550", "ns16550";
  60. reg = <0x4500 0x100>;
  61. clock-frequency = <264000000>;
  62. interrupts = <9 0x8>;
  63. interrupt-parent = <&ipic>;
  64. status = "disabled";
  65. };
  66. serial1: serial@4600 {
  67. cell-index = <1>;
  68. device_type = "serial";
  69. compatible = "fsl,ns16550", "ns16550";
  70. reg = <0x4600 0x100>;
  71. clock-frequency = <133333333>;
  72. interrupts = <10 0x8>;
  73. interrupt-parent = <&ipic>;
  74. status = "disabled";
  75. };
  76. ipic: pic@700 {
  77. #address-cells = <0>;
  78. #interrupt-cells = <2>;
  79. compatible = "fsl,pq2pro-pic", "fsl,ipic";
  80. interrupt-controller;
  81. reg = <0x700 0x100>;
  82. };
  83. par_io: par_io@1400 {
  84. #address-cells = <1>;
  85. #size-cells = <1>;
  86. reg = <0x1400 0x100>;
  87. ranges;
  88. compatible = "fsl,mpc8360-par_io";
  89. device_type = "par_io";
  90. num-ports = <7>;
  91. qe_pio_c: gpio-controller@30 {
  92. #gpio-cells = <2>;
  93. compatible = "fsl,mpc8360-qe-pario-bank",
  94. "fsl,mpc8323-qe-pario-bank";
  95. reg = <0x1430 0x18>;
  96. gpio-controller;
  97. };
  98. };
  99. qe: qe@100000 {
  100. #address-cells = <1>;
  101. #size-cells = <1>;
  102. compatible = "fsl,qe";
  103. ranges = <0x0 0x100000 0x100000>;
  104. reg = <0x100000 0x480>;
  105. clock-frequency = <0>; /* Filled in by U-Boot */
  106. brg-frequency = <0>; /* Filled in by U-Boot */
  107. bus-frequency = <0>; /* Filled in by U-Boot */
  108. muram@10000 {
  109. #address-cells = <1>;
  110. #size-cells = <1>;
  111. compatible = "fsl,qe-muram", "fsl,cpm-muram";
  112. ranges = <0x0 0x00010000 0x0000c000>;
  113. data-only@0 {
  114. compatible = "fsl,qe-muram-data",
  115. "fsl,cpm-muram-data";
  116. reg = <0x0 0xc000>;
  117. };
  118. };
  119. qeic: interrupt-controller@80 {
  120. interrupt-controller;
  121. compatible = "fsl,qe-ic";
  122. #address-cells = <0>;
  123. #interrupt-cells = <1>;
  124. reg = <0x80 0x80>;
  125. big-endian;
  126. interrupts = <
  127. 32 0x8 /* ucc1 */
  128. 33 0x8 /* ucc2 */
  129. 34 0x8 /* ucc3 */
  130. 35 0x8 /* ucc4 */
  131. 40 0x8 /* ucc1 */
  132. >;
  133. interrupt-parent = <&ipic>;
  134. };
  135. spi0: spi@4c0 {
  136. cell-index = <0>;
  137. compatible = "fsl,spi";
  138. reg = <0x4c0 0x40>;
  139. interrupts = <2>;
  140. interrupt-parent = <&qeic>;
  141. mode = "qe";
  142. #address-cells = <1>;
  143. #size-cells = <0>;
  144. pio-handle = <&pio_spi>;
  145. };
  146. bootcount@0x1bff8 {
  147. device_type = "bootcount";
  148. compatible = "u-boot,bootcount";
  149. reg = <0x1bff8 0x08>;
  150. };
  151. };
  152. };
  153. localbus: localbus@e0005000 {
  154. #address-cells = <2>;
  155. #size-cells = <1>;
  156. compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
  157. "simple-bus";
  158. reg = <0xe0005000 0xd8>;
  159. };
  160. };
  161. #include "km836x-uboot.dtsi"