ptrace.h 3.4 KB

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  1. /*
  2. * include/asm-microblaze/ptrace.h -- Access to CPU registers
  3. *
  4. * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au>
  5. * Copyright (C) 2001,2002 NEC Corporation
  6. * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org>
  7. *
  8. * This file is subject to the terms and conditions of the GNU General
  9. * Public License. See the file COPYING in the main directory of this
  10. * archive for more details.
  11. *
  12. * Written by Miles Bader <miles@gnu.org>
  13. * Microblaze port by John Williams
  14. */
  15. #ifndef __MICROBLAZE_PTRACE_H__
  16. #define __MICROBLAZE_PTRACE_H__
  17. /* Microblaze general purpose registers with special meanings. */
  18. #define GPR_ZERO 0 /* constant zero */
  19. #define GPR_ASM 18 /* reserved for assembler */
  20. #define GPR_SP 1 /* stack pointer */
  21. #define GPR_GP 2 /* global data pointer */
  22. #define GPR_EP 30 /* `element pointer' */
  23. #define GPR_LP 15 /* link pointer (current return address) */
  24. /* These aren't official names, but they make some code more descriptive. */
  25. #define GPR_ARG0 5
  26. #define GPR_ARG1 6
  27. #define GPR_ARG2 7
  28. #define GPR_ARG3 8
  29. #define GPR_ARG4 9
  30. #define GPR_ARG5 10
  31. #define GPR_RVAL0 3
  32. #define GPR_RVAL1 4
  33. #define GPR_RVAL GPR_RVAL0
  34. #define NUM_GPRS 32
  35. /* `system' registers. */
  36. /* Note these are old v850 values, microblaze has many fewer */
  37. #define SR_EIPC 0
  38. #define SR_EIPSW 1
  39. #define SR_FEPC 2
  40. #define SR_FEPSW 3
  41. #define SR_ECR 4
  42. #define SR_PSW 5
  43. #define SR_CTPC 16
  44. #define SR_CTPSW 17
  45. #define SR_DBPC 18
  46. #define SR_DBPSW 19
  47. #define SR_CTBP 20
  48. #define SR_DIR 21
  49. #define SR_ASID 23
  50. #ifndef __ASSEMBLY__
  51. typedef unsigned long microblaze_reg_t;
  52. /* How processor state is stored on the stack during a syscall/signal.
  53. If you change this structure, change the associated assembly-language
  54. macros below too (PT_*)! */
  55. struct pt_regs
  56. {
  57. /* General purpose registers. */
  58. microblaze_reg_t gpr[NUM_GPRS];
  59. microblaze_reg_t pc; /* program counter */
  60. microblaze_reg_t psw; /* program status word */
  61. microblaze_reg_t kernel_mode; /* 1 if in `kernel mode', 0 if user mode */
  62. microblaze_reg_t single_step; /* 1 if in single step mode */
  63. };
  64. #define instruction_pointer(regs) ((regs)->pc)
  65. #define user_mode(regs) (!(regs)->kernel_mode)
  66. /* When a struct pt_regs is used to save user state for a system call in
  67. the kernel, the system call is stored in the space for R0 (since it's
  68. never used otherwise, R0 being a constant 0). Non-system-calls
  69. simply store 0 there. */
  70. #define PT_REGS_SYSCALL(regs) (regs)->gpr[0]
  71. #define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val))
  72. #endif /* !__ASSEMBLY__ */
  73. /* The number of bytes used to store each register. */
  74. #define _PT_REG_SIZE 4
  75. /* Offset of a general purpose register in a stuct pt_regs. */
  76. #define PT_GPR(num) ((num) * _PT_REG_SIZE)
  77. /* Offsets of various special registers & fields in a struct pt_regs. */
  78. #define NUM_SPECIAL 4
  79. #define PT_PC ((NUM_GPRS + 0) * _PT_REG_SIZE)
  80. #define PT_PSW ((NUM_GPRS + 1) * _PT_REG_SIZE)
  81. #define PT_KERNEL_MODE ((NUM_GPRS + 2) * _PT_REG_SIZE)
  82. #define PT_SINGLESTEP ((NUM_GPRS + 3) * _PT_REG_SIZE)
  83. #define PT_SYSCALL PT_GPR(0)
  84. /* Size of struct pt_regs, including alignment. */
  85. #define PT_SIZE ((NUM_GPRS + NUM_SPECIAL) * _PT_REG_SIZE)
  86. /* These are `magic' values for PTRACE_PEEKUSR that return info about where
  87. a process is located in memory. */
  88. #define PT_TEXT_ADDR (PT_SIZE + 1)
  89. #define PT_TEXT_LEN (PT_SIZE + 2)
  90. #define PT_DATA_ADDR (PT_SIZE + 3)
  91. #define PT_DATA_LEN (PT_SIZE + 4)
  92. #endif /* __MICROBLAZE_PTRACE_H__ */