relocate.S 3.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * relocate - common relocation function for ARM U-Boot
  4. *
  5. * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
  6. */
  7. #include <asm-offsets.h>
  8. #include <asm/assembler.h>
  9. #include <config.h>
  10. #include <elf.h>
  11. #include <linux/linkage.h>
  12. #ifdef CONFIG_CPU_V7M
  13. #include <asm/armv7m.h>
  14. #endif
  15. /*
  16. * Default/weak exception vectors relocation routine
  17. *
  18. * This routine covers the standard ARM cases: normal (0x00000000),
  19. * high (0xffff0000) and VBAR. SoCs which do not comply with any of
  20. * the standard cases must provide their own, strong, version.
  21. */
  22. .section .text.relocate_vectors,"ax",%progbits
  23. .weak relocate_vectors
  24. ENTRY(relocate_vectors)
  25. #ifdef CONFIG_CPU_V7M
  26. /*
  27. * On ARMv7-M we only have to write the new vector address
  28. * to VTOR register.
  29. */
  30. ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
  31. ldr r1, =V7M_SCB_BASE
  32. str r0, [r1, V7M_SCB_VTOR]
  33. #else
  34. #ifdef CONFIG_HAS_VBAR
  35. /*
  36. * If the ARM processor has the security extensions,
  37. * use VBAR to relocate the exception vectors.
  38. */
  39. ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
  40. mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */
  41. #else
  42. /*
  43. * Copy the relocated exception vectors to the
  44. * correct address
  45. * CP15 c1 V bit gives us the location of the vectors:
  46. * 0x00000000 or 0xFFFF0000.
  47. */
  48. ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
  49. mrc p15, 0, r2, c1, c0, 0 /* V bit (bit[13]) in CP15 c1 */
  50. ands r2, r2, #(1 << 13)
  51. ldreq r1, =0x00000000 /* If V=0 */
  52. ldrne r1, =0xFFFF0000 /* If V=1 */
  53. ldmia r0!, {r2-r8,r10}
  54. stmia r1!, {r2-r8,r10}
  55. ldmia r0!, {r2-r8,r10}
  56. stmia r1!, {r2-r8,r10}
  57. #endif
  58. #endif
  59. bx lr
  60. ENDPROC(relocate_vectors)
  61. /*
  62. * void relocate_code(addr_moni)
  63. *
  64. * This function relocates the monitor code.
  65. *
  66. * NOTE:
  67. * To prevent the code below from containing references with an R_ARM_ABS32
  68. * relocation record type, we never refer to linker-defined symbols directly.
  69. * Instead, we declare literals which contain their relative location with
  70. * respect to relocate_code, and at run time, add relocate_code back to them.
  71. */
  72. ENTRY(relocate_code)
  73. ldr r1, =__image_copy_start /* r1 <- SRC &__image_copy_start */
  74. subs r4, r0, r1 /* r4 <- relocation offset */
  75. beq relocate_done /* skip relocation */
  76. ldr r2, =__image_copy_end /* r2 <- SRC &__image_copy_end */
  77. copy_loop:
  78. ldmia r1!, {r10-r11} /* copy from source address [r1] */
  79. stmia r0!, {r10-r11} /* copy to target address [r0] */
  80. cmp r1, r2 /* until source end address [r2] */
  81. blo copy_loop
  82. /*
  83. * fix .rel.dyn relocations
  84. */
  85. ldr r2, =__rel_dyn_start /* r2 <- SRC &__rel_dyn_start */
  86. ldr r3, =__rel_dyn_end /* r3 <- SRC &__rel_dyn_end */
  87. fixloop:
  88. ldmia r2!, {r0-r1} /* (r0,r1) <- (SRC location,fixup) */
  89. and r1, r1, #0xff
  90. cmp r1, #R_ARM_RELATIVE
  91. bne fixnext
  92. /* relative fix: increase location by offset */
  93. add r0, r0, r4
  94. ldr r1, [r0]
  95. add r1, r1, r4
  96. str r1, [r0]
  97. fixnext:
  98. cmp r2, r3
  99. blo fixloop
  100. relocate_done:
  101. #ifdef __XSCALE__
  102. /*
  103. * On xscale, icache must be invalidated and write buffers drained,
  104. * even with cache disabled - 4.2.7 of xscale core developer's manual
  105. */
  106. mcr p15, 0, r0, c7, c7, 0 /* invalidate icache */
  107. mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
  108. #endif
  109. /* ARMv4- don't know bx lr but the assembler fails to see that */
  110. #ifdef __ARM_ARCH_4__
  111. mov pc, lr
  112. #else
  113. bx lr
  114. #endif
  115. ENDPROC(relocate_code)