stm32mp15-pinctrl.dtsi 56 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2. /*
  3. * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
  4. * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
  5. */
  6. #include <dt-bindings/pinctrl/stm32-pinfunc.h>
  7. &pinctrl {
  8. adc1_in6_pins_a: adc1-in6-0 {
  9. pins {
  10. pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
  11. };
  12. };
  13. adc12_ain_pins_a: adc12-ain-0 {
  14. pins {
  15. pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
  16. <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
  17. <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
  18. <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
  19. };
  20. };
  21. adc12_ain_pins_b: adc12-ain-1 {
  22. pins {
  23. pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
  24. <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
  25. };
  26. };
  27. adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
  28. pins {
  29. pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
  30. <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
  31. };
  32. };
  33. cec_pins_a: cec-0 {
  34. pins {
  35. pinmux = <STM32_PINMUX('A', 15, AF4)>;
  36. bias-disable;
  37. drive-open-drain;
  38. slew-rate = <0>;
  39. };
  40. };
  41. cec_sleep_pins_a: cec-sleep-0 {
  42. pins {
  43. pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
  44. };
  45. };
  46. cec_pins_b: cec-1 {
  47. pins {
  48. pinmux = <STM32_PINMUX('B', 6, AF5)>;
  49. bias-disable;
  50. drive-open-drain;
  51. slew-rate = <0>;
  52. };
  53. };
  54. cec_sleep_pins_b: cec-sleep-1 {
  55. pins {
  56. pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
  57. };
  58. };
  59. dac_ch1_pins_a: dac-ch1-0 {
  60. pins {
  61. pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
  62. };
  63. };
  64. dac_ch2_pins_a: dac-ch2-0 {
  65. pins {
  66. pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
  67. };
  68. };
  69. dcmi_pins_a: dcmi-0 {
  70. pins {
  71. pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
  72. <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
  73. <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
  74. <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
  75. <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
  76. <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
  77. <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
  78. <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
  79. <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
  80. <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
  81. <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
  82. <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
  83. <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
  84. <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
  85. <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
  86. bias-disable;
  87. };
  88. };
  89. dcmi_sleep_pins_a: dcmi-sleep-0 {
  90. pins {
  91. pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
  92. <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
  93. <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
  94. <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
  95. <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
  96. <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
  97. <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
  98. <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
  99. <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
  100. <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
  101. <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
  102. <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
  103. <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
  104. <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
  105. <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
  106. };
  107. };
  108. ethernet0_rgmii_pins_a: rgmii-0 {
  109. pins1 {
  110. pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
  111. <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
  112. <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
  113. <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
  114. <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
  115. <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
  116. <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
  117. <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
  118. bias-disable;
  119. drive-push-pull;
  120. slew-rate = <2>;
  121. };
  122. pins2 {
  123. pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
  124. bias-disable;
  125. drive-push-pull;
  126. slew-rate = <0>;
  127. };
  128. pins3 {
  129. pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
  130. <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
  131. <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
  132. <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
  133. <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
  134. <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
  135. bias-disable;
  136. };
  137. };
  138. ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
  139. pins1 {
  140. pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
  141. <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
  142. <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
  143. <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
  144. <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
  145. <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
  146. <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
  147. <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
  148. <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
  149. <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
  150. <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
  151. <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
  152. <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
  153. <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
  154. <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
  155. };
  156. };
  157. ethernet0_rgmii_pins_b: rgmii-1 {
  158. pins1 {
  159. pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
  160. <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
  161. <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
  162. <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
  163. <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
  164. <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
  165. <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
  166. <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
  167. bias-disable;
  168. drive-push-pull;
  169. slew-rate = <2>;
  170. };
  171. pins2 {
  172. pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
  173. bias-disable;
  174. drive-push-pull;
  175. slew-rate = <0>;
  176. };
  177. pins3 {
  178. pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
  179. <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
  180. <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
  181. <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
  182. <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
  183. <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
  184. bias-disable;
  185. };
  186. };
  187. ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
  188. pins1 {
  189. pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
  190. <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
  191. <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
  192. <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
  193. <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
  194. <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
  195. <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
  196. <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
  197. <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
  198. <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
  199. <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
  200. <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
  201. <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
  202. <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
  203. <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
  204. };
  205. };
  206. ethernet0_rgmii_pins_c: rgmii-2 {
  207. pins1 {
  208. pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
  209. <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
  210. <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
  211. <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
  212. <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
  213. <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
  214. <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
  215. <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
  216. bias-disable;
  217. drive-push-pull;
  218. slew-rate = <2>;
  219. };
  220. pins2 {
  221. pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
  222. bias-disable;
  223. drive-push-pull;
  224. slew-rate = <0>;
  225. };
  226. pins3 {
  227. pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
  228. <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
  229. <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
  230. <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
  231. <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
  232. <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
  233. bias-disable;
  234. };
  235. };
  236. ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
  237. pins1 {
  238. pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
  239. <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
  240. <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
  241. <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
  242. <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
  243. <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
  244. <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
  245. <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
  246. <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
  247. <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
  248. <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
  249. <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
  250. <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
  251. <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
  252. <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
  253. };
  254. };
  255. ethernet0_rmii_pins_a: rmii-0 {
  256. pins1 {
  257. pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
  258. <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
  259. <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
  260. <STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */
  261. <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
  262. <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
  263. bias-disable;
  264. drive-push-pull;
  265. slew-rate = <2>;
  266. };
  267. pins2 {
  268. pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
  269. <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
  270. <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
  271. bias-disable;
  272. };
  273. };
  274. ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
  275. pins1 {
  276. pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
  277. <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
  278. <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
  279. <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
  280. <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
  281. <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
  282. <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
  283. <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
  284. <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
  285. };
  286. };
  287. fmc_pins_a: fmc-0 {
  288. pins1 {
  289. pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
  290. <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
  291. <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
  292. <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
  293. <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
  294. <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
  295. <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
  296. <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
  297. <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
  298. <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
  299. <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
  300. <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
  301. <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
  302. bias-disable;
  303. drive-push-pull;
  304. slew-rate = <1>;
  305. };
  306. pins2 {
  307. pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
  308. bias-pull-up;
  309. };
  310. };
  311. fmc_sleep_pins_a: fmc-sleep-0 {
  312. pins {
  313. pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
  314. <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
  315. <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
  316. <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
  317. <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
  318. <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
  319. <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
  320. <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
  321. <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
  322. <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
  323. <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
  324. <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
  325. <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
  326. <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
  327. };
  328. };
  329. i2c1_pins_a: i2c1-0 {
  330. pins {
  331. pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
  332. <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
  333. bias-disable;
  334. drive-open-drain;
  335. slew-rate = <0>;
  336. };
  337. };
  338. i2c1_sleep_pins_a: i2c1-sleep-0 {
  339. pins {
  340. pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
  341. <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
  342. };
  343. };
  344. i2c1_pins_b: i2c1-1 {
  345. pins {
  346. pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
  347. <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
  348. bias-disable;
  349. drive-open-drain;
  350. slew-rate = <0>;
  351. };
  352. };
  353. i2c1_sleep_pins_b: i2c1-sleep-1 {
  354. pins {
  355. pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
  356. <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
  357. };
  358. };
  359. i2c2_pins_a: i2c2-0 {
  360. pins {
  361. pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
  362. <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
  363. bias-disable;
  364. drive-open-drain;
  365. slew-rate = <0>;
  366. };
  367. };
  368. i2c2_sleep_pins_a: i2c2-sleep-0 {
  369. pins {
  370. pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
  371. <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
  372. };
  373. };
  374. i2c2_pins_b1: i2c2-1 {
  375. pins {
  376. pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
  377. bias-disable;
  378. drive-open-drain;
  379. slew-rate = <0>;
  380. };
  381. };
  382. i2c2_sleep_pins_b1: i2c2-sleep-1 {
  383. pins {
  384. pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
  385. };
  386. };
  387. i2c2_pins_c: i2c2-2 {
  388. pins {
  389. pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
  390. <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
  391. bias-disable;
  392. drive-open-drain;
  393. slew-rate = <0>;
  394. };
  395. };
  396. i2c2_pins_sleep_c: i2c2-sleep-2 {
  397. pins {
  398. pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
  399. <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
  400. };
  401. };
  402. i2c5_pins_a: i2c5-0 {
  403. pins {
  404. pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
  405. <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
  406. bias-disable;
  407. drive-open-drain;
  408. slew-rate = <0>;
  409. };
  410. };
  411. i2c5_sleep_pins_a: i2c5-sleep-0 {
  412. pins {
  413. pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
  414. <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
  415. };
  416. };
  417. i2c5_pins_b: i2c5-1 {
  418. pins {
  419. pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
  420. <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
  421. bias-disable;
  422. drive-open-drain;
  423. slew-rate = <0>;
  424. };
  425. };
  426. i2c5_sleep_pins_b: i2c5-sleep-1 {
  427. pins {
  428. pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
  429. <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
  430. };
  431. };
  432. i2s2_pins_a: i2s2-0 {
  433. pins {
  434. pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
  435. <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
  436. <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
  437. slew-rate = <1>;
  438. drive-push-pull;
  439. bias-disable;
  440. };
  441. };
  442. i2s2_sleep_pins_a: i2s2-sleep-0 {
  443. pins {
  444. pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
  445. <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
  446. <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
  447. };
  448. };
  449. ltdc_pins_a: ltdc-0 {
  450. pins {
  451. pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
  452. <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
  453. <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
  454. <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
  455. <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
  456. <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
  457. <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
  458. <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
  459. <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
  460. <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
  461. <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
  462. <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
  463. <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
  464. <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
  465. <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
  466. <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
  467. <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
  468. <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */
  469. <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */
  470. <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */
  471. <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
  472. <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
  473. <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
  474. <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
  475. <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
  476. <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
  477. <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
  478. <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */
  479. bias-disable;
  480. drive-push-pull;
  481. slew-rate = <1>;
  482. };
  483. };
  484. ltdc_sleep_pins_a: ltdc-sleep-0 {
  485. pins {
  486. pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
  487. <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
  488. <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
  489. <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
  490. <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
  491. <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
  492. <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
  493. <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
  494. <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
  495. <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
  496. <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
  497. <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
  498. <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
  499. <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
  500. <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
  501. <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
  502. <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
  503. <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */
  504. <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */
  505. <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */
  506. <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
  507. <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
  508. <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
  509. <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
  510. <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
  511. <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
  512. <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
  513. <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */
  514. };
  515. };
  516. ltdc_pins_b: ltdc-1 {
  517. pins {
  518. pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
  519. <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
  520. <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
  521. <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
  522. <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
  523. <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
  524. <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
  525. <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
  526. <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
  527. <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
  528. <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
  529. <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
  530. <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
  531. <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
  532. <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
  533. <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
  534. <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
  535. <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
  536. <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
  537. <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
  538. <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
  539. <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
  540. <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
  541. <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
  542. <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */
  543. <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
  544. <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
  545. <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
  546. bias-disable;
  547. drive-push-pull;
  548. slew-rate = <1>;
  549. };
  550. };
  551. ltdc_sleep_pins_b: ltdc-sleep-1 {
  552. pins {
  553. pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
  554. <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
  555. <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
  556. <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
  557. <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
  558. <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */
  559. <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */
  560. <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */
  561. <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */
  562. <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */
  563. <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */
  564. <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
  565. <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
  566. <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */
  567. <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */
  568. <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
  569. <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
  570. <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */
  571. <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */
  572. <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */
  573. <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
  574. <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
  575. <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
  576. <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
  577. <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */
  578. <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */
  579. <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */
  580. <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
  581. };
  582. };
  583. ltdc_pins_c: ltdc-2 {
  584. pins1 {
  585. pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
  586. <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */
  587. <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
  588. <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */
  589. <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */
  590. <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
  591. <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
  592. <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
  593. <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
  594. <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
  595. <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */
  596. <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
  597. <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
  598. <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
  599. <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
  600. <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
  601. <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
  602. <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
  603. <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */
  604. <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
  605. <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
  606. bias-disable;
  607. drive-push-pull;
  608. slew-rate = <0>;
  609. };
  610. pins2 {
  611. pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
  612. bias-disable;
  613. drive-push-pull;
  614. slew-rate = <1>;
  615. };
  616. };
  617. ltdc_sleep_pins_c: ltdc-sleep-2 {
  618. pins1 {
  619. pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
  620. <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
  621. <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
  622. <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
  623. <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
  624. <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
  625. <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
  626. <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
  627. <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
  628. <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
  629. <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */
  630. <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
  631. <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
  632. <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
  633. <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
  634. <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
  635. <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
  636. <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
  637. <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
  638. <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
  639. <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
  640. <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
  641. };
  642. };
  643. ltdc_pins_d: ltdc-3 {
  644. pins1 {
  645. pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
  646. bias-disable;
  647. drive-push-pull;
  648. slew-rate = <3>;
  649. };
  650. pins2 {
  651. pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
  652. <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
  653. <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
  654. <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
  655. <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
  656. <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
  657. <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
  658. <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
  659. <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
  660. <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
  661. <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
  662. <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
  663. <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */
  664. <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
  665. <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
  666. <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
  667. <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */
  668. <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
  669. <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */
  670. <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
  671. <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
  672. <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
  673. <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
  674. <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
  675. <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
  676. <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
  677. <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
  678. bias-disable;
  679. drive-push-pull;
  680. slew-rate = <2>;
  681. };
  682. };
  683. ltdc_sleep_pins_d: ltdc-sleep-3 {
  684. pins {
  685. pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
  686. <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
  687. <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
  688. <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
  689. <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
  690. <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
  691. <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
  692. <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
  693. <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */
  694. <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
  695. <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
  696. <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
  697. <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
  698. <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */
  699. <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
  700. <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
  701. <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
  702. <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */
  703. <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
  704. <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */
  705. <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
  706. <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
  707. <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
  708. <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
  709. <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
  710. <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
  711. <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
  712. <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
  713. };
  714. };
  715. m_can1_pins_a: m-can1-0 {
  716. pins1 {
  717. pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
  718. slew-rate = <1>;
  719. drive-push-pull;
  720. bias-disable;
  721. };
  722. pins2 {
  723. pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
  724. bias-disable;
  725. };
  726. };
  727. m_can1_sleep_pins_a: m_can1-sleep-0 {
  728. pins {
  729. pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
  730. <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
  731. };
  732. };
  733. m_can1_pins_b: m-can1-1 {
  734. pins1 {
  735. pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
  736. slew-rate = <1>;
  737. drive-push-pull;
  738. bias-disable;
  739. };
  740. pins2 {
  741. pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
  742. bias-disable;
  743. };
  744. };
  745. m_can1_sleep_pins_b: m_can1-sleep-1 {
  746. pins {
  747. pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
  748. <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
  749. };
  750. };
  751. m_can2_pins_a: m-can2-0 {
  752. pins1 {
  753. pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
  754. slew-rate = <1>;
  755. drive-push-pull;
  756. bias-disable;
  757. };
  758. pins2 {
  759. pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
  760. bias-disable;
  761. };
  762. };
  763. m_can2_sleep_pins_a: m_can2-sleep-0 {
  764. pins {
  765. pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
  766. <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
  767. };
  768. };
  769. pwm1_pins_a: pwm1-0 {
  770. pins {
  771. pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
  772. <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
  773. <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
  774. bias-pull-down;
  775. drive-push-pull;
  776. slew-rate = <0>;
  777. };
  778. };
  779. pwm1_sleep_pins_a: pwm1-sleep-0 {
  780. pins {
  781. pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
  782. <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
  783. <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
  784. };
  785. };
  786. pwm2_pins_a: pwm2-0 {
  787. pins {
  788. pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
  789. bias-pull-down;
  790. drive-push-pull;
  791. slew-rate = <0>;
  792. };
  793. };
  794. pwm2_sleep_pins_a: pwm2-sleep-0 {
  795. pins {
  796. pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
  797. };
  798. };
  799. pwm3_pins_a: pwm3-0 {
  800. pins {
  801. pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
  802. bias-pull-down;
  803. drive-push-pull;
  804. slew-rate = <0>;
  805. };
  806. };
  807. pwm3_sleep_pins_a: pwm3-sleep-0 {
  808. pins {
  809. pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
  810. };
  811. };
  812. pwm3_pins_b: pwm3-1 {
  813. pins {
  814. pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
  815. bias-disable;
  816. drive-push-pull;
  817. slew-rate = <0>;
  818. };
  819. };
  820. pwm3_sleep_pins_b: pwm3-sleep-1 {
  821. pins {
  822. pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
  823. };
  824. };
  825. pwm4_pins_a: pwm4-0 {
  826. pins {
  827. pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
  828. <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
  829. bias-pull-down;
  830. drive-push-pull;
  831. slew-rate = <0>;
  832. };
  833. };
  834. pwm4_sleep_pins_a: pwm4-sleep-0 {
  835. pins {
  836. pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
  837. <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
  838. };
  839. };
  840. pwm4_pins_b: pwm4-1 {
  841. pins {
  842. pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
  843. bias-pull-down;
  844. drive-push-pull;
  845. slew-rate = <0>;
  846. };
  847. };
  848. pwm4_sleep_pins_b: pwm4-sleep-1 {
  849. pins {
  850. pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
  851. };
  852. };
  853. pwm5_pins_a: pwm5-0 {
  854. pins {
  855. pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
  856. bias-pull-down;
  857. drive-push-pull;
  858. slew-rate = <0>;
  859. };
  860. };
  861. pwm5_sleep_pins_a: pwm5-sleep-0 {
  862. pins {
  863. pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
  864. };
  865. };
  866. pwm5_pins_b: pwm5-1 {
  867. pins {
  868. pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
  869. <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
  870. <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
  871. bias-disable;
  872. drive-push-pull;
  873. slew-rate = <0>;
  874. };
  875. };
  876. pwm5_sleep_pins_b: pwm5-sleep-1 {
  877. pins {
  878. pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
  879. <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
  880. <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
  881. };
  882. };
  883. pwm8_pins_a: pwm8-0 {
  884. pins {
  885. pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
  886. bias-pull-down;
  887. drive-push-pull;
  888. slew-rate = <0>;
  889. };
  890. };
  891. pwm8_sleep_pins_a: pwm8-sleep-0 {
  892. pins {
  893. pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
  894. };
  895. };
  896. pwm12_pins_a: pwm12-0 {
  897. pins {
  898. pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
  899. bias-pull-down;
  900. drive-push-pull;
  901. slew-rate = <0>;
  902. };
  903. };
  904. pwm12_sleep_pins_a: pwm12-sleep-0 {
  905. pins {
  906. pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
  907. };
  908. };
  909. qspi_clk_pins_a: qspi-clk-0 {
  910. pins {
  911. pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
  912. bias-disable;
  913. drive-push-pull;
  914. slew-rate = <3>;
  915. };
  916. };
  917. qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
  918. pins {
  919. pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
  920. };
  921. };
  922. qspi_bk1_pins_a: qspi-bk1-0 {
  923. pins1 {
  924. pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
  925. <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
  926. <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
  927. <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
  928. bias-disable;
  929. drive-push-pull;
  930. slew-rate = <1>;
  931. };
  932. pins2 {
  933. pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
  934. bias-pull-up;
  935. drive-push-pull;
  936. slew-rate = <1>;
  937. };
  938. };
  939. qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
  940. pins {
  941. pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
  942. <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
  943. <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
  944. <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
  945. <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
  946. };
  947. };
  948. qspi_bk2_pins_a: qspi-bk2-0 {
  949. pins1 {
  950. pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
  951. <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
  952. <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
  953. <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
  954. bias-disable;
  955. drive-push-pull;
  956. slew-rate = <1>;
  957. };
  958. pins2 {
  959. pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
  960. bias-pull-up;
  961. drive-push-pull;
  962. slew-rate = <1>;
  963. };
  964. };
  965. qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
  966. pins {
  967. pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
  968. <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
  969. <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
  970. <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
  971. <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
  972. };
  973. };
  974. sai2a_pins_a: sai2a-0 {
  975. pins {
  976. pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
  977. <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
  978. <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
  979. <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
  980. slew-rate = <0>;
  981. drive-push-pull;
  982. bias-disable;
  983. };
  984. };
  985. sai2a_sleep_pins_a: sai2a-sleep-0 {
  986. pins {
  987. pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
  988. <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
  989. <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
  990. <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
  991. };
  992. };
  993. sai2a_pins_b: sai2a-1 {
  994. pins1 {
  995. pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
  996. <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
  997. <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
  998. slew-rate = <0>;
  999. drive-push-pull;
  1000. bias-disable;
  1001. };
  1002. };
  1003. sai2a_sleep_pins_b: sai2a-sleep-1 {
  1004. pins {
  1005. pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
  1006. <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
  1007. <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
  1008. };
  1009. };
  1010. sai2a_pins_c: sai2a-4 {
  1011. pins {
  1012. pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
  1013. <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
  1014. <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
  1015. slew-rate = <0>;
  1016. drive-push-pull;
  1017. bias-disable;
  1018. };
  1019. };
  1020. sai2a_sleep_pins_c: sai2a-5 {
  1021. pins {
  1022. pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
  1023. <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
  1024. <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
  1025. };
  1026. };
  1027. sai2b_pins_a: sai2b-0 {
  1028. pins1 {
  1029. pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
  1030. <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
  1031. <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
  1032. slew-rate = <0>;
  1033. drive-push-pull;
  1034. bias-disable;
  1035. };
  1036. pins2 {
  1037. pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
  1038. bias-disable;
  1039. };
  1040. };
  1041. sai2b_sleep_pins_a: sai2b-sleep-0 {
  1042. pins {
  1043. pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
  1044. <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
  1045. <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
  1046. <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
  1047. };
  1048. };
  1049. sai2b_pins_b: sai2b-1 {
  1050. pins {
  1051. pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
  1052. bias-disable;
  1053. };
  1054. };
  1055. sai2b_sleep_pins_b: sai2b-sleep-1 {
  1056. pins {
  1057. pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
  1058. };
  1059. };
  1060. sai2b_pins_c: sai2a-4 {
  1061. pins1 {
  1062. pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
  1063. bias-disable;
  1064. };
  1065. };
  1066. sai2b_sleep_pins_c: sai2a-sleep-5 {
  1067. pins {
  1068. pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
  1069. };
  1070. };
  1071. sai4a_pins_a: sai4a-0 {
  1072. pins {
  1073. pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
  1074. slew-rate = <0>;
  1075. drive-push-pull;
  1076. bias-disable;
  1077. };
  1078. };
  1079. sai4a_sleep_pins_a: sai4a-sleep-0 {
  1080. pins {
  1081. pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
  1082. };
  1083. };
  1084. sdmmc1_b4_pins_a: sdmmc1-b4-0 {
  1085. pins1 {
  1086. pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  1087. <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  1088. <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  1089. <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
  1090. <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  1091. slew-rate = <1>;
  1092. drive-push-pull;
  1093. bias-disable;
  1094. };
  1095. pins2 {
  1096. pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
  1097. slew-rate = <2>;
  1098. drive-push-pull;
  1099. bias-disable;
  1100. };
  1101. };
  1102. sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
  1103. pins1 {
  1104. pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  1105. <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  1106. <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  1107. <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
  1108. slew-rate = <1>;
  1109. drive-push-pull;
  1110. bias-disable;
  1111. };
  1112. pins2 {
  1113. pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
  1114. slew-rate = <2>;
  1115. drive-push-pull;
  1116. bias-disable;
  1117. };
  1118. pins3 {
  1119. pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  1120. slew-rate = <1>;
  1121. drive-open-drain;
  1122. bias-disable;
  1123. };
  1124. };
  1125. sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
  1126. pins {
  1127. pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
  1128. <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
  1129. <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
  1130. <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
  1131. <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
  1132. <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
  1133. };
  1134. };
  1135. sdmmc1_dir_pins_a: sdmmc1-dir-0 {
  1136. pins1 {
  1137. pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
  1138. <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
  1139. <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
  1140. slew-rate = <1>;
  1141. drive-push-pull;
  1142. bias-pull-up;
  1143. };
  1144. pins2{
  1145. pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
  1146. bias-pull-up;
  1147. };
  1148. };
  1149. sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
  1150. pins {
  1151. pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
  1152. <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
  1153. <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
  1154. <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
  1155. };
  1156. };
  1157. sdmmc1_dir_pins_b: sdmmc1-dir-1 {
  1158. pins1 {
  1159. pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
  1160. <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
  1161. <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
  1162. slew-rate = <1>;
  1163. drive-push-pull;
  1164. bias-pull-up;
  1165. };
  1166. pins2{
  1167. pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
  1168. bias-pull-up;
  1169. };
  1170. };
  1171. sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
  1172. pins {
  1173. pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
  1174. <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
  1175. <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
  1176. <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
  1177. };
  1178. };
  1179. sdmmc2_b4_pins_a: sdmmc2-b4-0 {
  1180. pins1 {
  1181. pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
  1182. <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
  1183. <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
  1184. <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
  1185. <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
  1186. slew-rate = <1>;
  1187. drive-push-pull;
  1188. bias-pull-up;
  1189. };
  1190. pins2 {
  1191. pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
  1192. slew-rate = <2>;
  1193. drive-push-pull;
  1194. bias-pull-up;
  1195. };
  1196. };
  1197. sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
  1198. pins1 {
  1199. pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
  1200. <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
  1201. <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
  1202. <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
  1203. slew-rate = <1>;
  1204. drive-push-pull;
  1205. bias-pull-up;
  1206. };
  1207. pins2 {
  1208. pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
  1209. slew-rate = <2>;
  1210. drive-push-pull;
  1211. bias-pull-up;
  1212. };
  1213. pins3 {
  1214. pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
  1215. slew-rate = <1>;
  1216. drive-open-drain;
  1217. bias-pull-up;
  1218. };
  1219. };
  1220. sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
  1221. pins {
  1222. pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
  1223. <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
  1224. <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
  1225. <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
  1226. <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
  1227. <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
  1228. };
  1229. };
  1230. sdmmc2_b4_pins_b: sdmmc2-b4-1 {
  1231. pins1 {
  1232. pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
  1233. <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
  1234. <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
  1235. <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
  1236. <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
  1237. slew-rate = <1>;
  1238. drive-push-pull;
  1239. bias-disable;
  1240. };
  1241. pins2 {
  1242. pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
  1243. slew-rate = <2>;
  1244. drive-push-pull;
  1245. bias-disable;
  1246. };
  1247. };
  1248. sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
  1249. pins1 {
  1250. pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
  1251. <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
  1252. <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
  1253. <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
  1254. slew-rate = <1>;
  1255. drive-push-pull;
  1256. bias-disable;
  1257. };
  1258. pins2 {
  1259. pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
  1260. slew-rate = <2>;
  1261. drive-push-pull;
  1262. bias-disable;
  1263. };
  1264. pins3 {
  1265. pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
  1266. slew-rate = <1>;
  1267. drive-open-drain;
  1268. bias-disable;
  1269. };
  1270. };
  1271. sdmmc2_d47_pins_a: sdmmc2-d47-0 {
  1272. pins {
  1273. pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
  1274. <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
  1275. <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
  1276. <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
  1277. slew-rate = <1>;
  1278. drive-push-pull;
  1279. bias-pull-up;
  1280. };
  1281. };
  1282. sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
  1283. pins {
  1284. pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
  1285. <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
  1286. <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
  1287. <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
  1288. };
  1289. };
  1290. sdmmc2_d47_pins_b: sdmmc2-d47-1 {
  1291. pins {
  1292. pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
  1293. <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
  1294. <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
  1295. <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
  1296. slew-rate = <1>;
  1297. drive-push-pull;
  1298. bias-disable;
  1299. };
  1300. };
  1301. sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
  1302. pins {
  1303. pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
  1304. <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
  1305. <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
  1306. <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
  1307. };
  1308. };
  1309. sdmmc2_d47_pins_c: sdmmc2-d47-2 {
  1310. pins {
  1311. pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
  1312. <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
  1313. <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
  1314. <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
  1315. slew-rate = <1>;
  1316. drive-push-pull;
  1317. bias-pull-up;
  1318. };
  1319. };
  1320. sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
  1321. pins {
  1322. pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
  1323. <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
  1324. <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
  1325. <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
  1326. };
  1327. };
  1328. sdmmc3_b4_pins_a: sdmmc3-b4-0 {
  1329. pins1 {
  1330. pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
  1331. <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
  1332. <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
  1333. <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
  1334. <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
  1335. slew-rate = <1>;
  1336. drive-push-pull;
  1337. bias-pull-up;
  1338. };
  1339. pins2 {
  1340. pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
  1341. slew-rate = <2>;
  1342. drive-push-pull;
  1343. bias-pull-up;
  1344. };
  1345. };
  1346. sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
  1347. pins1 {
  1348. pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
  1349. <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
  1350. <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
  1351. <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
  1352. slew-rate = <1>;
  1353. drive-push-pull;
  1354. bias-pull-up;
  1355. };
  1356. pins2 {
  1357. pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
  1358. slew-rate = <2>;
  1359. drive-push-pull;
  1360. bias-pull-up;
  1361. };
  1362. pins3 {
  1363. pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
  1364. slew-rate = <1>;
  1365. drive-open-drain;
  1366. bias-pull-up;
  1367. };
  1368. };
  1369. sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
  1370. pins {
  1371. pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
  1372. <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
  1373. <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
  1374. <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
  1375. <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
  1376. <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
  1377. };
  1378. };
  1379. sdmmc3_b4_pins_b: sdmmc3-b4-1 {
  1380. pins1 {
  1381. pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
  1382. <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
  1383. <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
  1384. <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
  1385. <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
  1386. slew-rate = <1>;
  1387. drive-push-pull;
  1388. bias-pull-up;
  1389. };
  1390. pins2 {
  1391. pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
  1392. slew-rate = <2>;
  1393. drive-push-pull;
  1394. bias-pull-up;
  1395. };
  1396. };
  1397. sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
  1398. pins1 {
  1399. pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
  1400. <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
  1401. <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
  1402. <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
  1403. slew-rate = <1>;
  1404. drive-push-pull;
  1405. bias-pull-up;
  1406. };
  1407. pins2 {
  1408. pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
  1409. slew-rate = <2>;
  1410. drive-push-pull;
  1411. bias-pull-up;
  1412. };
  1413. pins3 {
  1414. pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
  1415. slew-rate = <1>;
  1416. drive-open-drain;
  1417. bias-pull-up;
  1418. };
  1419. };
  1420. sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
  1421. pins {
  1422. pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
  1423. <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
  1424. <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
  1425. <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
  1426. <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
  1427. <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
  1428. };
  1429. };
  1430. spdifrx_pins_a: spdifrx-0 {
  1431. pins {
  1432. pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
  1433. bias-disable;
  1434. };
  1435. };
  1436. spdifrx_sleep_pins_a: spdifrx-sleep-0 {
  1437. pins {
  1438. pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
  1439. };
  1440. };
  1441. spi2_pins_a: spi2-0 {
  1442. pins1 {
  1443. pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI1_SCK */
  1444. <STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */
  1445. bias-disable;
  1446. drive-push-pull;
  1447. slew-rate = <1>;
  1448. };
  1449. pins2 {
  1450. pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
  1451. bias-disable;
  1452. };
  1453. };
  1454. spi4_pins_a: spi4-0 {
  1455. pins {
  1456. pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
  1457. <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
  1458. bias-disable;
  1459. drive-push-pull;
  1460. slew-rate = <1>;
  1461. };
  1462. pins2 {
  1463. pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
  1464. bias-disable;
  1465. };
  1466. };
  1467. stusb1600_pins_a: stusb1600-0 {
  1468. pins {
  1469. pinmux = <STM32_PINMUX('I', 11, ANALOG)>;
  1470. bias-pull-up;
  1471. };
  1472. };
  1473. uart4_pins_a: uart4-0 {
  1474. pins1 {
  1475. pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
  1476. bias-disable;
  1477. drive-push-pull;
  1478. slew-rate = <0>;
  1479. };
  1480. pins2 {
  1481. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  1482. bias-disable;
  1483. };
  1484. };
  1485. uart4_idle_pins_a: uart4-idle-0 {
  1486. pins1 {
  1487. pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
  1488. };
  1489. pins2 {
  1490. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  1491. bias-disable;
  1492. };
  1493. };
  1494. uart4_sleep_pins_a: uart4-sleep-0 {
  1495. pins {
  1496. pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
  1497. <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
  1498. };
  1499. };
  1500. uart4_pins_b: uart4-1 {
  1501. pins1 {
  1502. pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
  1503. bias-disable;
  1504. drive-push-pull;
  1505. slew-rate = <0>;
  1506. };
  1507. pins2 {
  1508. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  1509. bias-disable;
  1510. };
  1511. };
  1512. uart4_pins_c: uart4-2 {
  1513. pins1 {
  1514. pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
  1515. bias-disable;
  1516. drive-push-pull;
  1517. slew-rate = <0>;
  1518. };
  1519. pins2 {
  1520. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  1521. bias-disable;
  1522. };
  1523. };
  1524. uart7_pins_a: uart7-0 {
  1525. pins1 {
  1526. pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
  1527. bias-disable;
  1528. drive-push-pull;
  1529. slew-rate = <0>;
  1530. };
  1531. pins2 {
  1532. pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
  1533. <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
  1534. <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
  1535. bias-disable;
  1536. };
  1537. };
  1538. uart7_pins_b: uart7-1 {
  1539. pins1 {
  1540. pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
  1541. bias-disable;
  1542. drive-push-pull;
  1543. slew-rate = <0>;
  1544. };
  1545. pins2 {
  1546. pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
  1547. bias-disable;
  1548. };
  1549. };
  1550. uart7_pins_c: uart7-2 {
  1551. pins1 {
  1552. pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
  1553. bias-disable;
  1554. drive-push-pull;
  1555. slew-rate = <0>;
  1556. };
  1557. pins2 {
  1558. pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
  1559. bias-disable;
  1560. };
  1561. };
  1562. uart7_idle_pins_c: uart7-idle-2 {
  1563. pins1 {
  1564. pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
  1565. };
  1566. pins2 {
  1567. pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
  1568. bias-disable;
  1569. };
  1570. };
  1571. uart7_sleep_pins_c: uart7-sleep-2 {
  1572. pins {
  1573. pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
  1574. <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */
  1575. };
  1576. };
  1577. uart8_pins_a: uart8-0 {
  1578. pins1 {
  1579. pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
  1580. bias-disable;
  1581. drive-push-pull;
  1582. slew-rate = <0>;
  1583. };
  1584. pins2 {
  1585. pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
  1586. bias-disable;
  1587. };
  1588. };
  1589. usart2_pins_a: usart2-0 {
  1590. pins1 {
  1591. pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
  1592. <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
  1593. bias-disable;
  1594. drive-push-pull;
  1595. slew-rate = <0>;
  1596. };
  1597. pins2 {
  1598. pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
  1599. <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
  1600. bias-disable;
  1601. };
  1602. };
  1603. usart2_sleep_pins_a: usart2-sleep-0 {
  1604. pins {
  1605. pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
  1606. <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
  1607. <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
  1608. <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
  1609. };
  1610. };
  1611. usart2_pins_b: usart2-1 {
  1612. pins1 {
  1613. pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
  1614. <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
  1615. bias-disable;
  1616. drive-push-pull;
  1617. slew-rate = <0>;
  1618. };
  1619. pins2 {
  1620. pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
  1621. <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
  1622. bias-disable;
  1623. };
  1624. };
  1625. usart2_sleep_pins_b: usart2-sleep-1 {
  1626. pins {
  1627. pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
  1628. <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
  1629. <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
  1630. <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
  1631. };
  1632. };
  1633. usart2_pins_c: usart2-2 {
  1634. pins1 {
  1635. pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
  1636. <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
  1637. bias-disable;
  1638. drive-push-pull;
  1639. slew-rate = <3>;
  1640. };
  1641. pins2 {
  1642. pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
  1643. <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
  1644. bias-disable;
  1645. };
  1646. };
  1647. usart2_idle_pins_c: usart2-idle-2 {
  1648. pins1 {
  1649. pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
  1650. <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
  1651. <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
  1652. };
  1653. pins2 {
  1654. pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
  1655. bias-disable;
  1656. };
  1657. };
  1658. usart2_sleep_pins_c: usart2-sleep-2 {
  1659. pins {
  1660. pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
  1661. <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
  1662. <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
  1663. <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
  1664. };
  1665. };
  1666. usart3_pins_a: usart3-0 {
  1667. pins1 {
  1668. pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
  1669. bias-disable;
  1670. drive-push-pull;
  1671. slew-rate = <0>;
  1672. };
  1673. pins2 {
  1674. pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
  1675. bias-disable;
  1676. };
  1677. };
  1678. usart3_pins_b: usart3-1 {
  1679. pins1 {
  1680. pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
  1681. <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
  1682. bias-disable;
  1683. drive-push-pull;
  1684. slew-rate = <0>;
  1685. };
  1686. pins2 {
  1687. pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
  1688. <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
  1689. bias-disable;
  1690. };
  1691. };
  1692. usart3_idle_pins_b: usart3-idle-1 {
  1693. pins1 {
  1694. pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
  1695. <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
  1696. <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
  1697. };
  1698. pins2 {
  1699. pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
  1700. bias-disable;
  1701. };
  1702. };
  1703. usart3_sleep_pins_b: usart3-sleep-1 {
  1704. pins {
  1705. pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
  1706. <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
  1707. <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */
  1708. <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
  1709. };
  1710. };
  1711. usart3_pins_c: usart3-2 {
  1712. pins1 {
  1713. pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
  1714. <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
  1715. bias-disable;
  1716. drive-push-pull;
  1717. slew-rate = <0>;
  1718. };
  1719. pins2 {
  1720. pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
  1721. <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
  1722. bias-disable;
  1723. };
  1724. };
  1725. usart3_idle_pins_c: usart3-idle-2 {
  1726. pins1 {
  1727. pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
  1728. <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
  1729. <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
  1730. };
  1731. pins2 {
  1732. pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
  1733. bias-disable;
  1734. };
  1735. };
  1736. usart3_sleep_pins_c: usart3-sleep-2 {
  1737. pins {
  1738. pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
  1739. <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
  1740. <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */
  1741. <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
  1742. };
  1743. };
  1744. uart4_pins_a: uart4-0 {
  1745. pins1 {
  1746. pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
  1747. bias-disable;
  1748. drive-push-pull;
  1749. slew-rate = <0>;
  1750. };
  1751. pins2 {
  1752. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  1753. bias-disable;
  1754. };
  1755. };
  1756. uart4_pins_b: uart4-1 {
  1757. pins1 {
  1758. pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
  1759. bias-disable;
  1760. drive-push-pull;
  1761. slew-rate = <0>;
  1762. };
  1763. pins2 {
  1764. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  1765. bias-disable;
  1766. };
  1767. };
  1768. uart4_pins_c: uart4-2 {
  1769. pins1 {
  1770. pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
  1771. bias-disable;
  1772. drive-push-pull;
  1773. slew-rate = <0>;
  1774. };
  1775. pins2 {
  1776. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  1777. bias-disable;
  1778. };
  1779. };
  1780. uart7_pins_a: uart7-0 {
  1781. pins1 {
  1782. pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
  1783. bias-disable;
  1784. drive-push-pull;
  1785. slew-rate = <0>;
  1786. };
  1787. pins2 {
  1788. pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
  1789. <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
  1790. <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
  1791. bias-disable;
  1792. };
  1793. };
  1794. uart7_pins_b: uart7-1 {
  1795. pins1 {
  1796. pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
  1797. bias-disable;
  1798. drive-push-pull;
  1799. slew-rate = <0>;
  1800. };
  1801. pins2 {
  1802. pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
  1803. bias-disable;
  1804. };
  1805. };
  1806. uart8_pins_a: uart8-0 {
  1807. pins1 {
  1808. pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
  1809. bias-disable;
  1810. drive-push-pull;
  1811. slew-rate = <0>;
  1812. };
  1813. pins2 {
  1814. pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
  1815. bias-disable;
  1816. };
  1817. };
  1818. usbotg_hs_pins_a: usbotg-hs-0 {
  1819. pins {
  1820. pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
  1821. };
  1822. };
  1823. usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
  1824. pins {
  1825. pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
  1826. <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
  1827. };
  1828. };
  1829. };
  1830. &pinctrl_z {
  1831. i2c2_pins_b2: i2c2-0 {
  1832. pins {
  1833. pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
  1834. bias-disable;
  1835. drive-open-drain;
  1836. slew-rate = <0>;
  1837. };
  1838. };
  1839. i2c2_sleep_pins_b2: i2c2-sleep-0 {
  1840. pins {
  1841. pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
  1842. };
  1843. };
  1844. i2c4_pins_a: i2c4-0 {
  1845. pins {
  1846. pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
  1847. <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
  1848. bias-disable;
  1849. drive-open-drain;
  1850. slew-rate = <0>;
  1851. };
  1852. };
  1853. i2c4_sleep_pins_a: i2c4-sleep-0 {
  1854. pins {
  1855. pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
  1856. <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
  1857. };
  1858. };
  1859. spi1_pins_a: spi1-0 {
  1860. pins1 {
  1861. pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
  1862. <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
  1863. bias-disable;
  1864. drive-push-pull;
  1865. slew-rate = <1>;
  1866. };
  1867. pins2 {
  1868. pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
  1869. bias-disable;
  1870. };
  1871. };
  1872. };