Kconfig 47 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. select INIT_SP_RELATIVE
  13. help
  14. U-Boot expects to be linked to a specific hard-coded address, and to
  15. be loaded to and run from that address. This option lifts that
  16. restriction, thus allowing the code to be loaded to and executed from
  17. almost any 4K aligned address. This logic relies on the relocation
  18. information that is embedded in the binary to support U-Boot
  19. relocating itself to the top-of-RAM later during execution.
  20. config INIT_SP_RELATIVE
  21. bool "Specify the early stack pointer relative to the .bss section"
  22. help
  23. U-Boot typically uses a hard-coded value for the stack pointer
  24. before relocation. Enable this option to instead calculate the
  25. initial SP at run-time. This is useful to avoid hard-coding addresses
  26. into U-Boot, so that it can be loaded and executed at arbitrary
  27. addresses and thus avoid using arbitrary addresses at runtime.
  28. If this option is enabled, the early stack pointer is set to
  29. &_bss_start with a offset value added. The offset is specified by
  30. SYS_INIT_SP_BSS_OFFSET.
  31. config SYS_INIT_SP_BSS_OFFSET
  32. int "Early stack offset from the .bss base address"
  33. depends on INIT_SP_RELATIVE
  34. default 524288
  35. help
  36. This option's value is the offset added to &_bss_start in order to
  37. calculate the stack pointer. This offset should be large enough so
  38. that the early malloc region, global data (gd), and early stack usage
  39. do not overlap any appended DTB.
  40. config LINUX_KERNEL_IMAGE_HEADER
  41. bool
  42. help
  43. Place a Linux kernel image header at the start of the U-Boot binary.
  44. The format of the header is described in the Linux kernel source at
  45. Documentation/arm64/booting.txt. This feature is useful since the
  46. image header reports the amount of memory (BSS and similar) that
  47. U-Boot needs to use, but which isn't part of the binary.
  48. if LINUX_KERNEL_IMAGE_HEADER
  49. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  50. hex
  51. help
  52. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  53. TEXT_OFFSET value written to the Linux kernel image header.
  54. endif
  55. endif
  56. config GIC_V3_ITS
  57. bool "ARM GICV3 ITS"
  58. select REGMAP
  59. select SYSCON
  60. help
  61. ARM GICV3 Interrupt translation service (ITS).
  62. Basic support for programming locality specific peripheral
  63. interrupts (LPI) configuration tables and enable LPI tables.
  64. LPI configuration table can be used by u-boot or Linux.
  65. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  66. configuration table can not be re-programmed, unless GICV3 reset.
  67. config STATIC_RELA
  68. bool
  69. default y if ARM64 && !POSITION_INDEPENDENT
  70. config DMA_ADDR_T_64BIT
  71. bool
  72. default y if ARM64
  73. config HAS_VBAR
  74. bool
  75. config HAS_THUMB2
  76. bool
  77. # Used for compatibility with asm files copied from the kernel
  78. config ARM_ASM_UNIFIED
  79. bool
  80. default y
  81. # Used for compatibility with asm files copied from the kernel
  82. config THUMB2_KERNEL
  83. bool
  84. config SYS_ICACHE_OFF
  85. bool "Do not enable icache"
  86. default n
  87. help
  88. Do not enable instruction cache in U-Boot.
  89. config SPL_SYS_ICACHE_OFF
  90. bool "Do not enable icache in SPL"
  91. depends on SPL
  92. default SYS_ICACHE_OFF
  93. help
  94. Do not enable instruction cache in SPL.
  95. config SYS_DCACHE_OFF
  96. bool "Do not enable dcache"
  97. default n
  98. help
  99. Do not enable data cache in U-Boot.
  100. config SPL_SYS_DCACHE_OFF
  101. bool "Do not enable dcache in SPL"
  102. depends on SPL
  103. default SYS_DCACHE_OFF
  104. help
  105. Do not enable data cache in SPL.
  106. config SYS_ARM_CACHE_CP15
  107. bool "CP15 based cache enabling support"
  108. help
  109. Select this if your processor suports enabling caches by using
  110. CP15 registers.
  111. config SYS_ARM_MMU
  112. bool "MMU-based Paged Memory Management Support"
  113. select SYS_ARM_CACHE_CP15
  114. help
  115. Select if you want MMU-based virtualised addressing space
  116. support via paged memory management.
  117. config SYS_ARM_MPU
  118. bool 'Use the ARM v7 PMSA Compliant MPU'
  119. help
  120. Some ARM systems without an MMU have instead a Memory Protection
  121. Unit (MPU) that defines the type and permissions for regions of
  122. memory.
  123. If your CPU has an MPU then you should choose 'y' here unless you
  124. know that you do not want to use the MPU.
  125. # If set, the workarounds for these ARM errata are applied early during U-Boot
  126. # startup. Note that in general these options force the workarounds to be
  127. # applied; no CPU-type/version detection exists, unlike the similar options in
  128. # the Linux kernel. Do not set these options unless they apply! Also note that
  129. # the following can be machine-specific errata. These do have ability to
  130. # provide rudimentary version and machine-specific checks, but expect no
  131. # product checks:
  132. # CONFIG_ARM_ERRATA_430973
  133. # CONFIG_ARM_ERRATA_454179
  134. # CONFIG_ARM_ERRATA_621766
  135. # CONFIG_ARM_ERRATA_798870
  136. # CONFIG_ARM_ERRATA_801819
  137. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  138. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  139. config ARM_ERRATA_430973
  140. bool
  141. config ARM_ERRATA_454179
  142. bool
  143. config ARM_ERRATA_621766
  144. bool
  145. config ARM_ERRATA_716044
  146. bool
  147. config ARM_ERRATA_725233
  148. bool
  149. config ARM_ERRATA_742230
  150. bool
  151. config ARM_ERRATA_743622
  152. bool
  153. config ARM_ERRATA_751472
  154. bool
  155. config ARM_ERRATA_761320
  156. bool
  157. config ARM_ERRATA_773022
  158. bool
  159. config ARM_ERRATA_774769
  160. bool
  161. config ARM_ERRATA_794072
  162. bool
  163. config ARM_ERRATA_798870
  164. bool
  165. config ARM_ERRATA_801819
  166. bool
  167. config ARM_ERRATA_826974
  168. bool
  169. config ARM_ERRATA_828024
  170. bool
  171. config ARM_ERRATA_829520
  172. bool
  173. config ARM_ERRATA_833069
  174. bool
  175. config ARM_ERRATA_833471
  176. bool
  177. config ARM_ERRATA_845369
  178. bool
  179. config ARM_ERRATA_852421
  180. bool
  181. config ARM_ERRATA_852423
  182. bool
  183. config ARM_ERRATA_855873
  184. bool
  185. config ARM_CORTEX_A8_CVE_2017_5715
  186. bool
  187. config ARM_CORTEX_A15_CVE_2017_5715
  188. bool
  189. config CPU_ARM720T
  190. bool
  191. select SYS_CACHE_SHIFT_5
  192. imply SYS_ARM_MMU
  193. config CPU_ARM920T
  194. bool
  195. select SYS_CACHE_SHIFT_5
  196. imply SYS_ARM_MMU
  197. config CPU_ARM926EJS
  198. bool
  199. select SYS_CACHE_SHIFT_5
  200. imply SYS_ARM_MMU
  201. config CPU_ARM946ES
  202. bool
  203. select SYS_CACHE_SHIFT_5
  204. imply SYS_ARM_MMU
  205. config CPU_ARM1136
  206. bool
  207. select SYS_CACHE_SHIFT_5
  208. imply SYS_ARM_MMU
  209. config CPU_ARM1176
  210. bool
  211. select HAS_VBAR
  212. select SYS_CACHE_SHIFT_5
  213. imply SYS_ARM_MMU
  214. config CPU_V7A
  215. bool
  216. select HAS_THUMB2
  217. select HAS_VBAR
  218. select SYS_CACHE_SHIFT_6
  219. imply SYS_ARM_MMU
  220. config CPU_V7M
  221. bool
  222. select HAS_THUMB2
  223. select SYS_ARM_MPU
  224. select SYS_CACHE_SHIFT_5
  225. select SYS_THUMB_BUILD
  226. select THUMB2_KERNEL
  227. config CPU_V7R
  228. bool
  229. select HAS_THUMB2
  230. select SYS_ARM_CACHE_CP15
  231. select SYS_ARM_MPU
  232. select SYS_CACHE_SHIFT_6
  233. config CPU_PXA
  234. bool
  235. select SYS_CACHE_SHIFT_5
  236. imply SYS_ARM_MMU
  237. config CPU_SA1100
  238. bool
  239. select SYS_CACHE_SHIFT_5
  240. imply SYS_ARM_MMU
  241. config SYS_CPU
  242. default "arm720t" if CPU_ARM720T
  243. default "arm920t" if CPU_ARM920T
  244. default "arm926ejs" if CPU_ARM926EJS
  245. default "arm946es" if CPU_ARM946ES
  246. default "arm1136" if CPU_ARM1136
  247. default "arm1176" if CPU_ARM1176
  248. default "armv7" if CPU_V7A
  249. default "armv7" if CPU_V7R
  250. default "armv7m" if CPU_V7M
  251. default "pxa" if CPU_PXA
  252. default "sa1100" if CPU_SA1100
  253. default "armv8" if ARM64
  254. config SYS_ARM_ARCH
  255. int
  256. default 4 if CPU_ARM720T
  257. default 4 if CPU_ARM920T
  258. default 5 if CPU_ARM926EJS
  259. default 5 if CPU_ARM946ES
  260. default 6 if CPU_ARM1136
  261. default 6 if CPU_ARM1176
  262. default 7 if CPU_V7A
  263. default 7 if CPU_V7M
  264. default 7 if CPU_V7R
  265. default 5 if CPU_PXA
  266. default 4 if CPU_SA1100
  267. default 8 if ARM64
  268. config SYS_CACHE_SHIFT_5
  269. bool
  270. config SYS_CACHE_SHIFT_6
  271. bool
  272. config SYS_CACHE_SHIFT_7
  273. bool
  274. config SYS_CACHELINE_SIZE
  275. int
  276. default 128 if SYS_CACHE_SHIFT_7
  277. default 64 if SYS_CACHE_SHIFT_6
  278. default 32 if SYS_CACHE_SHIFT_5
  279. choice
  280. prompt "Select the ARM data write cache policy"
  281. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
  282. TARGET_BCMNSP || CPU_PXA || RZA1
  283. default SYS_ARM_CACHE_WRITEBACK
  284. config SYS_ARM_CACHE_WRITEBACK
  285. bool "Write-back (WB)"
  286. help
  287. A write updates the cache only and marks the cache line as dirty.
  288. External memory is updated only when the line is evicted or explicitly
  289. cleaned.
  290. config SYS_ARM_CACHE_WRITETHROUGH
  291. bool "Write-through (WT)"
  292. help
  293. A write updates both the cache and the external memory system.
  294. This does not mark the cache line as dirty.
  295. config SYS_ARM_CACHE_WRITEALLOC
  296. bool "Write allocation (WA)"
  297. help
  298. A cache line is allocated on a write miss. This means that executing a
  299. store instruction on the processor might cause a burst read to occur.
  300. There is a linefill to obtain the data for the cache line, before the
  301. write is performed.
  302. endchoice
  303. config ARCH_CPU_INIT
  304. bool "Enable ARCH_CPU_INIT"
  305. help
  306. Some architectures require a call to arch_cpu_init().
  307. Say Y here to enable it
  308. config SYS_ARCH_TIMER
  309. bool "ARM Generic Timer support"
  310. depends on CPU_V7A || ARM64
  311. default y if ARM64
  312. help
  313. The ARM Generic Timer (aka arch-timer) provides an architected
  314. interface to a timer source on an SoC.
  315. It is mandatory for ARMv8 implementation and widely available
  316. on ARMv7 systems.
  317. config ARM_SMCCC
  318. bool "Support for ARM SMC Calling Convention (SMCCC)"
  319. depends on CPU_V7A || ARM64
  320. select ARM_PSCI_FW
  321. help
  322. Say Y here if you want to enable ARM SMC Calling Convention.
  323. This should be enabled if U-Boot needs to communicate with system
  324. firmware (for example, PSCI) according to SMCCC.
  325. config SEMIHOSTING
  326. bool "support boot from semihosting"
  327. help
  328. In emulated environments, semihosting is a way for
  329. the hosted environment to call out to the emulator to
  330. retrieve files from the host machine.
  331. config SYS_THUMB_BUILD
  332. bool "Build U-Boot using the Thumb instruction set"
  333. depends on !ARM64
  334. help
  335. Use this flag to build U-Boot using the Thumb instruction set for
  336. ARM architectures. Thumb instruction set provides better code
  337. density. For ARM architectures that support Thumb2 this flag will
  338. result in Thumb2 code generated by GCC.
  339. config SPL_SYS_THUMB_BUILD
  340. bool "Build SPL using the Thumb instruction set"
  341. default y if SYS_THUMB_BUILD
  342. depends on !ARM64 && SPL
  343. help
  344. Use this flag to build SPL using the Thumb instruction set for
  345. ARM architectures. Thumb instruction set provides better code
  346. density. For ARM architectures that support Thumb2 this flag will
  347. result in Thumb2 code generated by GCC.
  348. config TPL_SYS_THUMB_BUILD
  349. bool "Build TPL using the Thumb instruction set"
  350. default y if SYS_THUMB_BUILD
  351. depends on TPL && !ARM64
  352. help
  353. Use this flag to build TPL using the Thumb instruction set for
  354. ARM architectures. Thumb instruction set provides better code
  355. density. For ARM architectures that support Thumb2 this flag will
  356. result in Thumb2 code generated by GCC.
  357. config SYS_L2CACHE_OFF
  358. bool "L2cache off"
  359. help
  360. If SoC does not support L2CACHE or one does not want to enable
  361. L2CACHE, choose this option.
  362. config ENABLE_ARM_SOC_BOOT0_HOOK
  363. bool "prepare BOOT0 header"
  364. help
  365. If the SoC's BOOT0 requires a header area filled with (magic)
  366. values, then choose this option, and create a file included as
  367. <asm/arch/boot0.h> which contains the required assembler code.
  368. config ARM_CORTEX_CPU_IS_UP
  369. bool
  370. default n
  371. config USE_ARCH_MEMCPY
  372. bool "Use an assembly optimized implementation of memcpy"
  373. default y
  374. depends on !ARM64
  375. help
  376. Enable the generation of an optimized version of memcpy.
  377. Such an implementation may be faster under some conditions
  378. but may increase the binary size.
  379. config SPL_USE_ARCH_MEMCPY
  380. bool "Use an assembly optimized implementation of memcpy for SPL"
  381. default y if USE_ARCH_MEMCPY
  382. depends on !ARM64 && SPL
  383. help
  384. Enable the generation of an optimized version of memcpy.
  385. Such an implementation may be faster under some conditions
  386. but may increase the binary size.
  387. config TPL_USE_ARCH_MEMCPY
  388. bool "Use an assembly optimized implementation of memcpy for TPL"
  389. default y if USE_ARCH_MEMCPY
  390. depends on !ARM64 && TPL
  391. help
  392. Enable the generation of an optimized version of memcpy.
  393. Such an implementation may be faster under some conditions
  394. but may increase the binary size.
  395. config USE_ARCH_MEMSET
  396. bool "Use an assembly optimized implementation of memset"
  397. default y
  398. depends on !ARM64
  399. help
  400. Enable the generation of an optimized version of memset.
  401. Such an implementation may be faster under some conditions
  402. but may increase the binary size.
  403. config SPL_USE_ARCH_MEMSET
  404. bool "Use an assembly optimized implementation of memset for SPL"
  405. default y if USE_ARCH_MEMSET
  406. depends on !ARM64 && SPL
  407. help
  408. Enable the generation of an optimized version of memset.
  409. Such an implementation may be faster under some conditions
  410. but may increase the binary size.
  411. config TPL_USE_ARCH_MEMSET
  412. bool "Use an assembly optimized implementation of memset for TPL"
  413. default y if USE_ARCH_MEMSET
  414. depends on !ARM64 && TPL
  415. help
  416. Enable the generation of an optimized version of memset.
  417. Such an implementation may be faster under some conditions
  418. but may increase the binary size.
  419. config ARM64_SUPPORT_AARCH32
  420. bool "ARM64 system support AArch32 execution state"
  421. depends on ARM64
  422. default y if !TARGET_THUNDERX_88XX
  423. help
  424. This ARM64 system supports AArch32 execution state.
  425. choice
  426. prompt "Target select"
  427. default TARGET_HIKEY
  428. config ARCH_AT91
  429. bool "Atmel AT91"
  430. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  431. select SPL_SEPARATE_BSS if SPL
  432. config TARGET_EDB93XX
  433. bool "Support edb93xx"
  434. select CPU_ARM920T
  435. select PL010_SERIAL
  436. config TARGET_ASPENITE
  437. bool "Support aspenite"
  438. select CPU_ARM926EJS
  439. config TARGET_GPLUGD
  440. bool "Support gplugd"
  441. select CPU_ARM926EJS
  442. config ARCH_DAVINCI
  443. bool "TI DaVinci"
  444. select CPU_ARM926EJS
  445. select SPL_DM_SPI if SPL
  446. imply CMD_SAVES
  447. help
  448. Support for TI's DaVinci platform.
  449. config ARCH_KIRKWOOD
  450. bool "Marvell Kirkwood"
  451. select ARCH_MISC_INIT
  452. select BOARD_EARLY_INIT_F
  453. select CPU_ARM926EJS
  454. config ARCH_MVEBU
  455. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  456. select DM
  457. select DM_ETH
  458. select DM_SERIAL
  459. select DM_SPI
  460. select DM_SPI_FLASH
  461. select SPL_DM_SPI if SPL
  462. select SPL_DM_SPI_FLASH if SPL
  463. select OF_CONTROL
  464. select OF_SEPARATE
  465. select SPI
  466. imply CMD_DM
  467. config TARGET_APF27
  468. bool "Support apf27"
  469. select CPU_ARM926EJS
  470. select SUPPORT_SPL
  471. config ARCH_ORION5X
  472. bool "Marvell Orion"
  473. select CPU_ARM926EJS
  474. config TARGET_SPEAR300
  475. bool "Support spear300"
  476. select BOARD_EARLY_INIT_F
  477. select CPU_ARM926EJS
  478. select PL011_SERIAL
  479. imply CMD_SAVES
  480. config TARGET_SPEAR310
  481. bool "Support spear310"
  482. select BOARD_EARLY_INIT_F
  483. select CPU_ARM926EJS
  484. select PL011_SERIAL
  485. imply CMD_SAVES
  486. config TARGET_SPEAR320
  487. bool "Support spear320"
  488. select BOARD_EARLY_INIT_F
  489. select CPU_ARM926EJS
  490. select PL011_SERIAL
  491. imply CMD_SAVES
  492. config TARGET_SPEAR600
  493. bool "Support spear600"
  494. select BOARD_EARLY_INIT_F
  495. select CPU_ARM926EJS
  496. select PL011_SERIAL
  497. imply CMD_SAVES
  498. config TARGET_STV0991
  499. bool "Support stv0991"
  500. select CPU_V7A
  501. select DM
  502. select DM_SERIAL
  503. select DM_SPI
  504. select DM_SPI_FLASH
  505. select PL01X_SERIAL
  506. select SPI
  507. select SPI_FLASH
  508. imply CMD_DM
  509. config TARGET_X600
  510. bool "Support x600"
  511. select BOARD_LATE_INIT
  512. select CPU_ARM926EJS
  513. select PL011_SERIAL
  514. select SUPPORT_SPL
  515. config TARGET_FLEA3
  516. bool "Support flea3"
  517. select CPU_ARM1136
  518. config TARGET_MX35PDK
  519. bool "Support mx35pdk"
  520. select BOARD_LATE_INIT
  521. select CPU_ARM1136
  522. config ARCH_BCM283X
  523. bool "Broadcom BCM283X family"
  524. select DM
  525. select DM_GPIO
  526. select DM_SERIAL
  527. select OF_CONTROL
  528. select PL01X_SERIAL
  529. select SERIAL_SEARCH_ALL
  530. imply CMD_DM
  531. imply FAT_WRITE
  532. config ARCH_BCM63158
  533. bool "Broadcom BCM63158 family"
  534. select DM
  535. select OF_CONTROL
  536. imply CMD_DM
  537. config ARCH_BCM68360
  538. bool "Broadcom BCM68360 family"
  539. select DM
  540. select OF_CONTROL
  541. imply CMD_DM
  542. config ARCH_BCM6858
  543. bool "Broadcom BCM6858 family"
  544. select DM
  545. select OF_CONTROL
  546. imply CMD_DM
  547. config TARGET_VEXPRESS_CA15_TC2
  548. bool "Support vexpress_ca15_tc2"
  549. select CPU_V7A
  550. select CPU_V7_HAS_NONSEC
  551. select CPU_V7_HAS_VIRT
  552. select PL011_SERIAL
  553. config ARCH_BCMSTB
  554. bool "Broadcom BCM7XXX family"
  555. select CPU_V7A
  556. select DM
  557. select OF_CONTROL
  558. select OF_PRIOR_STAGE
  559. imply CMD_DM
  560. help
  561. This enables support for Broadcom ARM-based set-top box
  562. chipsets, including the 7445 family of chips.
  563. config TARGET_VEXPRESS_CA5X2
  564. bool "Support vexpress_ca5x2"
  565. select CPU_V7A
  566. select PL011_SERIAL
  567. config TARGET_VEXPRESS_CA9X4
  568. bool "Support vexpress_ca9x4"
  569. select CPU_V7A
  570. select PL011_SERIAL
  571. config TARGET_BCM23550_W1D
  572. bool "Support bcm23550_w1d"
  573. select CPU_V7A
  574. imply CRC32_VERIFY
  575. imply FAT_WRITE
  576. config TARGET_BCM28155_AP
  577. bool "Support bcm28155_ap"
  578. select CPU_V7A
  579. imply CRC32_VERIFY
  580. imply FAT_WRITE
  581. config TARGET_BCMCYGNUS
  582. bool "Support bcmcygnus"
  583. select CPU_V7A
  584. imply BCM_SF2_ETH
  585. imply BCM_SF2_ETH_GMAC
  586. imply CMD_HASH
  587. imply CRC32_VERIFY
  588. imply FAT_WRITE
  589. imply HASH_VERIFY
  590. imply NETDEVICES
  591. config TARGET_BCMNSP
  592. bool "Support bcmnsp"
  593. select CPU_V7A
  594. config TARGET_BCMNS2
  595. bool "Support Broadcom Northstar2"
  596. select ARM64
  597. help
  598. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  599. ARMv8 Cortex-A57 processors targeting a broad range of networking
  600. applications.
  601. config TARGET_BCMNS3
  602. bool "Support Broadcom NS3"
  603. select ARM64
  604. select BOARD_LATE_INIT
  605. help
  606. Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
  607. ARMv8 Cortex-A72 processors targeting a broad range of networking
  608. applications.
  609. config ARCH_EXYNOS
  610. bool "Samsung EXYNOS"
  611. select DM
  612. select DM_GPIO
  613. select DM_I2C
  614. select DM_KEYBOARD
  615. select DM_SERIAL
  616. select DM_SPI
  617. select DM_SPI_FLASH
  618. select SPI
  619. imply SYS_THUMB_BUILD
  620. imply CMD_DM
  621. imply FAT_WRITE
  622. config ARCH_S5PC1XX
  623. bool "Samsung S5PC1XX"
  624. select CPU_V7A
  625. select DM
  626. select DM_GPIO
  627. select DM_I2C
  628. select DM_SERIAL
  629. imply CMD_DM
  630. config ARCH_HIGHBANK
  631. bool "Calxeda Highbank"
  632. select CPU_V7A
  633. select PL011_SERIAL
  634. config ARCH_INTEGRATOR
  635. bool "ARM Ltd. Integrator family"
  636. select DM
  637. select DM_SERIAL
  638. select PL01X_SERIAL
  639. imply CMD_DM
  640. config ARCH_IPQ40XX
  641. bool "Qualcomm IPQ40xx SoCs"
  642. select CPU_V7A
  643. select DM
  644. select DM_GPIO
  645. select DM_SERIAL
  646. select DM_RESET
  647. select MSM_SMEM
  648. select PINCTRL
  649. select CLK
  650. select SMEM
  651. select OF_CONTROL
  652. imply CMD_DM
  653. config ARCH_KEYSTONE
  654. bool "TI Keystone"
  655. select CMD_POWEROFF
  656. select CPU_V7A
  657. select SUPPORT_SPL
  658. select SYS_ARCH_TIMER
  659. select SYS_THUMB_BUILD
  660. imply CMD_MTDPARTS
  661. imply CMD_SAVES
  662. imply FIT
  663. config ARCH_K3
  664. bool "Texas Instruments' K3 Architecture"
  665. select SPL
  666. select SUPPORT_SPL
  667. select FIT
  668. config ARCH_OMAP2PLUS
  669. bool "TI OMAP2+"
  670. select CPU_V7A
  671. select SPL_BOARD_INIT if SPL
  672. select SPL_STACK_R if SPL
  673. select SUPPORT_SPL
  674. imply FIT
  675. config ARCH_MESON
  676. bool "Amlogic Meson"
  677. imply DISTRO_DEFAULTS
  678. imply DM_RNG
  679. help
  680. Support for the Meson SoC family developed by Amlogic Inc.,
  681. targeted at media players and tablet computers. We currently
  682. support the S905 (GXBaby) 64-bit SoC.
  683. config ARCH_MEDIATEK
  684. bool "MediaTek SoCs"
  685. select DM
  686. select OF_CONTROL
  687. select SPL_DM if SPL
  688. select SPL_LIBCOMMON_SUPPORT if SPL
  689. select SPL_LIBGENERIC_SUPPORT if SPL
  690. select SPL_OF_CONTROL if SPL
  691. select SUPPORT_SPL
  692. help
  693. Support for the MediaTek SoCs family developed by MediaTek Inc.
  694. Please refer to doc/README.mediatek for more information.
  695. config ARCH_LPC32XX
  696. bool "NXP LPC32xx platform"
  697. select CPU_ARM926EJS
  698. select DM
  699. select DM_GPIO
  700. select DM_SERIAL
  701. select SPL_DM if SPL
  702. select SUPPORT_SPL
  703. imply CMD_DM
  704. config ARCH_IMX8
  705. bool "NXP i.MX8 platform"
  706. select ARM64
  707. select DM
  708. select OF_CONTROL
  709. select ENABLE_ARM_SOC_BOOT0_HOOK
  710. config ARCH_IMX8M
  711. bool "NXP i.MX8M platform"
  712. select ARM64
  713. select DM
  714. select SUPPORT_SPL
  715. imply CMD_DM
  716. config ARCH_IMXRT
  717. bool "NXP i.MXRT platform"
  718. select CPU_V7M
  719. select DM
  720. select DM_SERIAL
  721. select SUPPORT_SPL
  722. imply CMD_DM
  723. config ARCH_MX23
  724. bool "NXP i.MX23 family"
  725. select CPU_ARM926EJS
  726. select PL011_SERIAL
  727. select SUPPORT_SPL
  728. config ARCH_MX25
  729. bool "NXP MX25"
  730. select CPU_ARM926EJS
  731. imply MXC_GPIO
  732. config ARCH_MX28
  733. bool "NXP i.MX28 family"
  734. select CPU_ARM926EJS
  735. select PL011_SERIAL
  736. select SUPPORT_SPL
  737. config ARCH_MX31
  738. bool "NXP i.MX31 family"
  739. select CPU_ARM1136
  740. config ARCH_MX7ULP
  741. bool "NXP MX7ULP"
  742. select CPU_V7A
  743. select ROM_UNIFIED_SECTIONS
  744. imply MXC_GPIO
  745. imply SYS_THUMB_BUILD
  746. config ARCH_MX7
  747. bool "Freescale MX7"
  748. select ARCH_MISC_INIT
  749. select CPU_V7A
  750. select SYS_FSL_HAS_SEC if IMX_HAB
  751. select SYS_FSL_SEC_COMPAT_4
  752. select SYS_FSL_SEC_LE
  753. imply BOARD_EARLY_INIT_F
  754. imply MXC_GPIO
  755. imply SYS_THUMB_BUILD
  756. config ARCH_MX6
  757. bool "Freescale MX6"
  758. select CPU_V7A
  759. select SYS_FSL_HAS_SEC
  760. select SYS_FSL_SEC_COMPAT_4
  761. select SYS_FSL_SEC_LE
  762. imply MXC_GPIO
  763. imply SYS_THUMB_BUILD
  764. if ARCH_MX6
  765. config SPL_LDSCRIPT
  766. default "arch/arm/mach-omap2/u-boot-spl.lds"
  767. endif
  768. config ARCH_MX5
  769. bool "Freescale MX5"
  770. select BOARD_EARLY_INIT_F
  771. select CPU_V7A
  772. imply MXC_GPIO
  773. config ARCH_NEXELL
  774. bool "Nexell S5P4418/S5P6818 SoC"
  775. select ENABLE_ARM_SOC_BOOT0_HOOK
  776. select DM
  777. config ARCH_OWL
  778. bool "Actions Semi OWL SoCs"
  779. select DM
  780. select DM_ETH
  781. select DM_SERIAL
  782. select OWL_SERIAL
  783. select CLK
  784. select CLK_OWL
  785. select OF_CONTROL
  786. select SYS_RELOC_GD_ENV_ADDR
  787. imply CMD_DM
  788. config ARCH_QEMU
  789. bool "QEMU Virtual Platform"
  790. select ARCH_SUPPORT_TFABOOT
  791. select DM
  792. select DM_SERIAL
  793. select OF_CONTROL
  794. select PL01X_SERIAL
  795. imply CMD_DM
  796. imply DM_RTC
  797. imply RTC_PL031
  798. config ARCH_RMOBILE
  799. bool "Renesas ARM SoCs"
  800. select DM
  801. select DM_SERIAL
  802. imply BOARD_EARLY_INIT_F
  803. imply CMD_DM
  804. imply FAT_WRITE
  805. imply SYS_THUMB_BUILD
  806. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  807. config TARGET_S32V234EVB
  808. bool "Support s32v234evb"
  809. select ARM64
  810. select SYS_FSL_ERRATUM_ESDHC111
  811. config ARCH_SNAPDRAGON
  812. bool "Qualcomm Snapdragon SoCs"
  813. select ARM64
  814. select DM
  815. select DM_GPIO
  816. select DM_SERIAL
  817. select MSM_SMEM
  818. select OF_CONTROL
  819. select OF_SEPARATE
  820. select SMEM
  821. select SPMI
  822. imply CMD_DM
  823. config ARCH_SOCFPGA
  824. bool "Altera SOCFPGA family"
  825. select ARCH_EARLY_INIT_R
  826. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  827. select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  828. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  829. select DM
  830. select DM_SERIAL
  831. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  832. select OF_CONTROL
  833. select SPL_DM_RESET if DM_RESET
  834. select SPL_DM_SERIAL
  835. select SPL_LIBCOMMON_SUPPORT
  836. select SPL_LIBGENERIC_SUPPORT
  837. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  838. select SPL_OF_CONTROL
  839. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  840. select SPL_SERIAL_SUPPORT
  841. select SPL_SYSRESET
  842. select SPL_WATCHDOG_SUPPORT
  843. select SUPPORT_SPL
  844. select SYS_NS16550
  845. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  846. select SYSRESET
  847. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  848. select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
  849. imply CMD_DM
  850. imply CMD_MTDPARTS
  851. imply CRC32_VERIFY
  852. imply DM_SPI
  853. imply DM_SPI_FLASH
  854. imply FAT_WRITE
  855. imply SPL
  856. imply SPL_DM
  857. imply SPL_DM_SPI
  858. imply SPL_DM_SPI_FLASH
  859. imply SPL_LIBDISK_SUPPORT
  860. imply SPL_MMC_SUPPORT
  861. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  862. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  863. imply SPL_SPI_FLASH_SUPPORT
  864. imply SPL_SPI_SUPPORT
  865. imply L2X0_CACHE
  866. config ARCH_SUNXI
  867. bool "Support sunxi (Allwinner) SoCs"
  868. select BINMAN
  869. select CMD_GPIO
  870. select CMD_MMC if MMC
  871. select CMD_USB if DISTRO_DEFAULTS
  872. select CLK
  873. select DM
  874. select DM_ETH
  875. select DM_GPIO
  876. select DM_KEYBOARD
  877. select DM_MMC if MMC
  878. select DM_SCSI if SCSI
  879. select DM_SERIAL
  880. select DM_USB if DISTRO_DEFAULTS
  881. select OF_BOARD_SETUP
  882. select OF_CONTROL
  883. select OF_SEPARATE
  884. select SPECIFY_CONSOLE_INDEX
  885. select SPL_STACK_R if SPL
  886. select SPL_SYS_MALLOC_SIMPLE if SPL
  887. select SPL_SYS_THUMB_BUILD if !ARM64
  888. select SUNXI_GPIO
  889. select SYS_NS16550
  890. select SYS_THUMB_BUILD if !ARM64
  891. select USB if DISTRO_DEFAULTS
  892. select USB_KEYBOARD if DISTRO_DEFAULTS
  893. select USB_STORAGE if DISTRO_DEFAULTS
  894. select SPL_USE_TINY_PRINTF
  895. select USE_PREBOOT
  896. select SYS_RELOC_GD_ENV_ADDR
  897. imply CMD_DM
  898. imply CMD_GPT
  899. imply CMD_UBI if MTD_RAW_NAND
  900. imply DISTRO_DEFAULTS
  901. imply FAT_WRITE
  902. imply FIT
  903. imply OF_LIBFDT_OVERLAY
  904. imply PRE_CONSOLE_BUFFER
  905. imply SPL_GPIO_SUPPORT
  906. imply SPL_LIBCOMMON_SUPPORT
  907. imply SPL_LIBGENERIC_SUPPORT
  908. imply SPL_MMC_SUPPORT if MMC
  909. imply SPL_POWER_SUPPORT
  910. imply SPL_SERIAL_SUPPORT
  911. imply USB_GADGET
  912. config ARCH_U8500
  913. bool "ST-Ericsson U8500 Series"
  914. select CPU_V7A
  915. select DM
  916. select DM_GPIO
  917. select DM_MMC if MMC
  918. select DM_SERIAL
  919. select DM_USB if USB
  920. select OF_CONTROL
  921. select SYSRESET
  922. select TIMER
  923. imply ARM_PL180_MMCI
  924. imply DM_RTC
  925. imply NOMADIK_MTU_TIMER
  926. imply PL01X_SERIAL
  927. imply RTC_PL031
  928. imply SYSRESET_SYSCON
  929. config ARCH_VERSAL
  930. bool "Support Xilinx Versal Platform"
  931. select ARM64
  932. select CLK
  933. select DM
  934. select DM_ETH if NET
  935. select DM_MMC if MMC
  936. select DM_SERIAL
  937. select OF_CONTROL
  938. imply BOARD_LATE_INIT
  939. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  940. config ARCH_VF610
  941. bool "Freescale Vybrid"
  942. select CPU_V7A
  943. select SYS_FSL_ERRATUM_ESDHC111
  944. imply CMD_MTDPARTS
  945. imply MTD_RAW_NAND
  946. config ARCH_ZYNQ
  947. bool "Xilinx Zynq based platform"
  948. select CLK
  949. select CLK_ZYNQ
  950. select CPU_V7A
  951. select DM
  952. select DM_ETH if NET
  953. select DM_MMC if MMC
  954. select DM_SERIAL
  955. select DM_SPI
  956. select DM_SPI_FLASH
  957. select DM_USB if USB
  958. select OF_CONTROL
  959. select SPI
  960. select SPL_BOARD_INIT if SPL
  961. select SPL_CLK if SPL
  962. select SPL_DM if SPL
  963. select SPL_DM_SPI if SPL
  964. select SPL_DM_SPI_FLASH if SPL
  965. select SPL_OF_CONTROL if SPL
  966. select SPL_SEPARATE_BSS if SPL
  967. select SUPPORT_SPL
  968. imply ARCH_EARLY_INIT_R
  969. imply BOARD_LATE_INIT
  970. imply CMD_CLK
  971. imply CMD_DM
  972. imply CMD_SPL
  973. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  974. imply FAT_WRITE
  975. config ARCH_ZYNQMP_R5
  976. bool "Xilinx ZynqMP R5 based platform"
  977. select CLK
  978. select CPU_V7R
  979. select DM
  980. select DM_ETH if NET
  981. select DM_MMC if MMC
  982. select DM_SERIAL
  983. select OF_CONTROL
  984. imply CMD_DM
  985. imply DM_USB_GADGET
  986. config ARCH_ZYNQMP
  987. bool "Xilinx ZynqMP based platform"
  988. select ARM64
  989. select CLK
  990. select DM
  991. select DM_ETH if NET
  992. select DM_MAILBOX
  993. select DM_MMC if MMC
  994. select DM_SERIAL
  995. select DM_SPI if SPI
  996. select DM_SPI_FLASH if DM_SPI
  997. select DM_USB if USB
  998. select FIRMWARE
  999. select OF_CONTROL
  1000. select SPL_BOARD_INIT if SPL
  1001. select SPL_CLK if SPL
  1002. select SPL_DM if SPL
  1003. select SPL_DM_SPI if SPI && SPL_DM
  1004. select SPL_DM_SPI_FLASH if SPL_DM_SPI
  1005. select SPL_DM_MAILBOX if SPL
  1006. select SPL_FIRMWARE if SPL
  1007. select SPL_SEPARATE_BSS if SPL
  1008. select SUPPORT_SPL
  1009. select ZYNQMP_IPI
  1010. imply BOARD_LATE_INIT
  1011. imply CMD_DM
  1012. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1013. imply FAT_WRITE
  1014. imply MP
  1015. imply DM_USB_GADGET
  1016. config ARCH_TEGRA
  1017. bool "NVIDIA Tegra"
  1018. imply DISTRO_DEFAULTS
  1019. imply FAT_WRITE
  1020. config TARGET_VEXPRESS64_AEMV8A
  1021. bool "Support vexpress_aemv8a"
  1022. select ARM64
  1023. select PL01X_SERIAL
  1024. config TARGET_VEXPRESS64_BASE_FVP
  1025. bool "Support Versatile Express ARMv8a FVP BASE model"
  1026. select ARM64
  1027. select PL01X_SERIAL
  1028. select SEMIHOSTING
  1029. config TARGET_VEXPRESS64_JUNO
  1030. bool "Support Versatile Express Juno Development Platform"
  1031. select ARM64
  1032. select PL01X_SERIAL
  1033. select DM
  1034. select OF_CONTROL
  1035. select OF_BOARD
  1036. select CLK
  1037. select DM_SERIAL
  1038. select ARM_PSCI_FW
  1039. select PSCI_RESET
  1040. select DM_ETH
  1041. select BLK
  1042. select USB
  1043. select DM_USB
  1044. config TARGET_TOTAL_COMPUTE
  1045. bool "Support Total Compute Platform"
  1046. select ARM64
  1047. select PL01X_SERIAL
  1048. select DM
  1049. select DM_SERIAL
  1050. select DM_MMC
  1051. select DM_GPIO
  1052. config TARGET_LS2080A_EMU
  1053. bool "Support ls2080a_emu"
  1054. select ARCH_LS2080A
  1055. select ARM64
  1056. select ARMV8_MULTIENTRY
  1057. select FSL_DDR_SYNC_REFRESH
  1058. help
  1059. Support for Freescale LS2080A_EMU platform.
  1060. The LS2080A Development System (EMULATOR) is a pre-silicon
  1061. development platform that supports the QorIQ LS2080A
  1062. Layerscape Architecture processor.
  1063. config TARGET_LS2080A_SIMU
  1064. bool "Support ls2080a_simu"
  1065. select ARCH_LS2080A
  1066. select ARM64
  1067. select ARMV8_MULTIENTRY
  1068. select BOARD_LATE_INIT
  1069. help
  1070. Support for Freescale LS2080A_SIMU platform.
  1071. The LS2080A Development System (QDS) is a pre silicon
  1072. development platform that supports the QorIQ LS2080A
  1073. Layerscape Architecture processor.
  1074. config TARGET_LS1088AQDS
  1075. bool "Support ls1088aqds"
  1076. select ARCH_LS1088A
  1077. select ARM64
  1078. select ARMV8_MULTIENTRY
  1079. select ARCH_SUPPORT_TFABOOT
  1080. select BOARD_LATE_INIT
  1081. select SUPPORT_SPL
  1082. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1083. help
  1084. Support for NXP LS1088AQDS platform.
  1085. The LS1088A Development System (QDS) is a high-performance
  1086. development platform that supports the QorIQ LS1088A
  1087. Layerscape Architecture processor.
  1088. config TARGET_LS2080AQDS
  1089. bool "Support ls2080aqds"
  1090. select ARCH_LS2080A
  1091. select ARM64
  1092. select ARMV8_MULTIENTRY
  1093. select ARCH_SUPPORT_TFABOOT
  1094. select BOARD_LATE_INIT
  1095. select SUPPORT_SPL
  1096. imply SCSI
  1097. imply SCSI_AHCI
  1098. select FSL_DDR_BIST
  1099. select FSL_DDR_INTERACTIVE if !SPL
  1100. help
  1101. Support for Freescale LS2080AQDS platform.
  1102. The LS2080A Development System (QDS) is a high-performance
  1103. development platform that supports the QorIQ LS2080A
  1104. Layerscape Architecture processor.
  1105. config TARGET_LS2080ARDB
  1106. bool "Support ls2080ardb"
  1107. select ARCH_LS2080A
  1108. select ARM64
  1109. select ARMV8_MULTIENTRY
  1110. select ARCH_SUPPORT_TFABOOT
  1111. select BOARD_LATE_INIT
  1112. select SUPPORT_SPL
  1113. select FSL_DDR_BIST
  1114. select FSL_DDR_INTERACTIVE if !SPL
  1115. imply SCSI
  1116. imply SCSI_AHCI
  1117. help
  1118. Support for Freescale LS2080ARDB platform.
  1119. The LS2080A Reference design board (RDB) is a high-performance
  1120. development platform that supports the QorIQ LS2080A
  1121. Layerscape Architecture processor.
  1122. config TARGET_LS2081ARDB
  1123. bool "Support ls2081ardb"
  1124. select ARCH_LS2080A
  1125. select ARM64
  1126. select ARMV8_MULTIENTRY
  1127. select BOARD_LATE_INIT
  1128. select SUPPORT_SPL
  1129. help
  1130. Support for Freescale LS2081ARDB platform.
  1131. The LS2081A Reference design board (RDB) is a high-performance
  1132. development platform that supports the QorIQ LS2081A/LS2041A
  1133. Layerscape Architecture processor.
  1134. config TARGET_LX2160ARDB
  1135. bool "Support lx2160ardb"
  1136. select ARCH_LX2160A
  1137. select ARM64
  1138. select ARMV8_MULTIENTRY
  1139. select ARCH_SUPPORT_TFABOOT
  1140. select BOARD_LATE_INIT
  1141. help
  1142. Support for NXP LX2160ARDB platform.
  1143. The lx2160ardb (LX2160A Reference design board (RDB)
  1144. is a high-performance development platform that supports the
  1145. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1146. config TARGET_LX2160AQDS
  1147. bool "Support lx2160aqds"
  1148. select ARCH_LX2160A
  1149. select ARM64
  1150. select ARMV8_MULTIENTRY
  1151. select ARCH_SUPPORT_TFABOOT
  1152. select BOARD_LATE_INIT
  1153. help
  1154. Support for NXP LX2160AQDS platform.
  1155. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1156. is a high-performance development platform that supports the
  1157. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1158. config TARGET_HIKEY
  1159. bool "Support HiKey 96boards Consumer Edition Platform"
  1160. select ARM64
  1161. select DM
  1162. select DM_GPIO
  1163. select DM_SERIAL
  1164. select OF_CONTROL
  1165. select PL01X_SERIAL
  1166. select SPECIFY_CONSOLE_INDEX
  1167. imply CMD_DM
  1168. help
  1169. Support for HiKey 96boards platform. It features a HI6220
  1170. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1171. config TARGET_HIKEY960
  1172. bool "Support HiKey960 96boards Consumer Edition Platform"
  1173. select ARM64
  1174. select DM
  1175. select DM_SERIAL
  1176. select OF_CONTROL
  1177. select PL01X_SERIAL
  1178. imply CMD_DM
  1179. help
  1180. Support for HiKey960 96boards platform. It features a HI3660
  1181. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1182. config TARGET_POPLAR
  1183. bool "Support Poplar 96boards Enterprise Edition Platform"
  1184. select ARM64
  1185. select DM
  1186. select DM_SERIAL
  1187. select DM_USB
  1188. select OF_CONTROL
  1189. select PL01X_SERIAL
  1190. imply CMD_DM
  1191. help
  1192. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1193. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1194. making it capable of running any commercial set-top solution based on
  1195. Linux or Android.
  1196. config TARGET_LS1012AQDS
  1197. bool "Support ls1012aqds"
  1198. select ARCH_LS1012A
  1199. select ARM64
  1200. select ARCH_SUPPORT_TFABOOT
  1201. select BOARD_LATE_INIT
  1202. help
  1203. Support for Freescale LS1012AQDS platform.
  1204. The LS1012A Development System (QDS) is a high-performance
  1205. development platform that supports the QorIQ LS1012A
  1206. Layerscape Architecture processor.
  1207. config TARGET_LS1012ARDB
  1208. bool "Support ls1012ardb"
  1209. select ARCH_LS1012A
  1210. select ARM64
  1211. select ARCH_SUPPORT_TFABOOT
  1212. select BOARD_LATE_INIT
  1213. imply SCSI
  1214. imply SCSI_AHCI
  1215. help
  1216. Support for Freescale LS1012ARDB platform.
  1217. The LS1012A Reference design board (RDB) is a high-performance
  1218. development platform that supports the QorIQ LS1012A
  1219. Layerscape Architecture processor.
  1220. config TARGET_LS1012A2G5RDB
  1221. bool "Support ls1012a2g5rdb"
  1222. select ARCH_LS1012A
  1223. select ARM64
  1224. select ARCH_SUPPORT_TFABOOT
  1225. select BOARD_LATE_INIT
  1226. imply SCSI
  1227. help
  1228. Support for Freescale LS1012A2G5RDB platform.
  1229. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1230. development platform that supports the QorIQ LS1012A
  1231. Layerscape Architecture processor.
  1232. config TARGET_LS1012AFRWY
  1233. bool "Support ls1012afrwy"
  1234. select ARCH_LS1012A
  1235. select ARM64
  1236. select ARCH_SUPPORT_TFABOOT
  1237. select BOARD_LATE_INIT
  1238. imply SCSI
  1239. imply SCSI_AHCI
  1240. help
  1241. Support for Freescale LS1012AFRWY platform.
  1242. The LS1012A FRWY board (FRWY) is a high-performance
  1243. development platform that supports the QorIQ LS1012A
  1244. Layerscape Architecture processor.
  1245. config TARGET_LS1012AFRDM
  1246. bool "Support ls1012afrdm"
  1247. select ARCH_LS1012A
  1248. select ARM64
  1249. select ARCH_SUPPORT_TFABOOT
  1250. help
  1251. Support for Freescale LS1012AFRDM platform.
  1252. The LS1012A Freedom board (FRDM) is a high-performance
  1253. development platform that supports the QorIQ LS1012A
  1254. Layerscape Architecture processor.
  1255. config TARGET_LS1028AQDS
  1256. bool "Support ls1028aqds"
  1257. select ARCH_LS1028A
  1258. select ARM64
  1259. select ARMV8_MULTIENTRY
  1260. select ARCH_SUPPORT_TFABOOT
  1261. select BOARD_LATE_INIT
  1262. help
  1263. Support for Freescale LS1028AQDS platform
  1264. The LS1028A Development System (QDS) is a high-performance
  1265. development platform that supports the QorIQ LS1028A
  1266. Layerscape Architecture processor.
  1267. config TARGET_LS1028ARDB
  1268. bool "Support ls1028ardb"
  1269. select ARCH_LS1028A
  1270. select ARM64
  1271. select ARMV8_MULTIENTRY
  1272. select ARCH_SUPPORT_TFABOOT
  1273. select BOARD_LATE_INIT
  1274. help
  1275. Support for Freescale LS1028ARDB platform
  1276. The LS1028A Development System (RDB) is a high-performance
  1277. development platform that supports the QorIQ LS1028A
  1278. Layerscape Architecture processor.
  1279. config TARGET_LS1088ARDB
  1280. bool "Support ls1088ardb"
  1281. select ARCH_LS1088A
  1282. select ARM64
  1283. select ARMV8_MULTIENTRY
  1284. select ARCH_SUPPORT_TFABOOT
  1285. select BOARD_LATE_INIT
  1286. select SUPPORT_SPL
  1287. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1288. help
  1289. Support for NXP LS1088ARDB platform.
  1290. The LS1088A Reference design board (RDB) is a high-performance
  1291. development platform that supports the QorIQ LS1088A
  1292. Layerscape Architecture processor.
  1293. config TARGET_LS1021AQDS
  1294. bool "Support ls1021aqds"
  1295. select ARCH_LS1021A
  1296. select ARCH_SUPPORT_PSCI
  1297. select BOARD_EARLY_INIT_F
  1298. select BOARD_LATE_INIT
  1299. select CPU_V7A
  1300. select CPU_V7_HAS_NONSEC
  1301. select CPU_V7_HAS_VIRT
  1302. select LS1_DEEP_SLEEP
  1303. select SUPPORT_SPL
  1304. select SYS_FSL_DDR
  1305. select FSL_DDR_INTERACTIVE
  1306. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1307. select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
  1308. imply SCSI
  1309. config TARGET_LS1021ATWR
  1310. bool "Support ls1021atwr"
  1311. select ARCH_LS1021A
  1312. select ARCH_SUPPORT_PSCI
  1313. select BOARD_EARLY_INIT_F
  1314. select BOARD_LATE_INIT
  1315. select CPU_V7A
  1316. select CPU_V7_HAS_NONSEC
  1317. select CPU_V7_HAS_VIRT
  1318. select LS1_DEEP_SLEEP
  1319. select SUPPORT_SPL
  1320. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1321. imply SCSI
  1322. config TARGET_LS1021ATSN
  1323. bool "Support ls1021atsn"
  1324. select ARCH_LS1021A
  1325. select ARCH_SUPPORT_PSCI
  1326. select BOARD_EARLY_INIT_F
  1327. select BOARD_LATE_INIT
  1328. select CPU_V7A
  1329. select CPU_V7_HAS_NONSEC
  1330. select CPU_V7_HAS_VIRT
  1331. select LS1_DEEP_SLEEP
  1332. select SUPPORT_SPL
  1333. imply SCSI
  1334. config TARGET_LS1021AIOT
  1335. bool "Support ls1021aiot"
  1336. select ARCH_LS1021A
  1337. select ARCH_SUPPORT_PSCI
  1338. select BOARD_LATE_INIT
  1339. select CPU_V7A
  1340. select CPU_V7_HAS_NONSEC
  1341. select CPU_V7_HAS_VIRT
  1342. select SUPPORT_SPL
  1343. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1344. imply SCSI
  1345. help
  1346. Support for Freescale LS1021AIOT platform.
  1347. The LS1021A Freescale board (IOT) is a high-performance
  1348. development platform that supports the QorIQ LS1021A
  1349. Layerscape Architecture processor.
  1350. config TARGET_LS1043AQDS
  1351. bool "Support ls1043aqds"
  1352. select ARCH_LS1043A
  1353. select ARM64
  1354. select ARMV8_MULTIENTRY
  1355. select ARCH_SUPPORT_TFABOOT
  1356. select BOARD_EARLY_INIT_F
  1357. select BOARD_LATE_INIT
  1358. select SUPPORT_SPL
  1359. select FSL_DDR_INTERACTIVE if !SPL
  1360. select FSL_DSPI if !SPL_NO_DSPI
  1361. select DM_SPI_FLASH if FSL_DSPI
  1362. imply SCSI
  1363. imply SCSI_AHCI
  1364. help
  1365. Support for Freescale LS1043AQDS platform.
  1366. config TARGET_LS1043ARDB
  1367. bool "Support ls1043ardb"
  1368. select ARCH_LS1043A
  1369. select ARM64
  1370. select ARMV8_MULTIENTRY
  1371. select ARCH_SUPPORT_TFABOOT
  1372. select BOARD_EARLY_INIT_F
  1373. select BOARD_LATE_INIT
  1374. select SUPPORT_SPL
  1375. select FSL_DSPI if !SPL_NO_DSPI
  1376. select DM_SPI_FLASH if FSL_DSPI
  1377. help
  1378. Support for Freescale LS1043ARDB platform.
  1379. config TARGET_LS1046AQDS
  1380. bool "Support ls1046aqds"
  1381. select ARCH_LS1046A
  1382. select ARM64
  1383. select ARMV8_MULTIENTRY
  1384. select ARCH_SUPPORT_TFABOOT
  1385. select BOARD_EARLY_INIT_F
  1386. select BOARD_LATE_INIT
  1387. select DM_SPI_FLASH if DM_SPI
  1388. select SUPPORT_SPL
  1389. select FSL_DDR_BIST if !SPL
  1390. select FSL_DDR_INTERACTIVE if !SPL
  1391. select FSL_DDR_INTERACTIVE if !SPL
  1392. imply SCSI
  1393. help
  1394. Support for Freescale LS1046AQDS platform.
  1395. The LS1046A Development System (QDS) is a high-performance
  1396. development platform that supports the QorIQ LS1046A
  1397. Layerscape Architecture processor.
  1398. config TARGET_LS1046ARDB
  1399. bool "Support ls1046ardb"
  1400. select ARCH_LS1046A
  1401. select ARM64
  1402. select ARMV8_MULTIENTRY
  1403. select ARCH_SUPPORT_TFABOOT
  1404. select BOARD_EARLY_INIT_F
  1405. select BOARD_LATE_INIT
  1406. select DM_SPI_FLASH if DM_SPI
  1407. select POWER_MC34VR500
  1408. select SUPPORT_SPL
  1409. select FSL_DDR_BIST
  1410. select FSL_DDR_INTERACTIVE if !SPL
  1411. imply SCSI
  1412. help
  1413. Support for Freescale LS1046ARDB platform.
  1414. The LS1046A Reference Design Board (RDB) is a high-performance
  1415. development platform that supports the QorIQ LS1046A
  1416. Layerscape Architecture processor.
  1417. config TARGET_LS1046AFRWY
  1418. bool "Support ls1046afrwy"
  1419. select ARCH_LS1046A
  1420. select ARM64
  1421. select ARMV8_MULTIENTRY
  1422. select ARCH_SUPPORT_TFABOOT
  1423. select BOARD_EARLY_INIT_F
  1424. select BOARD_LATE_INIT
  1425. select DM_SPI_FLASH if DM_SPI
  1426. imply SCSI
  1427. help
  1428. Support for Freescale LS1046AFRWY platform.
  1429. The LS1046A Freeway Board (FRWY) is a high-performance
  1430. development platform that supports the QorIQ LS1046A
  1431. Layerscape Architecture processor.
  1432. config TARGET_COLIBRI_PXA270
  1433. bool "Support colibri_pxa270"
  1434. select CPU_PXA
  1435. config ARCH_UNIPHIER
  1436. bool "Socionext UniPhier SoCs"
  1437. select BOARD_LATE_INIT
  1438. select DM
  1439. select DM_ETH
  1440. select DM_GPIO
  1441. select DM_I2C
  1442. select DM_MMC
  1443. select DM_MTD
  1444. select DM_RESET
  1445. select DM_SERIAL
  1446. select DM_USB
  1447. select OF_BOARD_SETUP
  1448. select OF_CONTROL
  1449. select OF_LIBFDT
  1450. select PINCTRL
  1451. select SPL_BOARD_INIT if SPL
  1452. select SPL_DM if SPL
  1453. select SPL_LIBCOMMON_SUPPORT if SPL
  1454. select SPL_LIBGENERIC_SUPPORT if SPL
  1455. select SPL_OF_CONTROL if SPL
  1456. select SPL_PINCTRL if SPL
  1457. select SUPPORT_SPL
  1458. imply CMD_DM
  1459. imply DISTRO_DEFAULTS
  1460. imply FAT_WRITE
  1461. help
  1462. Support for UniPhier SoC family developed by Socionext Inc.
  1463. (formerly, System LSI Business Division of Panasonic Corporation)
  1464. config ARCH_STM32
  1465. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1466. select CPU_V7M
  1467. select DM
  1468. select DM_SERIAL
  1469. imply CMD_DM
  1470. config ARCH_STI
  1471. bool "Support STMicrolectronics SoCs"
  1472. select BLK
  1473. select CPU_V7A
  1474. select DM
  1475. select DM_MMC
  1476. select DM_RESET
  1477. select DM_SERIAL
  1478. imply CMD_DM
  1479. help
  1480. Support for STMicroelectronics STiH407/10 SoC family.
  1481. This SoC is used on Linaro 96Board STiH410-B2260
  1482. config ARCH_STM32MP
  1483. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1484. select ARCH_MISC_INIT
  1485. select ARCH_SUPPORT_TFABOOT
  1486. select BOARD_LATE_INIT
  1487. select CLK
  1488. select DM
  1489. select DM_GPIO
  1490. select DM_RESET
  1491. select DM_SERIAL
  1492. select MISC
  1493. select OF_CONTROL
  1494. select OF_LIBFDT
  1495. select OF_SYSTEM_SETUP
  1496. select PINCTRL
  1497. select REGMAP
  1498. select SUPPORT_SPL
  1499. select SYSCON
  1500. select SYSRESET
  1501. select SYS_THUMB_BUILD
  1502. imply SPL_SYSRESET
  1503. imply CMD_DM
  1504. imply CMD_POWEROFF
  1505. imply OF_LIBFDT_OVERLAY
  1506. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1507. imply USE_PREBOOT
  1508. help
  1509. Support for STM32MP SoC family developed by STMicroelectronics,
  1510. MPUs based on ARM cortex A core
  1511. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1512. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1513. chain.
  1514. SPL is the unsecure FSBL for the basic boot chain.
  1515. config ARCH_ROCKCHIP
  1516. bool "Support Rockchip SoCs"
  1517. select BLK
  1518. select BINMAN if !ARM64
  1519. select DM
  1520. select DM_GPIO
  1521. select DM_I2C
  1522. select DM_MMC
  1523. select DM_PWM
  1524. select DM_REGULATOR
  1525. select DM_SERIAL
  1526. select DM_SPI
  1527. select DM_SPI_FLASH
  1528. select DM_USB if USB
  1529. select ENABLE_ARM_SOC_BOOT0_HOOK
  1530. select OF_CONTROL
  1531. select SPI
  1532. select SPL_DM if SPL
  1533. select SPL_DM_SPI if SPL
  1534. select SPL_DM_SPI_FLASH if SPL
  1535. select SYS_MALLOC_F
  1536. select SYS_THUMB_BUILD if !ARM64
  1537. imply ADC
  1538. imply CMD_DM
  1539. imply DEBUG_UART_BOARD_INIT
  1540. imply DISTRO_DEFAULTS
  1541. imply FAT_WRITE
  1542. imply SARADC_ROCKCHIP
  1543. imply SPL_SYSRESET
  1544. imply SPL_SYS_MALLOC_SIMPLE
  1545. imply SYS_NS16550
  1546. imply TPL_SYSRESET
  1547. imply USB_FUNCTION_FASTBOOT
  1548. config ARCH_OCTEONTX
  1549. bool "Support OcteonTX SoCs"
  1550. select DM
  1551. select ARM64
  1552. select OF_CONTROL
  1553. select OF_LIVE
  1554. select BOARD_LATE_INIT
  1555. select SYS_CACHE_SHIFT_7
  1556. config ARCH_OCTEONTX2
  1557. bool "Support OcteonTX2 SoCs"
  1558. select DM
  1559. select ARM64
  1560. select OF_CONTROL
  1561. select OF_LIVE
  1562. select BOARD_LATE_INIT
  1563. select SYS_CACHE_SHIFT_7
  1564. config TARGET_THUNDERX_88XX
  1565. bool "Support ThunderX 88xx"
  1566. select ARM64
  1567. select OF_CONTROL
  1568. select PL01X_SERIAL
  1569. select SYS_CACHE_SHIFT_7
  1570. config ARCH_ASPEED
  1571. bool "Support Aspeed SoCs"
  1572. select DM
  1573. select OF_CONTROL
  1574. imply CMD_DM
  1575. config TARGET_DURIAN
  1576. bool "Support Phytium Durian Platform"
  1577. select ARM64
  1578. help
  1579. Support for durian platform.
  1580. It has 2GB Sdram, uart and pcie.
  1581. config TARGET_PRESIDIO_ASIC
  1582. bool "Support Cortina Presidio ASIC Platform"
  1583. select ARM64
  1584. config TARGET_XENGUEST_ARM64
  1585. bool "Xen guest ARM64"
  1586. select ARM64
  1587. select XEN
  1588. select OF_CONTROL
  1589. select LINUX_KERNEL_IMAGE_HEADER
  1590. select XEN_SERIAL
  1591. select SSCANF
  1592. endchoice
  1593. config ARCH_SUPPORT_TFABOOT
  1594. bool
  1595. config TFABOOT
  1596. bool "Support for booting from TF-A"
  1597. depends on ARCH_SUPPORT_TFABOOT
  1598. default n
  1599. help
  1600. Enabling this will make a U-Boot binary that is capable of being
  1601. booted via TF-A (Trusted Firmware for Cortex-A).
  1602. config TI_SECURE_DEVICE
  1603. bool "HS Device Type Support"
  1604. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1605. help
  1606. If a high secure (HS) device type is being used, this config
  1607. must be set. This option impacts various aspects of the
  1608. build system (to create signed boot images that can be
  1609. authenticated) and the code. See the doc/README.ti-secure
  1610. file for further details.
  1611. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1612. config ISW_ENTRY_ADDR
  1613. hex "Address in memory or XIP address of bootloader entry point"
  1614. default 0x402F4000 if AM43XX
  1615. default 0x402F0400 if AM33XX
  1616. default 0x40301350 if OMAP54XX
  1617. help
  1618. After any reset, the boot ROM searches the boot media for a valid
  1619. boot image. For non-XIP devices, the ROM then copies the image into
  1620. internal memory. For all boot modes, after the ROM processes the
  1621. boot image it eventually computes the entry point address depending
  1622. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1623. image headers.
  1624. endif
  1625. source "arch/arm/mach-aspeed/Kconfig"
  1626. source "arch/arm/mach-at91/Kconfig"
  1627. source "arch/arm/mach-bcm283x/Kconfig"
  1628. source "arch/arm/mach-bcmstb/Kconfig"
  1629. source "arch/arm/mach-davinci/Kconfig"
  1630. source "arch/arm/mach-exynos/Kconfig"
  1631. source "arch/arm/mach-highbank/Kconfig"
  1632. source "arch/arm/mach-integrator/Kconfig"
  1633. source "arch/arm/mach-ipq40xx/Kconfig"
  1634. source "arch/arm/mach-k3/Kconfig"
  1635. source "arch/arm/mach-keystone/Kconfig"
  1636. source "arch/arm/mach-kirkwood/Kconfig"
  1637. source "arch/arm/mach-lpc32xx/Kconfig"
  1638. source "arch/arm/mach-mvebu/Kconfig"
  1639. source "arch/arm/mach-octeontx/Kconfig"
  1640. source "arch/arm/mach-octeontx2/Kconfig"
  1641. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1642. source "arch/arm/mach-imx/mx2/Kconfig"
  1643. source "arch/arm/mach-imx/mx3/Kconfig"
  1644. source "arch/arm/mach-imx/mx5/Kconfig"
  1645. source "arch/arm/mach-imx/mx6/Kconfig"
  1646. source "arch/arm/mach-imx/mx7/Kconfig"
  1647. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1648. source "arch/arm/mach-imx/imx8/Kconfig"
  1649. source "arch/arm/mach-imx/imx8m/Kconfig"
  1650. source "arch/arm/mach-imx/imxrt/Kconfig"
  1651. source "arch/arm/mach-imx/mxs/Kconfig"
  1652. source "arch/arm/mach-omap2/Kconfig"
  1653. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1654. source "arch/arm/mach-orion5x/Kconfig"
  1655. source "arch/arm/mach-owl/Kconfig"
  1656. source "arch/arm/mach-rmobile/Kconfig"
  1657. source "arch/arm/mach-meson/Kconfig"
  1658. source "arch/arm/mach-mediatek/Kconfig"
  1659. source "arch/arm/mach-qemu/Kconfig"
  1660. source "arch/arm/mach-rockchip/Kconfig"
  1661. source "arch/arm/mach-s5pc1xx/Kconfig"
  1662. source "arch/arm/mach-snapdragon/Kconfig"
  1663. source "arch/arm/mach-socfpga/Kconfig"
  1664. source "arch/arm/mach-sti/Kconfig"
  1665. source "arch/arm/mach-stm32/Kconfig"
  1666. source "arch/arm/mach-stm32mp/Kconfig"
  1667. source "arch/arm/mach-sunxi/Kconfig"
  1668. source "arch/arm/mach-tegra/Kconfig"
  1669. source "arch/arm/mach-u8500/Kconfig"
  1670. source "arch/arm/mach-uniphier/Kconfig"
  1671. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1672. source "arch/arm/mach-zynq/Kconfig"
  1673. source "arch/arm/mach-zynqmp/Kconfig"
  1674. source "arch/arm/mach-versal/Kconfig"
  1675. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1676. source "arch/arm/cpu/armv7/Kconfig"
  1677. source "arch/arm/cpu/armv8/Kconfig"
  1678. source "arch/arm/mach-imx/Kconfig"
  1679. source "arch/arm/mach-nexell/Kconfig"
  1680. source "board/armltd/total_compute/Kconfig"
  1681. source "board/bosch/shc/Kconfig"
  1682. source "board/bosch/guardian/Kconfig"
  1683. source "board/CarMediaLab/flea3/Kconfig"
  1684. source "board/Marvell/aspenite/Kconfig"
  1685. source "board/Marvell/gplugd/Kconfig"
  1686. source "board/Marvell/octeontx/Kconfig"
  1687. source "board/Marvell/octeontx2/Kconfig"
  1688. source "board/armadeus/apf27/Kconfig"
  1689. source "board/armltd/vexpress/Kconfig"
  1690. source "board/armltd/vexpress64/Kconfig"
  1691. source "board/cortina/presidio-asic/Kconfig"
  1692. source "board/broadcom/bcm23550_w1d/Kconfig"
  1693. source "board/broadcom/bcm28155_ap/Kconfig"
  1694. source "board/broadcom/bcm963158/Kconfig"
  1695. source "board/broadcom/bcm968360bg/Kconfig"
  1696. source "board/broadcom/bcm968580xref/Kconfig"
  1697. source "board/broadcom/bcmcygnus/Kconfig"
  1698. source "board/broadcom/bcmnsp/Kconfig"
  1699. source "board/broadcom/bcmns2/Kconfig"
  1700. source "board/broadcom/bcmns3/Kconfig"
  1701. source "board/cavium/thunderx/Kconfig"
  1702. source "board/cirrus/edb93xx/Kconfig"
  1703. source "board/eets/pdu001/Kconfig"
  1704. source "board/emulation/qemu-arm/Kconfig"
  1705. source "board/freescale/ls2080a/Kconfig"
  1706. source "board/freescale/ls2080aqds/Kconfig"
  1707. source "board/freescale/ls2080ardb/Kconfig"
  1708. source "board/freescale/ls1088a/Kconfig"
  1709. source "board/freescale/ls1028a/Kconfig"
  1710. source "board/freescale/ls1021aqds/Kconfig"
  1711. source "board/freescale/ls1043aqds/Kconfig"
  1712. source "board/freescale/ls1021atwr/Kconfig"
  1713. source "board/freescale/ls1021atsn/Kconfig"
  1714. source "board/freescale/ls1021aiot/Kconfig"
  1715. source "board/freescale/ls1046aqds/Kconfig"
  1716. source "board/freescale/ls1043ardb/Kconfig"
  1717. source "board/freescale/ls1046ardb/Kconfig"
  1718. source "board/freescale/ls1046afrwy/Kconfig"
  1719. source "board/freescale/ls1012aqds/Kconfig"
  1720. source "board/freescale/ls1012ardb/Kconfig"
  1721. source "board/freescale/ls1012afrdm/Kconfig"
  1722. source "board/freescale/lx2160a/Kconfig"
  1723. source "board/freescale/mx35pdk/Kconfig"
  1724. source "board/freescale/s32v234evb/Kconfig"
  1725. source "board/grinn/chiliboard/Kconfig"
  1726. source "board/hisilicon/hikey/Kconfig"
  1727. source "board/hisilicon/hikey960/Kconfig"
  1728. source "board/hisilicon/poplar/Kconfig"
  1729. source "board/isee/igep003x/Kconfig"
  1730. source "board/myir/mys_6ulx/Kconfig"
  1731. source "board/spear/spear300/Kconfig"
  1732. source "board/spear/spear310/Kconfig"
  1733. source "board/spear/spear320/Kconfig"
  1734. source "board/spear/spear600/Kconfig"
  1735. source "board/spear/x600/Kconfig"
  1736. source "board/st/stv0991/Kconfig"
  1737. source "board/tcl/sl50/Kconfig"
  1738. source "board/toradex/colibri_pxa270/Kconfig"
  1739. source "board/variscite/dart_6ul/Kconfig"
  1740. source "board/vscom/baltos/Kconfig"
  1741. source "board/phytium/durian/Kconfig"
  1742. source "board/xen/xenguest_arm64/Kconfig"
  1743. source "arch/arm/Kconfig.debug"
  1744. endmenu
  1745. config SPL_LDSCRIPT
  1746. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1747. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1748. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64