snapper9260.c 3.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Bluewater Systems Snapper 9260/9G20 modules
  4. *
  5. * (C) Copyright 2011 Bluewater Systems
  6. * Author: Andre Renaud <andre@bluewatersys.com>
  7. * Author: Ryan Mallon <ryan@bluewatersys.com>
  8. */
  9. #include <common.h>
  10. #include <dm.h>
  11. #include <init.h>
  12. #include <asm/io.h>
  13. #include <asm/gpio.h>
  14. #include <asm/mach-types.h>
  15. #include <asm/arch/at91sam9260_matrix.h>
  16. #include <asm/arch/at91sam9_smc.h>
  17. #include <asm/arch/at91_common.h>
  18. #include <asm/arch/clk.h>
  19. #include <asm/arch/gpio.h>
  20. #include <asm/arch/atmel_serial.h>
  21. #include <net.h>
  22. #include <netdev.h>
  23. #include <i2c.h>
  24. #include <pca953x.h>
  25. #include <linux/delay.h>
  26. DECLARE_GLOBAL_DATA_PTR;
  27. /* IO Expander pins */
  28. #define IO_EXP_ETH_RESET (0 << 1)
  29. #define IO_EXP_ETH_POWER (1 << 1)
  30. static void macb_hw_init(void)
  31. {
  32. struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
  33. at91_periph_clk_enable(ATMEL_ID_EMAC0);
  34. /* Disable pull-ups to prevent PHY going into test mode */
  35. writel(pin_to_mask(AT91_PIN_PA14) |
  36. pin_to_mask(AT91_PIN_PA15) |
  37. pin_to_mask(AT91_PIN_PA18),
  38. &pioa->pudr);
  39. /* Power down ethernet */
  40. pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT);
  41. pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1);
  42. /* Hold ethernet in reset */
  43. pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT);
  44. pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0);
  45. /* Enable ethernet power */
  46. pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0);
  47. at91_phy_reset();
  48. /* Bring the ethernet out of reset */
  49. pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1);
  50. /* The phy internal reset take 21ms */
  51. udelay(21 * 1000);
  52. /* Re-enable pull-up */
  53. writel(pin_to_mask(AT91_PIN_PA14) |
  54. pin_to_mask(AT91_PIN_PA15) |
  55. pin_to_mask(AT91_PIN_PA18),
  56. &pioa->puer);
  57. at91_macb_hw_init();
  58. }
  59. static void nand_hw_init(void)
  60. {
  61. struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  62. struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  63. unsigned long csa;
  64. /* Enable CS3 as NAND/SmartMedia */
  65. csa = readl(&matrix->ebicsa);
  66. csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  67. writel(csa, &matrix->ebicsa);
  68. /* Configure SMC CS3 for NAND/SmartMedia */
  69. writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
  70. AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
  71. &smc->cs[3].setup);
  72. writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
  73. AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
  74. &smc->cs[3].pulse);
  75. writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
  76. &smc->cs[3].cycle);
  77. writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  78. AT91_SMC_MODE_EXNW_DISABLE |
  79. AT91_SMC_MODE_DBW_8 |
  80. AT91_SMC_MODE_TDF_CYCLE(3),
  81. &smc->cs[3].mode);
  82. /* Configure RDY/BSY */
  83. gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand_rdy");
  84. gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
  85. /* Enable NandFlash */
  86. gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand_ce");
  87. gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  88. }
  89. int board_init(void)
  90. {
  91. at91_periph_clk_enable(ATMEL_ID_PIOA);
  92. at91_periph_clk_enable(ATMEL_ID_PIOB);
  93. at91_periph_clk_enable(ATMEL_ID_PIOC);
  94. /* The mach-type is the same for both Snapper 9260 and 9G20 */
  95. gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
  96. /* Address of boot parameters */
  97. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  98. /* Initialise peripherals */
  99. at91_seriald_hw_init();
  100. i2c_set_bus_num(0);
  101. nand_hw_init();
  102. macb_hw_init();
  103. return 0;
  104. }
  105. int board_eth_init(struct bd_info *bis)
  106. {
  107. return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
  108. }
  109. int dram_init(void)
  110. {
  111. gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
  112. CONFIG_SYS_SDRAM_SIZE);
  113. return 0;
  114. }
  115. void reset_phy(void)
  116. {
  117. }
  118. static struct atmel_serial_platdata at91sam9260_serial_plat = {
  119. .base_addr = ATMEL_BASE_DBGU,
  120. };
  121. U_BOOT_DEVICE(at91sam9260_serial) = {
  122. .name = "serial_atmel",
  123. .platdata = &at91sam9260_serial_plat,
  124. };