bat_rw.c 4.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002
  4. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  5. */
  6. #include <common.h>
  7. #include <asm/processor.h>
  8. #include <asm/mmu.h>
  9. #include <asm/io.h>
  10. #include <linux/compiler.h>
  11. #ifdef CONFIG_ADDR_MAP
  12. #include <addr_map.h>
  13. #endif
  14. DECLARE_GLOBAL_DATA_PTR;
  15. int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower)
  16. {
  17. __maybe_unused int batn = -1;
  18. sync();
  19. switch (bat) {
  20. case DBAT0:
  21. mtspr (DBAT0L, lower);
  22. mtspr (DBAT0U, upper);
  23. batn = 0;
  24. break;
  25. case IBAT0:
  26. mtspr (IBAT0L, lower);
  27. mtspr (IBAT0U, upper);
  28. break;
  29. case DBAT1:
  30. mtspr (DBAT1L, lower);
  31. mtspr (DBAT1U, upper);
  32. batn = 1;
  33. break;
  34. case IBAT1:
  35. mtspr (IBAT1L, lower);
  36. mtspr (IBAT1U, upper);
  37. break;
  38. case DBAT2:
  39. mtspr (DBAT2L, lower);
  40. mtspr (DBAT2U, upper);
  41. batn = 2;
  42. break;
  43. case IBAT2:
  44. mtspr (IBAT2L, lower);
  45. mtspr (IBAT2U, upper);
  46. break;
  47. case DBAT3:
  48. mtspr (DBAT3L, lower);
  49. mtspr (DBAT3U, upper);
  50. batn = 3;
  51. break;
  52. case IBAT3:
  53. mtspr (IBAT3L, lower);
  54. mtspr (IBAT3U, upper);
  55. break;
  56. #ifdef CONFIG_HIGH_BATS
  57. case DBAT4:
  58. mtspr (DBAT4L, lower);
  59. mtspr (DBAT4U, upper);
  60. batn = 4;
  61. break;
  62. case IBAT4:
  63. mtspr (IBAT4L, lower);
  64. mtspr (IBAT4U, upper);
  65. break;
  66. case DBAT5:
  67. mtspr (DBAT5L, lower);
  68. mtspr (DBAT5U, upper);
  69. batn = 5;
  70. break;
  71. case IBAT5:
  72. mtspr (IBAT5L, lower);
  73. mtspr (IBAT5U, upper);
  74. break;
  75. case DBAT6:
  76. mtspr (DBAT6L, lower);
  77. mtspr (DBAT6U, upper);
  78. batn = 6;
  79. break;
  80. case IBAT6:
  81. mtspr (IBAT6L, lower);
  82. mtspr (IBAT6U, upper);
  83. break;
  84. case DBAT7:
  85. mtspr (DBAT7L, lower);
  86. mtspr (DBAT7U, upper);
  87. batn = 7;
  88. break;
  89. case IBAT7:
  90. mtspr (IBAT7L, lower);
  91. mtspr (IBAT7U, upper);
  92. break;
  93. #endif
  94. default:
  95. return (-1);
  96. }
  97. #ifdef CONFIG_ADDR_MAP
  98. if ((gd->flags & GD_FLG_RELOC) && (batn >= 0)) {
  99. phys_size_t size;
  100. if (!BATU_VALID(upper))
  101. size = 0;
  102. else
  103. size = BATU_SIZE(upper);
  104. addrmap_set_entry(BATU_VADDR(upper), BATL_PADDR(lower),
  105. size, batn);
  106. }
  107. #endif
  108. sync();
  109. isync();
  110. return (0);
  111. }
  112. int read_bat (ppc_bat_t bat, unsigned long *upper, unsigned long *lower)
  113. {
  114. unsigned long register u;
  115. unsigned long register l;
  116. switch (bat) {
  117. case DBAT0:
  118. l = mfspr (DBAT0L);
  119. u = mfspr (DBAT0U);
  120. break;
  121. case IBAT0:
  122. l = mfspr (IBAT0L);
  123. u = mfspr (IBAT0U);
  124. break;
  125. case DBAT1:
  126. l = mfspr (DBAT1L);
  127. u = mfspr (DBAT1U);
  128. break;
  129. case IBAT1:
  130. l = mfspr (IBAT1L);
  131. u = mfspr (IBAT1U);
  132. break;
  133. case DBAT2:
  134. l = mfspr (DBAT2L);
  135. u = mfspr (DBAT2U);
  136. break;
  137. case IBAT2:
  138. l = mfspr (IBAT2L);
  139. u = mfspr (IBAT2U);
  140. break;
  141. case DBAT3:
  142. l = mfspr (DBAT3L);
  143. u = mfspr (DBAT3U);
  144. break;
  145. case IBAT3:
  146. l = mfspr (IBAT3L);
  147. u = mfspr (IBAT3U);
  148. break;
  149. #ifdef CONFIG_HIGH_BATS
  150. case DBAT4:
  151. l = mfspr (DBAT4L);
  152. u = mfspr (DBAT4U);
  153. break;
  154. case IBAT4:
  155. l = mfspr (IBAT4L);
  156. u = mfspr (IBAT4U);
  157. break;
  158. case DBAT5:
  159. l = mfspr (DBAT5L);
  160. u = mfspr (DBAT5U);
  161. break;
  162. case IBAT5:
  163. l = mfspr (IBAT5L);
  164. u = mfspr (IBAT5U);
  165. break;
  166. case DBAT6:
  167. l = mfspr (DBAT6L);
  168. u = mfspr (DBAT6U);
  169. break;
  170. case IBAT6:
  171. l = mfspr (IBAT6L);
  172. u = mfspr (IBAT6U);
  173. break;
  174. case DBAT7:
  175. l = mfspr (DBAT7L);
  176. u = mfspr (DBAT7U);
  177. break;
  178. case IBAT7:
  179. l = mfspr (IBAT7L);
  180. u = mfspr (IBAT7U);
  181. break;
  182. #endif
  183. default:
  184. return (-1);
  185. }
  186. *upper = u;
  187. *lower = l;
  188. return (0);
  189. }
  190. void print_bats(void)
  191. {
  192. printf("BAT registers:\n");
  193. printf ("\tIBAT0L = 0x%08X ", mfspr (IBAT0L));
  194. printf ("\tIBAT0U = 0x%08X\n", mfspr (IBAT0U));
  195. printf ("\tDBAT0L = 0x%08X ", mfspr (DBAT0L));
  196. printf ("\tDBAT0U = 0x%08X\n", mfspr (DBAT0U));
  197. printf ("\tIBAT1L = 0x%08X ", mfspr (IBAT1L));
  198. printf ("\tIBAT1U = 0x%08X\n", mfspr (IBAT1U));
  199. printf ("\tDBAT1L = 0x%08X ", mfspr (DBAT1L));
  200. printf ("\tDBAT1U = 0x%08X\n", mfspr (DBAT1U));
  201. printf ("\tIBAT2L = 0x%08X ", mfspr (IBAT2L));
  202. printf ("\tIBAT2U = 0x%08X\n", mfspr (IBAT2U));
  203. printf ("\tDBAT2L = 0x%08X ", mfspr (DBAT2L));
  204. printf ("\tDBAT2U = 0x%08X\n", mfspr (DBAT2U));
  205. printf ("\tIBAT3L = 0x%08X ", mfspr (IBAT3L));
  206. printf ("\tIBAT3U = 0x%08X\n", mfspr (IBAT3U));
  207. printf ("\tDBAT3L = 0x%08X ", mfspr (DBAT3L));
  208. printf ("\tDBAT3U = 0x%08X\n", mfspr (DBAT3U));
  209. #ifdef CONFIG_HIGH_BATS
  210. printf ("\tIBAT4L = 0x%08X ", mfspr (IBAT4L));
  211. printf ("\tIBAT4U = 0x%08X\n", mfspr (IBAT4U));
  212. printf ("\tDBAT4L = 0x%08X ", mfspr (DBAT4L));
  213. printf ("\tDBAT4U = 0x%08X\n", mfspr (DBAT4U));
  214. printf ("\tIBAT5L = 0x%08X ", mfspr (IBAT5L));
  215. printf ("\tIBAT5U = 0x%08X\n", mfspr (IBAT5U));
  216. printf ("\tDBAT5L = 0x%08X ", mfspr (DBAT5L));
  217. printf ("\tDBAT5U = 0x%08X\n", mfspr (DBAT5U));
  218. printf ("\tIBAT6L = 0x%08X ", mfspr (IBAT6L));
  219. printf ("\tIBAT6U = 0x%08X\n", mfspr (IBAT6U));
  220. printf ("\tDBAT6L = 0x%08X ", mfspr (DBAT6L));
  221. printf ("\tDBAT6U = 0x%08X\n", mfspr (DBAT6U));
  222. printf ("\tIBAT7L = 0x%08X ", mfspr (IBAT7L));
  223. printf ("\tIBAT7U = 0x%08X\n", mfspr (IBAT7U));
  224. printf ("\tDBAT7L = 0x%08X ", mfspr (DBAT7L));
  225. printf ("\tDBAT7U = 0x%08X\n", mfspr (DBAT7U));
  226. #endif
  227. }