mpc8641_serdes.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2010 Freescale Semiconductor, Inc.
  4. */
  5. #include <config.h>
  6. #include <common.h>
  7. #include <log.h>
  8. #include <asm/io.h>
  9. #include <asm/immap_86xx.h>
  10. #include <asm/fsl_serdes.h>
  11. #define SRDS1_MAX_LANES 4
  12. #define SRDS2_MAX_LANES 4
  13. static u32 serdes1_prtcl_map, serdes2_prtcl_map;
  14. static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
  15. [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1},
  16. [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1},
  17. [0x5] = {PCIE1, PCIE1, PCIE1, PCIE1},
  18. [0x6] = {PCIE1, PCIE1, PCIE1, PCIE1},
  19. [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1},
  20. [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1},
  21. };
  22. static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
  23. [0x3] = {PCIE2, PCIE2, PCIE2, PCIE2},
  24. [0x5] = {SRIO1, SRIO1, SRIO1, SRIO1},
  25. [0x6] = {SRIO1, SRIO1, SRIO1, SRIO1},
  26. [0x7] = {SRIO1, SRIO1, SRIO1, SRIO1},
  27. [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1},
  28. [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1},
  29. [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1},
  30. [0xe] = {PCIE2, PCIE2, PCIE2, PCIE2},
  31. [0xf] = {PCIE2, PCIE2, PCIE2, PCIE2},
  32. };
  33. int is_serdes_configured(enum srds_prtcl device)
  34. {
  35. int ret;
  36. if (!(serdes1_prtcl_map & (1 << NONE)))
  37. fsl_serdes_init();
  38. ret = (1 << device) & serdes1_prtcl_map;
  39. if (ret)
  40. return ret;
  41. if (!(serdes2_prtcl_map & (1 << NONE)))
  42. fsl_serdes_init();
  43. return (1 << device) & serdes2_prtcl_map;
  44. }
  45. void fsl_serdes_init(void)
  46. {
  47. immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
  48. ccsr_gur_t *gur = &immap->im_gur;
  49. u32 pordevsr = in_be32(&gur->pordevsr);
  50. u32 srds_cfg = (pordevsr & MPC8641_PORDEVSR_IO_SEL) >>
  51. MPC8641_PORDEVSR_IO_SEL_SHIFT;
  52. int lane;
  53. if (serdes1_prtcl_map & (1 << NONE) &&
  54. serdes2_prtcl_map & (1 << NONE))
  55. return;
  56. debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
  57. if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
  58. printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
  59. return;
  60. }
  61. for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
  62. enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
  63. serdes1_prtcl_map |= (1 << lane_prtcl);
  64. }
  65. /* Set the first bit to indicate serdes has been initialized */
  66. serdes1_prtcl_map |= (1 << NONE);
  67. if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
  68. printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
  69. return;
  70. }
  71. for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
  72. enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
  73. serdes2_prtcl_map |= (1 << lane_prtcl);
  74. }
  75. /* Set the first bit to indicate serdes has been initialized */
  76. serdes2_prtcl_map |= (1 << NONE);
  77. }