cpu_init.c 1.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2004,2009-2011 Freescale Semiconductor, Inc.
  4. * Jeff Brown
  5. * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
  6. */
  7. /*
  8. * cpu_init.c - low level cpu init
  9. */
  10. #include <asm-offsets.h>
  11. #include <config.h>
  12. #include <common.h>
  13. #include <init.h>
  14. #include <mpc86xx.h>
  15. #include <asm/mmu.h>
  16. #include <asm/fsl_law.h>
  17. #include <asm/fsl_serdes.h>
  18. #include <asm/mp.h>
  19. extern void srio_init(void);
  20. DECLARE_GLOBAL_DATA_PTR;
  21. /*
  22. * Breathe some life into the CPU...
  23. *
  24. * Set up the memory map
  25. * initialize a bunch of registers
  26. */
  27. void cpu_init_f(void)
  28. {
  29. /* Pointer is writable since we allocated a register for it */
  30. gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
  31. /* Clear initial global data */
  32. memset ((void *) gd, 0, sizeof (gd_t));
  33. #ifdef CONFIG_FSL_LAW
  34. init_laws();
  35. #endif
  36. setup_bats();
  37. init_early_memctl_regs();
  38. #if defined(CONFIG_FSL_DMA)
  39. dma_init();
  40. #endif
  41. /* enable the timebase bit in HID0 */
  42. set_hid0(get_hid0() | 0x4000000);
  43. /* enable EMCP, SYNCBE | ABE bits in HID1 */
  44. set_hid1(get_hid1() | 0x80000C00);
  45. }
  46. /*
  47. * initialize higher level parts of CPU like timers
  48. */
  49. int cpu_init_r(void)
  50. {
  51. /* needs to be in ram since code uses global static vars */
  52. fsl_serdes_init();
  53. #ifdef CONFIG_SYS_SRIO
  54. srio_init();
  55. #endif
  56. #if defined(CONFIG_MP)
  57. setup_mp();
  58. #endif
  59. return 0;
  60. }
  61. #ifdef CONFIG_ADDR_MAP
  62. /* Initialize address mapping array */
  63. void init_addr_map(void)
  64. {
  65. int i;
  66. ppc_bat_t bat = DBAT0;
  67. phys_size_t size;
  68. unsigned long upper, lower;
  69. for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++, bat++) {
  70. if (read_bat(bat, &upper, &lower) != -1) {
  71. if (!BATU_VALID(upper))
  72. size = 0;
  73. else
  74. size = BATU_SIZE(upper);
  75. addrmap_set_entry(BATU_VADDR(upper), BATL_PADDR(lower),
  76. size, i);
  77. }
  78. #ifdef CONFIG_HIGH_BATS
  79. /* High bats are not contiguous with low BAT numbers */
  80. if (bat == DBAT3)
  81. bat = DBAT4 - 1;
  82. #endif
  83. }
  84. }
  85. #endif