u-boot-nand_spl.lds 1.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2006
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de
  5. *
  6. * Copyright 2009 Freescale Semiconductor, Inc.
  7. */
  8. #include "config.h"
  9. OUTPUT_ARCH(powerpc)
  10. SECTIONS
  11. {
  12. . = 0xfff00000;
  13. .text : {
  14. *(.text*)
  15. }
  16. _etext = .;
  17. .reloc : {
  18. _GOT2_TABLE_ = .;
  19. KEEP(*(.got2))
  20. KEEP(*(.got))
  21. _FIXUP_TABLE_ = .;
  22. KEEP(*(.fixup))
  23. }
  24. __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
  25. __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
  26. . = ALIGN(8);
  27. .data : {
  28. *(.rodata*)
  29. *(.data*)
  30. *(.sdata*)
  31. }
  32. _edata = .;
  33. .u_boot_list : {
  34. KEEP(*(SORT(.u_boot_list*)));
  35. }
  36. . = ALIGN(8);
  37. __init_begin = .;
  38. __init_end = .;
  39. _end = .;
  40. #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
  41. .bootpg ADDR(.text) + 0x1000 :
  42. {
  43. start.o (.bootpg)
  44. }
  45. #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
  46. #elif defined(CONFIG_FSL_ELBC)
  47. #define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
  48. #else
  49. #error unknown NAND controller
  50. #endif
  51. .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
  52. KEEP(*(.resetvec))
  53. } = 0xffff
  54. __bss_start = .;
  55. .bss : {
  56. *(.sbss*)
  57. *(.bss*)
  58. }
  59. __bss_end = .;
  60. }
  61. ASSERT(__init_end <= (0xfff00000 + RESET_VECTOR_OFFSET), "NAND bootstrap too big");