p1023_serdes.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2010-2011 Freescale Semiconductor, Inc.
  4. * Author: Roy Zang <tie-fei.zang@freescale.com>
  5. */
  6. #include <config.h>
  7. #include <common.h>
  8. #include <log.h>
  9. #include <asm/io.h>
  10. #include <asm/immap_85xx.h>
  11. #include <asm/fsl_serdes.h>
  12. #define SRDS1_MAX_LANES 4
  13. static u32 serdes1_prtcl_map;
  14. static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
  15. [0x00] = {PCIE1, PCIE2, NONE, NONE},
  16. [0x01] = {PCIE1, PCIE2, PCIE3, NONE},
  17. [0x02] = {PCIE1, PCIE2, PCIE3, SGMII_FM1_DTSEC2},
  18. [0x03] = {PCIE1, PCIE2, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2},
  19. };
  20. int is_serdes_configured(enum srds_prtcl device)
  21. {
  22. int ret;
  23. if (!(serdes1_prtcl_map & (1 << NONE)))
  24. fsl_serdes_init();
  25. ret = (1 << device) & serdes1_prtcl_map;
  26. return ret;
  27. }
  28. void fsl_serdes_init(void)
  29. {
  30. ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  31. u32 pordevsr = in_be32(&gur->pordevsr);
  32. u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
  33. MPC85xx_PORDEVSR_IO_SEL_SHIFT;
  34. int lane;
  35. if (serdes1_prtcl_map & (1 << NONE))
  36. return;
  37. debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
  38. if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
  39. printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
  40. return;
  41. }
  42. for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
  43. enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
  44. serdes1_prtcl_map |= (1 << lane_prtcl);
  45. }
  46. /* Set the first bit to indicate serdes has been initialized */
  47. serdes1_prtcl_map |= (1 << NONE);
  48. }