mpc8568_serdes.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2010 Freescale Semiconductor, Inc.
  4. */
  5. #include <config.h>
  6. #include <common.h>
  7. #include <log.h>
  8. #include <asm/io.h>
  9. #include <asm/immap_85xx.h>
  10. #include <asm/fsl_serdes.h>
  11. #define SRDS1_MAX_LANES 8
  12. static u32 serdes1_prtcl_map;
  13. static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
  14. [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
  15. [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
  16. [0x5] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
  17. [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
  18. [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
  19. };
  20. int is_serdes_configured(enum srds_prtcl prtcl)
  21. {
  22. if (!(serdes1_prtcl_map & (1 << NONE)))
  23. fsl_serdes_init();
  24. return (1 << prtcl) & serdes1_prtcl_map;
  25. }
  26. void fsl_serdes_init(void)
  27. {
  28. ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  29. u32 pordevsr = in_be32(&gur->pordevsr);
  30. u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
  31. MPC85xx_PORDEVSR_IO_SEL_SHIFT;
  32. int lane;
  33. if (serdes1_prtcl_map & (1 << NONE))
  34. return;
  35. debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
  36. if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
  37. printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
  38. return;
  39. }
  40. for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
  41. enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
  42. serdes1_prtcl_map |= (1 << lane_prtcl);
  43. }
  44. /* Set the first bit to indicate serdes has been initialized */
  45. serdes1_prtcl_map |= (1 << NONE);
  46. }