fsl_corenet_serdes.h 634 B

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2009-2010 Freescale Semiconductor, Inc.
  4. *
  5. * Author: Roy Zang <tie-fei.zang@freescale.com>
  6. */
  7. #ifndef __FSL_CORENET_SERDES_H
  8. #define __FSL_CORENET_SERDES_H
  9. enum srds_bank {
  10. FSL_SRDS_BANK_1 = 0,
  11. FSL_SRDS_BANK_2 = 1,
  12. FSL_SRDS_BANK_3 = 2,
  13. };
  14. int is_serdes_prtcl_valid(u32 prtcl);
  15. int serdes_get_lane_idx(int lane);
  16. int serdes_get_bank_by_lane(int lane);
  17. int serdes_lane_enabled(int lane);
  18. enum srds_prtcl serdes_get_prtcl(int cfg, int lane);
  19. #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8
  20. extern uint16_t srds_lpd_b[SRDS_MAX_BANK];
  21. #endif
  22. #endif /* __FSL_CORENET_SERDES_H */