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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
  4. * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
  5. *
  6. * Copyright 2010-2012 Freescale Semiconductor, Inc.
  7. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  8. */
  9. #include <common.h>
  10. #include <asm-offsets.h>
  11. #include <config.h>
  12. #include <timestamp.h>
  13. #include "version.h"
  14. #include <asm/cache.h>
  15. #define _START _start
  16. #define _FAULT _fault
  17. #define SAVE_ALL \
  18. move.w #0x2700,%sr; /* disable intrs */ \
  19. subl #60,%sp; /* space for 15 regs */ \
  20. moveml %d0-%d7/%a0-%a6,%sp@;
  21. #define RESTORE_ALL \
  22. moveml %sp@,%d0-%d7/%a0-%a6; \
  23. addl #60,%sp; /* space for 15 regs */ \
  24. rte;
  25. #if defined(CONFIG_SERIAL_BOOT)
  26. #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
  27. CONFIG_SYS_INIT_RAM_ADDR)
  28. #define ASM_DRAMINIT_N (asm_dram_init - CONFIG_SYS_TEXT_BASE)
  29. #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
  30. CONFIG_SYS_INIT_RAM_ADDR)
  31. #endif
  32. .text
  33. /*
  34. * Vector table. This is used for initial platform startup.
  35. * These vectors are to catch any un-intended traps.
  36. */
  37. _vectors:
  38. #if defined(CONFIG_SERIAL_BOOT)
  39. INITSP: .long 0 /* Initial SP */
  40. #ifdef CONFIG_CF_SBF
  41. INITPC: .long ASM_DRAMINIT /* Initial PC */
  42. #endif
  43. #ifdef CONFIG_SYS_NAND_BOOT
  44. INITPC: .long ASM_DRAMINIT_N /* Initial PC */
  45. #endif
  46. #else
  47. INITSP: .long 0 /* Initial SP */
  48. INITPC: .long _START /* Initial PC */
  49. #endif
  50. vector02_0F:
  51. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  52. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  53. /* Reserved */
  54. vector10_17:
  55. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  56. vector18_1F:
  57. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  58. #if !defined(CONFIG_SERIAL_BOOT)
  59. /* TRAP #0 - #15 */
  60. vector20_2F:
  61. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  62. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  63. /* Reserved */
  64. vector30_3F:
  65. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  66. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  67. vector64_127:
  68. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  69. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  70. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  71. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  72. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  73. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  74. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  75. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  76. vector128_191:
  77. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  78. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  79. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  80. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  81. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  82. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  83. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  84. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  85. vector192_255:
  86. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  87. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  88. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  89. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  90. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  91. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  92. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  93. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  94. #endif
  95. #if defined(CONFIG_SERIAL_BOOT)
  96. /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
  97. asm_sbf_img_hdr:
  98. .long 0x00000000 /* checksum, not yet implemented */
  99. .long 0x00040000 /* image length */
  100. .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
  101. asm_dram_init:
  102. move.w #0x2700,%sr /* Mask off Interrupt */
  103. #ifdef CONFIG_SYS_NAND_BOOT
  104. /* for assembly stack */
  105. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
  106. movec %d0, %RAMBAR1
  107. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
  108. clr.l %sp@-
  109. #endif
  110. #ifdef CONFIG_CF_SBF
  111. move.l #CONFIG_SYS_INIT_RAM_ADDR, %d0
  112. movec %d0, %VBR
  113. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
  114. movec %d0, %RAMBAR1
  115. /* initialize general use internal ram */
  116. move.l #0, %d0
  117. move.l #(ICACHE_STATUS), %a1 /* icache */
  118. move.l #(DCACHE_STATUS), %a2 /* dcache */
  119. move.l %d0, (%a1)
  120. move.l %d0, (%a2)
  121. /* invalidate and disable cache */
  122. move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
  123. movec %d0, %CACR /* Invalidate cache */
  124. move.l #0, %d0
  125. movec %d0, %ACR0
  126. movec %d0, %ACR1
  127. movec %d0, %ACR2
  128. movec %d0, %ACR3
  129. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
  130. clr.l %sp@-
  131. #ifdef CONFIG_SYS_CS0_BASE
  132. /* Must disable global address */
  133. move.l #0xFC008000, %a1
  134. move.l #(CONFIG_SYS_CS0_BASE), (%a1)
  135. move.l #0xFC008008, %a1
  136. move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
  137. move.l #0xFC008004, %a1
  138. move.l #(CONFIG_SYS_CS0_MASK), (%a1)
  139. #endif
  140. #endif /* CONFIG_CF_SBF */
  141. #ifdef CONFIG_MCF5441x
  142. /* TC: enable all peripherals,
  143. in the future only enable certain peripherals */
  144. move.l #0xFC04002D, %a1
  145. #if defined(CONFIG_CF_SBF)
  146. move.b #23, (%a1) /* dspi */
  147. #endif
  148. #endif /* CONFIG_MCF5441x */
  149. /* mandatory board level ddr-sdram init,
  150. * for both 5441x and 5445x
  151. */
  152. bsr sbf_dram_init
  153. #ifdef CONFIG_CF_SBF
  154. /*
  155. * DSPI Initialization
  156. * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
  157. * a1 - dspi status
  158. * a2 - dtfr
  159. * a3 - drfr
  160. * a4 - Dst addr
  161. */
  162. /* Enable pins for DSPI mode - chip-selects are enabled later */
  163. asm_dspi_init:
  164. #ifdef CONFIG_MCF5441x
  165. move.l #0xEC09404E, %a1
  166. move.l #0xEC09404F, %a2
  167. move.b #0xFF, (%a1)
  168. move.b #0x80, (%a2)
  169. #endif
  170. #ifdef CONFIG_MCF5445x
  171. move.l #0xFC0A4063, %a0
  172. move.b #0x7F, (%a0)
  173. #endif
  174. /* Configure DSPI module */
  175. move.l #0xFC05C000, %a0
  176. move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
  177. move.l #0xFC05C00C, %a0
  178. #ifdef CONFIG_MCF5441x
  179. move.l #0x3E000016, (%a0)
  180. #endif
  181. #ifdef CONFIG_MCF5445x
  182. move.l #0x3E000011, (%a0)
  183. #endif
  184. move.l #0xFC05C034, %a2 /* dtfr */
  185. move.l #0xFC05C03B, %a3 /* drfr */
  186. move.l #(ASM_SBF_IMG_HDR + 4), %a1
  187. move.l (%a1)+, %d5
  188. move.l (%a1), %a4
  189. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
  190. move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
  191. move.l #0xFC05C02C, %a1 /* dspi status */
  192. /* Issue commands and address */
  193. move.l #0x8002000B, %d2 /* Fast Read Cmd */
  194. jsr asm_dspi_wr_status
  195. jsr asm_dspi_rd_status
  196. move.l #0x80020000, %d2 /* Address byte 2 */
  197. jsr asm_dspi_wr_status
  198. jsr asm_dspi_rd_status
  199. move.l #0x80020000, %d2 /* Address byte 1 */
  200. jsr asm_dspi_wr_status
  201. jsr asm_dspi_rd_status
  202. move.l #0x80020000, %d2 /* Address byte 0 */
  203. jsr asm_dspi_wr_status
  204. jsr asm_dspi_rd_status
  205. move.l #0x80020000, %d2 /* Dummy Wr and Rd */
  206. jsr asm_dspi_wr_status
  207. jsr asm_dspi_rd_status
  208. /* Transfer serial boot header to sram */
  209. asm_dspi_rd_loop1:
  210. move.l #0x80020000, %d2
  211. jsr asm_dspi_wr_status
  212. jsr asm_dspi_rd_status
  213. move.b %d1, (%a0) /* read, copy to dst */
  214. add.l #1, %a0 /* inc dst by 1 */
  215. sub.l #1, %d4 /* dec cnt by 1 */
  216. bne asm_dspi_rd_loop1
  217. /* Transfer u-boot from serial flash to memory */
  218. asm_dspi_rd_loop2:
  219. move.l #0x80020000, %d2
  220. jsr asm_dspi_wr_status
  221. jsr asm_dspi_rd_status
  222. move.b %d1, (%a4) /* read, copy to dst */
  223. add.l #1, %a4 /* inc dst by 1 */
  224. sub.l #1, %d5 /* dec cnt by 1 */
  225. bne asm_dspi_rd_loop2
  226. move.l #0x00020000, %d2 /* Terminate */
  227. jsr asm_dspi_wr_status
  228. jsr asm_dspi_rd_status
  229. /* jump to memory and execute */
  230. move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
  231. jmp (%a0)
  232. asm_dspi_wr_status:
  233. move.l (%a1), %d0 /* status */
  234. and.l #0x0000F000, %d0
  235. cmp.l #0x00003000, %d0
  236. bgt asm_dspi_wr_status
  237. move.l %d2, (%a2)
  238. rts
  239. asm_dspi_rd_status:
  240. move.l (%a1), %d0 /* status */
  241. and.l #0x000000F0, %d0
  242. lsr.l #4, %d0
  243. cmp.l #0, %d0
  244. beq asm_dspi_rd_status
  245. move.b (%a3), %d1
  246. rts
  247. #endif /* CONFIG_CF_SBF */
  248. #ifdef CONFIG_SYS_NAND_BOOT
  249. /* copy 4 boot pages to dram as soon as possible */
  250. /* each page is 996 bytes (1056 total with 60 ECC bytes */
  251. move.l #0x00000000, %a1 /* src */
  252. move.l #CONFIG_SYS_TEXT_BASE, %a2 /* dst */
  253. move.l #0x3E0, %d0 /* sz in long */
  254. asm_boot_nand_copy:
  255. move.l (%a1)+, (%a2)+
  256. subq.l #1, %d0
  257. bne asm_boot_nand_copy
  258. /* jump to memory and execute */
  259. move.l #(asm_nand_init), %a0
  260. jmp (%a0)
  261. asm_nand_init:
  262. /* exit nand boot-mode */
  263. move.l #0xFC0FFF30, %a1
  264. or.l #0x00000040, %d1
  265. move.l %d1, (%a1)
  266. /* initialize general use internal ram */
  267. move.l #0, %d0
  268. move.l #(CACR_STATUS), %a1 /* CACR */
  269. move.l #(ICACHE_STATUS), %a2 /* icache */
  270. move.l #(DCACHE_STATUS), %a3 /* dcache */
  271. move.l %d0, (%a1)
  272. move.l %d0, (%a2)
  273. move.l %d0, (%a3)
  274. /* invalidate and disable cache */
  275. move.l #0x01004100, %d0 /* Invalidate cache cmd */
  276. movec %d0, %CACR /* Invalidate cache */
  277. move.l #0, %d0
  278. movec %d0, %ACR0
  279. movec %d0, %ACR1
  280. movec %d0, %ACR2
  281. movec %d0, %ACR3
  282. #ifdef CONFIG_SYS_CS0_BASE
  283. /* Must disable global address */
  284. move.l #0xFC008000, %a1
  285. move.l #(CONFIG_SYS_CS0_BASE), (%a1)
  286. move.l #0xFC008008, %a1
  287. move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
  288. move.l #0xFC008004, %a1
  289. move.l #(CONFIG_SYS_CS0_MASK), (%a1)
  290. #endif
  291. /* NAND port configuration */
  292. move.l #0xEC094048, %a1
  293. move.b #0xFD, (%a1)+
  294. move.b #0x5F, (%a1)+
  295. move.b #0x04, (%a1)+
  296. /* reset nand */
  297. move.l #0xFC0FFF38, %a1 /* isr */
  298. move.l #0x000e0000, (%a1)
  299. move.l #0xFC0FFF08, %a2
  300. move.l #0x00000000, (%a2)+ /* car */
  301. move.l #0x11000000, (%a2)+ /* rar */
  302. move.l #0x00000000, (%a2)+ /* rpt */
  303. move.l #0x00000000, (%a2)+ /* rai */
  304. move.l #0xFC0FFF2c, %a2 /* cfg */
  305. move.l #0x00000000, (%a2)+ /* secsz */
  306. move.l #0x000e0681, (%a2)+
  307. move.l #0xFC0FFF04, %a2 /* cmd2 */
  308. move.l #0xFF404001, (%a2)
  309. move.l #0x000e0000, (%a1)
  310. move.l #0x2000, %d1
  311. bsr asm_delay
  312. /* setup nand */
  313. move.l #0xFC0FFF00, %a1
  314. move.l #0x30700000, (%a1)+ /* cmd1 */
  315. move.l #0x007EF000, (%a1)+ /* cmd2 */
  316. move.l #0xFC0FFF2C, %a1
  317. move.l #0x00000841, (%a1)+ /* secsz */
  318. move.l #0x000e0681, (%a1)+ /* cfg */
  319. move.l #100, %d4 /* 100 pages ~200KB */
  320. move.l #4, %d2 /* start at 4 */
  321. move.l #0xFC0FFF04, %a0 /* cmd2 */
  322. move.l #0xFC0FFF0C, %a1 /* rar */
  323. move.l #(CONFIG_SYS_TEXT_BASE + 0xF80), %a2
  324. asm_nand_read:
  325. move.l #0x11000000, %d0 /* rar */
  326. or.l %d2, %d0
  327. move.l %d0, (%a1)
  328. add.l #1, %d2
  329. move.l (%a0), %d0 /* cmd2 */
  330. or.l #1, %d0
  331. move.l %d0, (%a0)
  332. move.l #0x200, %d1
  333. bsr asm_delay
  334. asm_nand_chk_status:
  335. move.l #0xFC0FFF38, %a4 /* isr */
  336. move.l (%a4), %d0
  337. and.l #0x40000000, %d0
  338. tst.l %d0
  339. beq asm_nand_chk_status
  340. move.l #0xFC0FFF38, %a4 /* isr */
  341. move.l (%a4), %d0
  342. or.l #0x000E0000, %d0
  343. move.l %d0, (%a4)
  344. move.l #0x200, %d3
  345. move.l #0xFC0FC000, %a3 /* buf 1 */
  346. asm_nand_copy:
  347. move.l (%a3)+, (%a2)+
  348. subq.l #1, %d3
  349. bgt asm_nand_copy
  350. subq.l #1, %d4
  351. bgt asm_nand_read
  352. /* jump to memory and execute */
  353. move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
  354. jmp (%a0)
  355. #endif /* CONFIG_SYS_NAND_BOOT */
  356. .globl asm_delay
  357. asm_delay:
  358. nop
  359. subq.l #1, %d1
  360. bne asm_delay
  361. rts
  362. #endif /* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
  363. .text
  364. . = 0x400
  365. .globl _start
  366. _start:
  367. #if !defined(CONFIG_SERIAL_BOOT)
  368. nop
  369. nop
  370. move.w #0x2700,%sr /* Mask off Interrupt */
  371. /* Set vector base register at the beginning of the Flash */
  372. move.l #CONFIG_SYS_FLASH_BASE, %d0
  373. movec %d0, %VBR
  374. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
  375. movec %d0, %RAMBAR1
  376. /* initialize general use internal ram */
  377. move.l #0, %d0
  378. move.l #(ICACHE_STATUS), %a1 /* icache */
  379. move.l #(DCACHE_STATUS), %a2 /* dcache */
  380. move.l %d0, (%a1)
  381. move.l %d0, (%a2)
  382. /* invalidate and disable cache */
  383. move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
  384. movec %d0, %CACR /* Invalidate cache */
  385. move.l #0, %d0
  386. movec %d0, %ACR0
  387. movec %d0, %ACR1
  388. movec %d0, %ACR2
  389. movec %d0, %ACR3
  390. #else
  391. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
  392. movec %d0, %RAMBAR1
  393. #endif
  394. /* put relocation table address to a5 */
  395. move.l #__got_start, %a5
  396. /* setup stack initially on top of internal static ram */
  397. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
  398. /*
  399. * if configured, malloc_f arena will be reserved first,
  400. * then (and always) gd struct space will be reserved
  401. */
  402. move.l %sp, -(%sp)
  403. move.l #board_init_f_alloc_reserve, %a1
  404. jsr (%a1)
  405. /* update stack and frame-pointers */
  406. move.l %d0, %sp
  407. move.l %sp, %fp
  408. /* initialize reserved area */
  409. move.l %d0, -(%sp)
  410. move.l #board_init_f_init_reserve, %a1
  411. jsr (%a1)
  412. /* run low-level CPU init code (from flash) */
  413. move.l #cpu_init_f, %a1
  414. jsr (%a1)
  415. /* run low-level board init code (from flash) */
  416. clr.l %sp@-
  417. move.l #board_init_f, %a1
  418. jsr (%a1)
  419. /* board_init_f() does not return */
  420. /******************************************************************************/
  421. /*
  422. * void relocate_code(addr_sp, gd, addr_moni)
  423. *
  424. * This "function" does not return, instead it continues in RAM
  425. * after relocating the monitor code.
  426. *
  427. * r3 = dest
  428. * r4 = src
  429. * r5 = length in bytes
  430. * r6 = cachelinesize
  431. */
  432. .globl relocate_code
  433. relocate_code:
  434. link.w %a6,#0
  435. move.l 8(%a6), %sp /* set new stack pointer */
  436. move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
  437. move.l 16(%a6), %a0 /* Save copy of Destination Address */
  438. move.l #CONFIG_SYS_MONITOR_BASE, %a1
  439. move.l #__init_end, %a2
  440. move.l %a0, %a3
  441. /* copy the code to RAM */
  442. 1:
  443. move.l (%a1)+, (%a3)+
  444. cmp.l %a1,%a2
  445. bgt.s 1b
  446. /*
  447. * We are done. Do not return, instead branch to second part of board
  448. * initialization, now running from RAM.
  449. */
  450. move.l %a0, %a1
  451. add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
  452. jmp (%a1)
  453. in_ram:
  454. clear_bss:
  455. /*
  456. * Now clear BSS segment
  457. */
  458. move.l %a0, %a1
  459. add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
  460. move.l %a0, %d1
  461. add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
  462. 6:
  463. clr.l (%a1)+
  464. cmp.l %a1,%d1
  465. bgt.s 6b
  466. /*
  467. * fix got table in RAM
  468. */
  469. move.l %a0, %a1
  470. add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
  471. move.l %a1,%a5 /* fix got pointer register a5 */
  472. move.l %a0, %a2
  473. add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
  474. 7:
  475. move.l (%a1),%d1
  476. sub.l #_start,%d1
  477. add.l %a0,%d1
  478. move.l %d1,(%a1)+
  479. cmp.l %a2, %a1
  480. bne 7b
  481. /* calculate relative jump to board_init_r in ram */
  482. move.l %a0, %a1
  483. add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
  484. /* set parameters for board_init_r */
  485. move.l %a0,-(%sp) /* dest_addr */
  486. move.l %d0,-(%sp) /* gd */
  487. jsr (%a1)
  488. /******************************************************************************/
  489. /* exception code */
  490. .globl _fault
  491. _fault:
  492. bra _fault
  493. .globl _exc_handler
  494. _exc_handler:
  495. SAVE_ALL
  496. movel %sp,%sp@-
  497. bsr exc_handler
  498. addql #4,%sp
  499. RESTORE_ALL
  500. .globl _int_handler
  501. _int_handler:
  502. SAVE_ALL
  503. movel %sp,%sp@-
  504. bsr int_handler
  505. addql #4,%sp
  506. RESTORE_ALL
  507. /******************************************************************************/
  508. .globl version_string
  509. version_string:
  510. .ascii U_BOOT_VERSION_STRING, "\0"
  511. .align 4