interrupts.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000-2004
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
  7. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  8. */
  9. #include <common.h>
  10. #include <irq_func.h>
  11. #include <watchdog.h>
  12. #include <asm/processor.h>
  13. #include <asm/immap.h>
  14. #include <asm/io.h>
  15. #ifdef CONFIG_M5272
  16. int interrupt_init(void)
  17. {
  18. intctrl_t *intp = (intctrl_t *) (MMAP_INTC);
  19. /* disable all external interrupts */
  20. out_be32(&intp->int_icr1, 0x88888888);
  21. out_be32(&intp->int_icr2, 0x88888888);
  22. out_be32(&intp->int_icr3, 0x88888888);
  23. out_be32(&intp->int_icr4, 0x88888888);
  24. out_be32(&intp->int_pitr, 0x00000000);
  25. /* initialize vector register */
  26. out_8(&intp->int_pivr, 0x40);
  27. enable_interrupts();
  28. return 0;
  29. }
  30. #if defined(CONFIG_MCFTMR)
  31. void dtimer_intr_setup(void)
  32. {
  33. intctrl_t *intp = (intctrl_t *) (CONFIG_SYS_INTR_BASE);
  34. clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK);
  35. setbits_be32(&intp->int_icr1, CONFIG_SYS_TMRINTR_PRI);
  36. }
  37. #endif /* CONFIG_MCFTMR */
  38. #endif /* CONFIG_M5272 */
  39. #if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \
  40. defined(CONFIG_M5271) || defined(CONFIG_M5275)
  41. int interrupt_init(void)
  42. {
  43. int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
  44. /* Make sure all interrupts are disabled */
  45. #if defined(CONFIG_M5208)
  46. out_be32(&intp->imrl0, 0xffffffff);
  47. out_be32(&intp->imrh0, 0xffffffff);
  48. #else
  49. setbits_be32(&intp->imrl0, 0x1);
  50. #endif
  51. enable_interrupts();
  52. return 0;
  53. }
  54. #if defined(CONFIG_MCFTMR)
  55. void dtimer_intr_setup(void)
  56. {
  57. int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
  58. out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
  59. clrbits_be32(&intp->imrl0, 0x00000001);
  60. clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK);
  61. }
  62. #endif /* CONFIG_MCFTMR */
  63. #endif /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
  64. #if defined(CONFIG_M5249) || defined(CONFIG_M5253)
  65. int interrupt_init(void)
  66. {
  67. enable_interrupts();
  68. return 0;
  69. }
  70. #if defined(CONFIG_MCFTMR)
  71. void dtimer_intr_setup(void)
  72. {
  73. mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
  74. mbar_writeByte(MCFSIM_TIMER2ICR, CONFIG_SYS_TMRINTR_PRI);
  75. }
  76. #endif /* CONFIG_MCFTMR */
  77. #endif /* CONFIG_M5249 || CONFIG_M5253 */