fdt-fixup.c 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016-2018 Socionext Inc.
  4. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  5. */
  6. #include <fdt_support.h>
  7. #include <fdtdec.h>
  8. #include <jffs2/load_kernel.h>
  9. #include <mtd_node.h>
  10. #include <linux/errno.h>
  11. #include <linux/kernel.h>
  12. #include <linux/printk.h>
  13. #include "soc-info.h"
  14. /*
  15. * The DRAM PHY requires 64 byte scratch area in each DRAM channel
  16. * for its dynamic PHY training feature.
  17. */
  18. static int uniphier_ld20_fdt_mem_rsv(void *fdt, struct bd_info *bd)
  19. {
  20. unsigned long rsv_addr;
  21. const unsigned long rsv_size = 64;
  22. int i, ret;
  23. if (!IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) ||
  24. uniphier_get_soc_id() != UNIPHIER_LD20_ID)
  25. return 0;
  26. for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) {
  27. if (!bd->bi_dram[i].size)
  28. continue;
  29. rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size;
  30. rsv_addr -= rsv_size;
  31. ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size);
  32. if (ret)
  33. return -ENOSPC;
  34. pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n",
  35. rsv_addr, rsv_size);
  36. }
  37. return 0;
  38. }
  39. int ft_board_setup(void *fdt, struct bd_info *bd)
  40. {
  41. static const struct node_info nodes[] = {
  42. { "socionext,uniphier-denali-nand-v5a", MTD_DEV_TYPE_NAND },
  43. { "socionext,uniphier-denali-nand-v5b", MTD_DEV_TYPE_NAND },
  44. };
  45. int ret;
  46. fdt_fixup_mtdparts(fdt, nodes, ARRAY_SIZE(nodes));
  47. ret = uniphier_ld20_fdt_mem_rsv(fdt, bd);
  48. if (ret)
  49. return ret;
  50. return 0;
  51. }