pl310.h 2.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2010
  4. * Texas Instruments, <www.ti.com>
  5. * Aneesh V <aneesh@ti.com>
  6. */
  7. #ifndef _PL310_H_
  8. #define _PL310_H_
  9. #include <linux/types.h>
  10. /* Register bit fields */
  11. #define PL310_AUX_CTRL_ASSOCIATIVITY_MASK (1 << 16)
  12. #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1)
  13. #define L2X0_STNDBY_MODE_EN (1 << 0)
  14. #define L2X0_CTRL_EN 1
  15. #define L310_SHARED_ATT_OVERRIDE_ENABLE (1 << 22)
  16. #define L310_AUX_CTRL_DATA_PREFETCH_MASK (1 << 28)
  17. #define L310_AUX_CTRL_INST_PREFETCH_MASK (1 << 29)
  18. #define L310_LATENCY_CTRL_SETUP(n) ((n) << 0)
  19. #define L310_LATENCY_CTRL_RD(n) ((n) << 4)
  20. #define L310_LATENCY_CTRL_WR(n) ((n) << 8)
  21. #define L2X0_CACHE_ID_PART_MASK (0xf << 6)
  22. #define L2X0_CACHE_ID_PART_L310 (3 << 6)
  23. #define L2X0_CACHE_ID_RTL_MASK 0x3f
  24. #define L2X0_CACHE_ID_RTL_R3P2 0x8
  25. struct pl310_regs {
  26. u32 pl310_cache_id;
  27. u32 pl310_cache_type;
  28. u32 pad1[62];
  29. u32 pl310_ctrl;
  30. u32 pl310_aux_ctrl;
  31. u32 pl310_tag_latency_ctrl;
  32. u32 pl310_data_latency_ctrl;
  33. u32 pad2[60];
  34. u32 pl310_event_cnt_ctrl;
  35. u32 pl310_event_cnt1_cfg;
  36. u32 pl310_event_cnt0_cfg;
  37. u32 pl310_event_cnt1_val;
  38. u32 pl310_event_cnt0_val;
  39. u32 pl310_intr_mask;
  40. u32 pl310_masked_intr_stat;
  41. u32 pl310_raw_intr_stat;
  42. u32 pl310_intr_clear;
  43. u32 pad3[323];
  44. u32 pl310_cache_sync;
  45. u32 pad4[15];
  46. u32 pl310_inv_line_pa;
  47. u32 pad5[2];
  48. u32 pl310_inv_way;
  49. u32 pad6[12];
  50. u32 pl310_clean_line_pa;
  51. u32 pad7[1];
  52. u32 pl310_clean_line_idx;
  53. u32 pl310_clean_way;
  54. u32 pad8[12];
  55. u32 pl310_clean_inv_line_pa;
  56. u32 pad9[1];
  57. u32 pl310_clean_inv_line_idx;
  58. u32 pl310_clean_inv_way;
  59. u32 pad10[64];
  60. u32 pl310_lockdown_dbase;
  61. u32 pl310_lockdown_ibase;
  62. u32 pad11[190];
  63. u32 pl310_addr_filter_start;
  64. u32 pl310_addr_filter_end;
  65. u32 pad12[190];
  66. u32 pl310_test_operation;
  67. u32 pad13[3];
  68. u32 pl310_line_data;
  69. u32 pad14[7];
  70. u32 pl310_line_tag;
  71. u32 pad15[3];
  72. u32 pl310_debug_ctrl;
  73. u32 pad16[7];
  74. u32 pl310_prefetch_ctrl;
  75. u32 pad17[7];
  76. u32 pl310_power_ctrl;
  77. };
  78. void pl310_inval_all(void);
  79. void pl310_clean_inval_all(void);
  80. void pl310_inval_range(u32 start, u32 end);
  81. void pl310_clean_inval_range(u32 start, u32 end);
  82. #endif