regs-uartapp.h 8.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Freescale MXS UARTAPP Register Definitions
  4. *
  5. * Copyright (C) 2013 Andreas Wass <andreas.wass@dalelven.com>
  6. *
  7. * Based on code from LTIB:
  8. * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  9. */
  10. #ifndef __ARCH_ARM___MXS_UARTAPP_H
  11. #define __ARCH_ARM___MXS_UARTAPP_H
  12. #include <asm/mach-imx/regs-common.h>
  13. #ifndef __ASSEMBLY__
  14. struct mxs_uartapp_regs {
  15. mxs_reg_32(hw_uartapp_ctrl0)
  16. mxs_reg_32(hw_uartapp_ctrl1)
  17. mxs_reg_32(hw_uartapp_ctrl2)
  18. mxs_reg_32(hw_uartapp_linectrl)
  19. mxs_reg_32(hw_uartapp_linectrl2)
  20. mxs_reg_32(hw_uartapp_intr)
  21. mxs_reg_32(hw_uartapp_data)
  22. mxs_reg_32(hw_uartapp_stat)
  23. mxs_reg_32(hw_uartapp_debug)
  24. mxs_reg_32(hw_uartapp_version)
  25. mxs_reg_32(hw_uartapp_autobaud)
  26. };
  27. #endif
  28. #define UARTAPP_CTRL0_SFTRST_MASK (1 << 31)
  29. #define UARTAPP_CTRL0_CLKGATE_MASK (1 << 30)
  30. #define UARTAPP_CTRL0_RUN_MASK (1 << 29)
  31. #define UARTAPP_CTRL0_RX_SOURCE_MASK (1 << 28)
  32. #define UARTAPP_CTRL0_RXTO_ENABLE_MASK (1 << 27)
  33. #define UARTAPP_CTRL0_RXTIMEOUT_OFFSET 16
  34. #define UARTAPP_CTRL0_RXTIMEOUT_MASK (0x7FF << 16)
  35. #define UARTAPP_CTRL0_XFER_COUNT_OFFSET 0
  36. #define UARTAPP_CTRL0_XFER_COUNT_MASK 0xFFFF
  37. #define UARTAPP_CTRL1_RUN_MASK (1 << 28)
  38. #define UARTAPP_CTRL1_XFER_COUNT_OFFSET 0
  39. #define UARTAPP_CTRL1_XFER_COUNT_MASK 0xFFFF
  40. #define UARTAPP_CTRL2_INVERT_RTS_MASK (1 << 31)
  41. #define UARTAPP_CTRL2_INVERT_CTS_MASK (1 << 30)
  42. #define UARTAPP_CTRL2_INVERT_TX_MASK (1 << 29)
  43. #define UARTAPP_CTRL2_INVERT_RX_MASK (1 << 28)
  44. #define UARTAPP_CTRL2_RTS_SEMAPHORE_MASK (1 << 27)
  45. #define UARTAPP_CTRL2_DMAONERR_MASK (1 << 26)
  46. #define UARTAPP_CTRL2_TXDMAE_MASK (1 << 25)
  47. #define UARTAPP_CTRL2_RXDMAE_MASK (1 << 24)
  48. #define UARTAPP_CTRL2_RXIFLSEL_OFFSET 20
  49. #define UARTAPP_CTRL2_RXIFLSEL_MASK (0x7 << 20)
  50. #define UARTAPP_CTRL2_RXIFLSEL_NOT_EMPTY (0x0 << 20)
  51. #define UARTAPP_CTRL2_RXIFLSEL_ONE_QUARTER (0x1 << 20)
  52. #define UARTAPP_CTRL2_RXIFLSEL_ONE_HALF (0x2 << 20)
  53. #define UARTAPP_CTRL2_RXIFLSEL_THREE_QUARTERS (0x3 << 20)
  54. #define UARTAPP_CTRL2_RXIFLSEL_SEVEN_EIGHTHS (0x4 << 20)
  55. #define UARTAPP_CTRL2_RXIFLSEL_INVALID5 (0x5 << 20)
  56. #define UARTAPP_CTRL2_RXIFLSEL_INVALID6 (0x6 << 20)
  57. #define UARTAPP_CTRL2_RXIFLSEL_INVALID7 (0x7 << 20)
  58. #define UARTAPP_CTRL2_TXIFLSEL_OFFSET 16
  59. #define UARTAPP_CTRL2_TXIFLSEL_MASK (0x7 << 16)
  60. #define UARTAPP_CTRL2_TXIFLSEL_EMPTY (0x0 << 16)
  61. #define UARTAPP_CTRL2_TXIFLSEL_ONE_QUARTER (0x1 << 16)
  62. #define UARTAPP_CTRL2_TXIFLSEL_ONE_HALF (0x2 << 16)
  63. #define UARTAPP_CTRL2_TXIFLSEL_THREE_QUARTERS (0x3 << 16)
  64. #define UARTAPP_CTRL2_TXIFLSEL_SEVEN_EIGHTHS (0x4 << 16)
  65. #define UARTAPP_CTRL2_TXIFLSEL_INVALID5 (0x5 << 16)
  66. #define UARTAPP_CTRL2_TXIFLSEL_INVALID6 (0x6 << 16)
  67. #define UARTAPP_CTRL2_TXIFLSEL_INVALID7 (0x7 << 16)
  68. #define UARTAPP_CTRL2_CTSEN_MASK (1 << 15)
  69. #define UARTAPP_CTRL2_RTSEN_MASK (1 << 14)
  70. #define UARTAPP_CTRL2_OUT2_MASK (1 << 13)
  71. #define UARTAPP_CTRL2_OUT1_MASK (1 << 12)
  72. #define UARTAPP_CTRL2_RTS_MASK (1 << 11)
  73. #define UARTAPP_CTRL2_DTR_MASK (1 << 10)
  74. #define UARTAPP_CTRL2_RXE_MASK (1 << 9)
  75. #define UARTAPP_CTRL2_TXE_MASK (1 << 8)
  76. #define UARTAPP_CTRL2_LBE_MASK (1 << 7)
  77. #define UARTAPP_CTRL2_USE_LCR2_MASK (1 << 6)
  78. #define UARTAPP_CTRL2_SIRLP_MASK (1 << 2)
  79. #define UARTAPP_CTRL2_SIREN_MASK (1 << 1)
  80. #define UARTAPP_CTRL2_UARTEN_MASK 0x01
  81. #define UARTAPP_LINECTRL_BAUD_DIVINT_OFFSET 16
  82. #define UARTAPP_LINECTRL_BAUD_DIVINT_MASK (0xFFFF << 16)
  83. #define UARTAPP_LINECTRL_EXTRACT_BAUD_DIVINT_OFFSET 6
  84. #define UARTAPP_LINECTRL_BAUD_DIVFRAC_OFFSET 8
  85. #define UARTAPP_LINECTRL_BAUD_DIVFRAC_MASK (0x3F << 8)
  86. #define UARTAPP_LINECTRL_EXTRACT_BAUD_DIVFRAC_MASK 0x3F
  87. #define UARTAPP_LINECTRL_SPS_MASK (1 << 7)
  88. #define UARTAPP_LINECTRL_WLEN_OFFSET 5
  89. #define UARTAPP_LINECTRL_WLEN_MASK (0x03 << 5)
  90. #define UARTAPP_LINECTRL_WLEN_5BITS (0x00 << 5)
  91. #define UARTAPP_LINECTRL_WLEN_6BITS (0x01 << 5)
  92. #define UARTAPP_LINECTRL_WLEN_7BITS (0x02 << 5)
  93. #define UARTAPP_LINECTRL_WLEN_8BITS (0x03 << 5)
  94. #define UARTAPP_LINECTRL_FEN_MASK (1 << 4)
  95. #define UARTAPP_LINECTRL_STP2_MASK (1 << 3)
  96. #define UARTAPP_LINECTRL_EPS_MASK (1 << 2)
  97. #define UARTAPP_LINECTRL_PEN_MASK (1 << 1)
  98. #define UARTAPP_LINECTRL_BRK_MASK 1
  99. #define UARTAPP_LINECTRL2_BAUD_DIVINT_OFFSET 16
  100. #define UARTAPP_LINECTRL2_BAUD_DIVINT_MASK (0xFFFF << 16)
  101. #define UARTAPP_LINECTRL2_EXTRACT_BAUD_DIVINT_OFFSET 6
  102. #define UARTAPP_LINECTRL2_BAUD_DIVFRAC_OFFSET 8
  103. #define UARTAPP_LINECTRL2_BAUD_DIVFRAC_MASK (0x3F << 8)
  104. #define UARTAPP_LINECTRL2_EXTRACT_BAUD_DIVFRAC_MASK 0x3F
  105. #define UARTAPP_LINECTRL2_SPS_MASK (1 << 7)
  106. #define UARTAPP_LINECTRL2_WLEN_OFFSET 5
  107. #define UARTAPP_LINECTRL2_WLEN_MASK (0x03 << 5)
  108. #define UARTAPP_LINECTRL2_WLEN_5BITS (0x00 << 5)
  109. #define UARTAPP_LINECTRL2_WLEN_6BITS (0x01 << 5)
  110. #define UARTAPP_LINECTRL2_WLEN_7BITS (0x02 << 5)
  111. #define UARTAPP_LINECTRL2_WLEN_8BITS (0x03 << 5)
  112. #define UARTAPP_LINECTRL2_FEN_MASK (1 << 4)
  113. #define UARTAPP_LINECTRL2_STP2_MASK (1 << 3)
  114. #define UARTAPP_LINECTRL2_EPS_MASK (1 << 2)
  115. #define UARTAPP_LINECTRL2_PEN_MASK (1 << 1)
  116. #define UARTAPP_INTR_ABDIEN_MASK (1 << 27)
  117. #define UARTAPP_INTR_OEIEN_MASK (1 << 26)
  118. #define UARTAPP_INTR_BEIEN_MASK (1 << 25)
  119. #define UARTAPP_INTR_PEIEN_MASK (1 << 24)
  120. #define UARTAPP_INTR_FEIEN_MASK (1 << 23)
  121. #define UARTAPP_INTR_RTIEN_MASK (1 << 22)
  122. #define UARTAPP_INTR_TXIEN_MASK (1 << 21)
  123. #define UARTAPP_INTR_RXIEN_MASK (1 << 20)
  124. #define UARTAPP_INTR_DSRMIEN_MASK (1 << 19)
  125. #define UARTAPP_INTR_DCDMIEN_MASK (1 << 18)
  126. #define UARTAPP_INTR_CTSMIEN_MASK (1 << 17)
  127. #define UARTAPP_INTR_RIMIEN_MASK (1 << 16)
  128. #define UARTAPP_INTR_ABDIS_MASK (1 << 11)
  129. #define UARTAPP_INTR_OEIS_MASK (1 << 10)
  130. #define UARTAPP_INTR_BEIS_MASK (1 << 9)
  131. #define UARTAPP_INTR_PEIS_MASK (1 << 8)
  132. #define UARTAPP_INTR_FEIS_MASK (1 << 7)
  133. #define UARTAPP_INTR_RTIS_MASK (1 << 6)
  134. #define UARTAPP_INTR_TXIS_MASK (1 << 5)
  135. #define UARTAPP_INTR_RXIS_MASK (1 << 4)
  136. #define UARTAPP_INTR_DSRMIS_MASK (1 << 3)
  137. #define UARTAPP_INTR_DCDMIS_MASK (1 << 2)
  138. #define UARTAPP_INTR_CTSMIS_MASK (1 << 1)
  139. #define UARTAPP_INTR_RIMIS_MASK 0x1
  140. #define UARTAPP_DATA_DATA_OFFSET 0
  141. #define UARTAPP_DATA_DATA_MASK 0xFFFFFFFF
  142. #define UARTAPP_STAT_PRESENT_MASK (1 << 31)
  143. #define UARTAPP_STAT_PRESENT_UNAVAILABLE (0x0 << 31)
  144. #define UARTAPP_STAT_PRESENT_AVAILABLE (0x1 << 31)
  145. #define UARTAPP_STAT_HISPEED_MASK (1 << 30)
  146. #define UARTAPP_STAT_HISPEED_UNAVAILABLE (0x0 << 30)
  147. #define UARTAPP_STAT_HISPEED_AVAILABLE (0x1 << 30)
  148. #define UARTAPP_STAT_BUSY_MASK (1 << 29)
  149. #define UARTAPP_STAT_CTS_MASK (1 << 28)
  150. #define UARTAPP_STAT_TXFE_MASK (1 << 27)
  151. #define UARTAPP_STAT_RXFF_MASK (1 << 26)
  152. #define UARTAPP_STAT_TXFF_MASK (1 << 25)
  153. #define UARTAPP_STAT_RXFE_MASK (1 << 24)
  154. #define UARTAPP_STAT_RXBYTE_INVALID_OFFSET 20
  155. #define UARTAPP_STAT_RXBYTE_INVALID_MASK (0xF << 20)
  156. #define UARTAPP_STAT_OERR_MASK (1 << 19)
  157. #define UARTAPP_STAT_BERR_MASK (1 << 18)
  158. #define UARTAPP_STAT_PERR_MASK (1 << 17)
  159. #define UARTAPP_STAT_FERR_MASK (1 << 16)
  160. #define UARTAPP_STAT_RXCOUNT_OFFSET 0
  161. #define UARTAPP_STAT_RXCOUNT_MASK 0xFFFF
  162. #define UARTAPP_DEBUG_RXIBAUD_DIV_OFFSET 16
  163. #define UARTAPP_DEBUG_RXIBAUD_DIV_MASK (0xFFFF << 16)
  164. #define UARTAPP_DEBUG_RXFBAUD_DIV_OFFSET 10
  165. #define UARTAPP_DEBUG_RXFBAUD_DIV_MASK (0x3F << 10)
  166. #define UARTAPP_DEBUG_TXDMARUN_MASK (1 << 5)
  167. #define UARTAPP_DEBUG_RXDMARUN_MASK (1 << 4)
  168. #define UARTAPP_DEBUG_TXCMDEND_MASK (1 << 3)
  169. #define UARTAPP_DEBUG_RXCMDEND_MASK (1 << 2)
  170. #define UARTAPP_DEBUG_TXDMARQ_MASK (1 << 1)
  171. #define UARTAPP_DEBUG_RXDMARQ_MASK 0x01
  172. #define UARTAPP_VERSION_MAJOR_OFFSET 24
  173. #define UARTAPP_VERSION_MAJOR_MASK (0xFF << 24)
  174. #define UARTAPP_VERSION_MINOR_OFFSET 16
  175. #define UARTAPP_VERSION_MINOR_MASK (0xFF << 16)
  176. #define UARTAPP_VERSION_STEP_OFFSET 0
  177. #define UARTAPP_VERSION_STEP_MASK 0xFFFF
  178. #define UARTAPP_AUTOBAUD_REFCHAR1_OFFSET 24
  179. #define UARTAPP_AUTOBAUD_REFCHAR1_MASK (0xFF << 24)
  180. #define UARTAPP_AUTOBAUD_REFCHAR0_OFFSET 16
  181. #define UARTAPP_AUTOBAUD_REFCHAR0_MASK (0xFF << 16)
  182. #define UARTAPP_AUTOBAUD_UPDATE_TX_MASK (1 << 4)
  183. #define UARTAPP_AUTOBAUD_TWO_REF_CHARS_MASK (1 << 3)
  184. #define UARTAPP_AUTOBAUD_START_WITH_RUNBIT_MASK (1 << 2)
  185. #define UARTAPP_AUTOBAUD_START_BAUD_DETECT_MASK (1 << 1)
  186. #define UARTAPP_AUTOBAUD_BAUD_DETECT_ENABLE_MASK 0x01
  187. #endif /* __ARCH_ARM___UARTAPP_H */