regs-pinctrl.h 55 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Freescale i.MX28 PINCTRL Register Definitions
  4. *
  5. * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  6. * on behalf of DENX Software Engineering GmbH
  7. *
  8. * Based on code from LTIB:
  9. * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  10. */
  11. #ifndef __MX28_REGS_PINCTRL_H__
  12. #define __MX28_REGS_PINCTRL_H__
  13. #include <asm/mach-imx/regs-common.h>
  14. #ifndef __ASSEMBLY__
  15. struct mxs_pinctrl_regs {
  16. mxs_reg_32(hw_pinctrl_ctrl) /* 0x0 */
  17. uint32_t reserved1[60];
  18. mxs_reg_32(hw_pinctrl_muxsel0) /* 0x100 */
  19. mxs_reg_32(hw_pinctrl_muxsel1) /* 0x110 */
  20. mxs_reg_32(hw_pinctrl_muxsel2) /* 0x120 */
  21. mxs_reg_32(hw_pinctrl_muxsel3) /* 0x130 */
  22. mxs_reg_32(hw_pinctrl_muxsel4) /* 0x140 */
  23. mxs_reg_32(hw_pinctrl_muxsel5) /* 0x150 */
  24. mxs_reg_32(hw_pinctrl_muxsel6) /* 0x160 */
  25. mxs_reg_32(hw_pinctrl_muxsel7) /* 0x170 */
  26. mxs_reg_32(hw_pinctrl_muxsel8) /* 0x180 */
  27. mxs_reg_32(hw_pinctrl_muxsel9) /* 0x190 */
  28. mxs_reg_32(hw_pinctrl_muxsel10) /* 0x1a0 */
  29. mxs_reg_32(hw_pinctrl_muxsel11) /* 0x1b0 */
  30. mxs_reg_32(hw_pinctrl_muxsel12) /* 0x1c0 */
  31. mxs_reg_32(hw_pinctrl_muxsel13) /* 0x1d0 */
  32. uint32_t reserved2[72];
  33. mxs_reg_32(hw_pinctrl_drive0) /* 0x300 */
  34. mxs_reg_32(hw_pinctrl_drive1) /* 0x310 */
  35. mxs_reg_32(hw_pinctrl_drive2) /* 0x320 */
  36. mxs_reg_32(hw_pinctrl_drive3) /* 0x330 */
  37. mxs_reg_32(hw_pinctrl_drive4) /* 0x340 */
  38. mxs_reg_32(hw_pinctrl_drive5) /* 0x350 */
  39. mxs_reg_32(hw_pinctrl_drive6) /* 0x360 */
  40. mxs_reg_32(hw_pinctrl_drive7) /* 0x370 */
  41. mxs_reg_32(hw_pinctrl_drive8) /* 0x380 */
  42. mxs_reg_32(hw_pinctrl_drive9) /* 0x390 */
  43. mxs_reg_32(hw_pinctrl_drive10) /* 0x3a0 */
  44. mxs_reg_32(hw_pinctrl_drive11) /* 0x3b0 */
  45. mxs_reg_32(hw_pinctrl_drive12) /* 0x3c0 */
  46. mxs_reg_32(hw_pinctrl_drive13) /* 0x3d0 */
  47. mxs_reg_32(hw_pinctrl_drive14) /* 0x3e0 */
  48. mxs_reg_32(hw_pinctrl_drive15) /* 0x3f0 */
  49. mxs_reg_32(hw_pinctrl_drive16) /* 0x400 */
  50. mxs_reg_32(hw_pinctrl_drive17) /* 0x410 */
  51. mxs_reg_32(hw_pinctrl_drive18) /* 0x420 */
  52. mxs_reg_32(hw_pinctrl_drive19) /* 0x430 */
  53. uint32_t reserved3[112];
  54. mxs_reg_32(hw_pinctrl_pull0) /* 0x600 */
  55. mxs_reg_32(hw_pinctrl_pull1) /* 0x610 */
  56. mxs_reg_32(hw_pinctrl_pull2) /* 0x620 */
  57. mxs_reg_32(hw_pinctrl_pull3) /* 0x630 */
  58. mxs_reg_32(hw_pinctrl_pull4) /* 0x640 */
  59. mxs_reg_32(hw_pinctrl_pull5) /* 0x650 */
  60. mxs_reg_32(hw_pinctrl_pull6) /* 0x660 */
  61. uint32_t reserved4[36];
  62. mxs_reg_32(hw_pinctrl_dout0) /* 0x700 */
  63. mxs_reg_32(hw_pinctrl_dout1) /* 0x710 */
  64. mxs_reg_32(hw_pinctrl_dout2) /* 0x720 */
  65. mxs_reg_32(hw_pinctrl_dout3) /* 0x730 */
  66. mxs_reg_32(hw_pinctrl_dout4) /* 0x740 */
  67. uint32_t reserved5[108];
  68. mxs_reg_32(hw_pinctrl_din0) /* 0x900 */
  69. mxs_reg_32(hw_pinctrl_din1) /* 0x910 */
  70. mxs_reg_32(hw_pinctrl_din2) /* 0x920 */
  71. mxs_reg_32(hw_pinctrl_din3) /* 0x930 */
  72. mxs_reg_32(hw_pinctrl_din4) /* 0x940 */
  73. uint32_t reserved6[108];
  74. mxs_reg_32(hw_pinctrl_doe0) /* 0xb00 */
  75. mxs_reg_32(hw_pinctrl_doe1) /* 0xb10 */
  76. mxs_reg_32(hw_pinctrl_doe2) /* 0xb20 */
  77. mxs_reg_32(hw_pinctrl_doe3) /* 0xb30 */
  78. mxs_reg_32(hw_pinctrl_doe4) /* 0xb40 */
  79. uint32_t reserved7[300];
  80. mxs_reg_32(hw_pinctrl_pin2irq0) /* 0x1000 */
  81. mxs_reg_32(hw_pinctrl_pin2irq1) /* 0x1010 */
  82. mxs_reg_32(hw_pinctrl_pin2irq2) /* 0x1020 */
  83. mxs_reg_32(hw_pinctrl_pin2irq3) /* 0x1030 */
  84. mxs_reg_32(hw_pinctrl_pin2irq4) /* 0x1040 */
  85. uint32_t reserved8[44];
  86. mxs_reg_32(hw_pinctrl_irqen0) /* 0x1100 */
  87. mxs_reg_32(hw_pinctrl_irqen1) /* 0x1110 */
  88. mxs_reg_32(hw_pinctrl_irqen2) /* 0x1120 */
  89. mxs_reg_32(hw_pinctrl_irqen3) /* 0x1130 */
  90. mxs_reg_32(hw_pinctrl_irqen4) /* 0x1140 */
  91. uint32_t reserved9[44];
  92. mxs_reg_32(hw_pinctrl_irqlevel0) /* 0x1200 */
  93. mxs_reg_32(hw_pinctrl_irqlevel1) /* 0x1210 */
  94. mxs_reg_32(hw_pinctrl_irqlevel2) /* 0x1220 */
  95. mxs_reg_32(hw_pinctrl_irqlevel3) /* 0x1230 */
  96. mxs_reg_32(hw_pinctrl_irqlevel4) /* 0x1240 */
  97. uint32_t reserved10[44];
  98. mxs_reg_32(hw_pinctrl_irqpol0) /* 0x1300 */
  99. mxs_reg_32(hw_pinctrl_irqpol1) /* 0x1310 */
  100. mxs_reg_32(hw_pinctrl_irqpol2) /* 0x1320 */
  101. mxs_reg_32(hw_pinctrl_irqpol3) /* 0x1330 */
  102. mxs_reg_32(hw_pinctrl_irqpol4) /* 0x1340 */
  103. uint32_t reserved11[44];
  104. mxs_reg_32(hw_pinctrl_irqstat0) /* 0x1400 */
  105. mxs_reg_32(hw_pinctrl_irqstat1) /* 0x1410 */
  106. mxs_reg_32(hw_pinctrl_irqstat2) /* 0x1420 */
  107. mxs_reg_32(hw_pinctrl_irqstat3) /* 0x1430 */
  108. mxs_reg_32(hw_pinctrl_irqstat4) /* 0x1440 */
  109. uint32_t reserved12[380];
  110. mxs_reg_32(hw_pinctrl_emi_odt_ctrl) /* 0x1a40 */
  111. uint32_t reserved13[76];
  112. mxs_reg_32(hw_pinctrl_emi_ds_ctrl) /* 0x1b80 */
  113. };
  114. #endif
  115. #define PINCTRL_CTRL_SFTRST (1 << 31)
  116. #define PINCTRL_CTRL_CLKGATE (1 << 30)
  117. #define PINCTRL_CTRL_PRESENT4 (1 << 24)
  118. #define PINCTRL_CTRL_PRESENT3 (1 << 23)
  119. #define PINCTRL_CTRL_PRESENT2 (1 << 22)
  120. #define PINCTRL_CTRL_PRESENT1 (1 << 21)
  121. #define PINCTRL_CTRL_PRESENT0 (1 << 20)
  122. #define PINCTRL_CTRL_IRQOUT4 (1 << 4)
  123. #define PINCTRL_CTRL_IRQOUT3 (1 << 3)
  124. #define PINCTRL_CTRL_IRQOUT2 (1 << 2)
  125. #define PINCTRL_CTRL_IRQOUT1 (1 << 1)
  126. #define PINCTRL_CTRL_IRQOUT0 (1 << 0)
  127. #define PINCTRL_MUXSEL0_BANK0_PIN07_MASK (0x3 << 14)
  128. #define PINCTRL_MUXSEL0_BANK0_PIN07_OFFSET 14
  129. #define PINCTRL_MUXSEL0_BANK0_PIN06_MASK (0x3 << 12)
  130. #define PINCTRL_MUXSEL0_BANK0_PIN06_OFFSET 12
  131. #define PINCTRL_MUXSEL0_BANK0_PIN05_MASK (0x3 << 10)
  132. #define PINCTRL_MUXSEL0_BANK0_PIN05_OFFSET 10
  133. #define PINCTRL_MUXSEL0_BANK0_PIN04_MASK (0x3 << 8)
  134. #define PINCTRL_MUXSEL0_BANK0_PIN04_OFFSET 8
  135. #define PINCTRL_MUXSEL0_BANK0_PIN03_MASK (0x3 << 6)
  136. #define PINCTRL_MUXSEL0_BANK0_PIN03_OFFSET 6
  137. #define PINCTRL_MUXSEL0_BANK0_PIN02_MASK (0x3 << 4)
  138. #define PINCTRL_MUXSEL0_BANK0_PIN02_OFFSET 4
  139. #define PINCTRL_MUXSEL0_BANK0_PIN01_MASK (0x3 << 2)
  140. #define PINCTRL_MUXSEL0_BANK0_PIN01_OFFSET 2
  141. #define PINCTRL_MUXSEL0_BANK0_PIN00_MASK (0x3 << 0)
  142. #define PINCTRL_MUXSEL0_BANK0_PIN00_OFFSET 0
  143. #define PINCTRL_MUXSEL1_BANK0_PIN28_MASK (0x3 << 24)
  144. #define PINCTRL_MUXSEL1_BANK0_PIN28_OFFSET 24
  145. #define PINCTRL_MUXSEL1_BANK0_PIN27_MASK (0x3 << 22)
  146. #define PINCTRL_MUXSEL1_BANK0_PIN27_OFFSET 22
  147. #define PINCTRL_MUXSEL1_BANK0_PIN26_MASK (0x3 << 20)
  148. #define PINCTRL_MUXSEL1_BANK0_PIN26_OFFSET 20
  149. #define PINCTRL_MUXSEL1_BANK0_PIN25_MASK (0x3 << 18)
  150. #define PINCTRL_MUXSEL1_BANK0_PIN25_OFFSET 18
  151. #define PINCTRL_MUXSEL1_BANK0_PIN24_MASK (0x3 << 16)
  152. #define PINCTRL_MUXSEL1_BANK0_PIN24_OFFSET 16
  153. #define PINCTRL_MUXSEL1_BANK0_PIN23_MASK (0x3 << 14)
  154. #define PINCTRL_MUXSEL1_BANK0_PIN23_OFFSET 14
  155. #define PINCTRL_MUXSEL1_BANK0_PIN22_MASK (0x3 << 12)
  156. #define PINCTRL_MUXSEL1_BANK0_PIN22_OFFSET 12
  157. #define PINCTRL_MUXSEL1_BANK0_PIN21_MASK (0x3 << 10)
  158. #define PINCTRL_MUXSEL1_BANK0_PIN21_OFFSET 10
  159. #define PINCTRL_MUXSEL1_BANK0_PIN20_MASK (0x3 << 8)
  160. #define PINCTRL_MUXSEL1_BANK0_PIN20_OFFSET 8
  161. #define PINCTRL_MUXSEL1_BANK0_PIN19_MASK (0x3 << 6)
  162. #define PINCTRL_MUXSEL1_BANK0_PIN19_OFFSET 6
  163. #define PINCTRL_MUXSEL1_BANK0_PIN18_MASK (0x3 << 4)
  164. #define PINCTRL_MUXSEL1_BANK0_PIN18_OFFSET 4
  165. #define PINCTRL_MUXSEL1_BANK0_PIN17_MASK (0x3 << 2)
  166. #define PINCTRL_MUXSEL1_BANK0_PIN17_OFFSET 2
  167. #define PINCTRL_MUXSEL1_BANK0_PIN16_MASK (0x3 << 0)
  168. #define PINCTRL_MUXSEL1_BANK0_PIN16_OFFSET 0
  169. #define PINCTRL_MUXSEL2_BANK1_PIN15_MASK (0x3 << 30)
  170. #define PINCTRL_MUXSEL2_BANK1_PIN15_OFFSET 30
  171. #define PINCTRL_MUXSEL2_BANK1_PIN14_MASK (0x3 << 28)
  172. #define PINCTRL_MUXSEL2_BANK1_PIN14_OFFSET 28
  173. #define PINCTRL_MUXSEL2_BANK1_PIN13_MASK (0x3 << 26)
  174. #define PINCTRL_MUXSEL2_BANK1_PIN13_OFFSET 26
  175. #define PINCTRL_MUXSEL2_BANK1_PIN12_MASK (0x3 << 24)
  176. #define PINCTRL_MUXSEL2_BANK1_PIN12_OFFSET 24
  177. #define PINCTRL_MUXSEL2_BANK1_PIN11_MASK (0x3 << 22)
  178. #define PINCTRL_MUXSEL2_BANK1_PIN11_OFFSET 22
  179. #define PINCTRL_MUXSEL2_BANK1_PIN10_MASK (0x3 << 20)
  180. #define PINCTRL_MUXSEL2_BANK1_PIN10_OFFSET 20
  181. #define PINCTRL_MUXSEL2_BANK1_PIN09_MASK (0x3 << 18)
  182. #define PINCTRL_MUXSEL2_BANK1_PIN09_OFFSET 18
  183. #define PINCTRL_MUXSEL2_BANK1_PIN08_MASK (0x3 << 16)
  184. #define PINCTRL_MUXSEL2_BANK1_PIN08_OFFSET 16
  185. #define PINCTRL_MUXSEL2_BANK1_PIN07_MASK (0x3 << 14)
  186. #define PINCTRL_MUXSEL2_BANK1_PIN07_OFFSET 14
  187. #define PINCTRL_MUXSEL2_BANK1_PIN06_MASK (0x3 << 12)
  188. #define PINCTRL_MUXSEL2_BANK1_PIN06_OFFSET 12
  189. #define PINCTRL_MUXSEL2_BANK1_PIN05_MASK (0x3 << 10)
  190. #define PINCTRL_MUXSEL2_BANK1_PIN05_OFFSET 10
  191. #define PINCTRL_MUXSEL2_BANK1_PIN04_MASK (0x3 << 8)
  192. #define PINCTRL_MUXSEL2_BANK1_PIN04_OFFSET 8
  193. #define PINCTRL_MUXSEL2_BANK1_PIN03_MASK (0x3 << 6)
  194. #define PINCTRL_MUXSEL2_BANK1_PIN03_OFFSET 6
  195. #define PINCTRL_MUXSEL2_BANK1_PIN02_MASK (0x3 << 4)
  196. #define PINCTRL_MUXSEL2_BANK1_PIN02_OFFSET 4
  197. #define PINCTRL_MUXSEL2_BANK1_PIN01_MASK (0x3 << 2)
  198. #define PINCTRL_MUXSEL2_BANK1_PIN01_OFFSET 2
  199. #define PINCTRL_MUXSEL2_BANK1_PIN00_MASK (0x3 << 0)
  200. #define PINCTRL_MUXSEL2_BANK1_PIN00_OFFSET 0
  201. #define PINCTRL_MUXSEL3_BANK1_PIN31_MASK (0x3 << 30)
  202. #define PINCTRL_MUXSEL3_BANK1_PIN31_OFFSET 30
  203. #define PINCTRL_MUXSEL3_BANK1_PIN30_MASK (0x3 << 28)
  204. #define PINCTRL_MUXSEL3_BANK1_PIN30_OFFSET 28
  205. #define PINCTRL_MUXSEL3_BANK1_PIN29_MASK (0x3 << 26)
  206. #define PINCTRL_MUXSEL3_BANK1_PIN29_OFFSET 26
  207. #define PINCTRL_MUXSEL3_BANK1_PIN28_MASK (0x3 << 24)
  208. #define PINCTRL_MUXSEL3_BANK1_PIN28_OFFSET 24
  209. #define PINCTRL_MUXSEL3_BANK1_PIN27_MASK (0x3 << 22)
  210. #define PINCTRL_MUXSEL3_BANK1_PIN27_OFFSET 22
  211. #define PINCTRL_MUXSEL3_BANK1_PIN26_MASK (0x3 << 20)
  212. #define PINCTRL_MUXSEL3_BANK1_PIN26_OFFSET 20
  213. #define PINCTRL_MUXSEL3_BANK1_PIN25_MASK (0x3 << 18)
  214. #define PINCTRL_MUXSEL3_BANK1_PIN25_OFFSET 18
  215. #define PINCTRL_MUXSEL3_BANK1_PIN24_MASK (0x3 << 16)
  216. #define PINCTRL_MUXSEL3_BANK1_PIN24_OFFSET 16
  217. #define PINCTRL_MUXSEL3_BANK1_PIN23_MASK (0x3 << 14)
  218. #define PINCTRL_MUXSEL3_BANK1_PIN23_OFFSET 14
  219. #define PINCTRL_MUXSEL3_BANK1_PIN22_MASK (0x3 << 12)
  220. #define PINCTRL_MUXSEL3_BANK1_PIN22_OFFSET 12
  221. #define PINCTRL_MUXSEL3_BANK1_PIN21_MASK (0x3 << 10)
  222. #define PINCTRL_MUXSEL3_BANK1_PIN21_OFFSET 10
  223. #define PINCTRL_MUXSEL3_BANK1_PIN20_MASK (0x3 << 8)
  224. #define PINCTRL_MUXSEL3_BANK1_PIN20_OFFSET 8
  225. #define PINCTRL_MUXSEL3_BANK1_PIN19_MASK (0x3 << 6)
  226. #define PINCTRL_MUXSEL3_BANK1_PIN19_OFFSET 6
  227. #define PINCTRL_MUXSEL3_BANK1_PIN18_MASK (0x3 << 4)
  228. #define PINCTRL_MUXSEL3_BANK1_PIN18_OFFSET 4
  229. #define PINCTRL_MUXSEL3_BANK1_PIN17_MASK (0x3 << 2)
  230. #define PINCTRL_MUXSEL3_BANK1_PIN17_OFFSET 2
  231. #define PINCTRL_MUXSEL3_BANK1_PIN16_MASK (0x3 << 0)
  232. #define PINCTRL_MUXSEL3_BANK1_PIN16_OFFSET 0
  233. #define PINCTRL_MUXSEL4_BANK2_PIN15_MASK (0x3 << 30)
  234. #define PINCTRL_MUXSEL4_BANK2_PIN15_OFFSET 30
  235. #define PINCTRL_MUXSEL4_BANK2_PIN14_MASK (0x3 << 28)
  236. #define PINCTRL_MUXSEL4_BANK2_PIN14_OFFSET 28
  237. #define PINCTRL_MUXSEL4_BANK2_PIN13_MASK (0x3 << 26)
  238. #define PINCTRL_MUXSEL4_BANK2_PIN13_OFFSET 26
  239. #define PINCTRL_MUXSEL4_BANK2_PIN12_MASK (0x3 << 24)
  240. #define PINCTRL_MUXSEL4_BANK2_PIN12_OFFSET 24
  241. #define PINCTRL_MUXSEL4_BANK2_PIN10_MASK (0x3 << 20)
  242. #define PINCTRL_MUXSEL4_BANK2_PIN10_OFFSET 20
  243. #define PINCTRL_MUXSEL4_BANK2_PIN09_MASK (0x3 << 18)
  244. #define PINCTRL_MUXSEL4_BANK2_PIN09_OFFSET 18
  245. #define PINCTRL_MUXSEL4_BANK2_PIN08_MASK (0x3 << 16)
  246. #define PINCTRL_MUXSEL4_BANK2_PIN08_OFFSET 16
  247. #define PINCTRL_MUXSEL4_BANK2_PIN07_MASK (0x3 << 14)
  248. #define PINCTRL_MUXSEL4_BANK2_PIN07_OFFSET 14
  249. #define PINCTRL_MUXSEL4_BANK2_PIN06_MASK (0x3 << 12)
  250. #define PINCTRL_MUXSEL4_BANK2_PIN06_OFFSET 12
  251. #define PINCTRL_MUXSEL4_BANK2_PIN05_MASK (0x3 << 10)
  252. #define PINCTRL_MUXSEL4_BANK2_PIN05_OFFSET 10
  253. #define PINCTRL_MUXSEL4_BANK2_PIN04_MASK (0x3 << 8)
  254. #define PINCTRL_MUXSEL4_BANK2_PIN04_OFFSET 8
  255. #define PINCTRL_MUXSEL4_BANK2_PIN03_MASK (0x3 << 6)
  256. #define PINCTRL_MUXSEL4_BANK2_PIN03_OFFSET 6
  257. #define PINCTRL_MUXSEL4_BANK2_PIN02_MASK (0x3 << 4)
  258. #define PINCTRL_MUXSEL4_BANK2_PIN02_OFFSET 4
  259. #define PINCTRL_MUXSEL4_BANK2_PIN01_MASK (0x3 << 2)
  260. #define PINCTRL_MUXSEL4_BANK2_PIN01_OFFSET 2
  261. #define PINCTRL_MUXSEL4_BANK2_PIN00_MASK (0x3 << 0)
  262. #define PINCTRL_MUXSEL4_BANK2_PIN00_OFFSET 0
  263. #define PINCTRL_MUXSEL5_BANK2_PIN27_MASK (0x3 << 22)
  264. #define PINCTRL_MUXSEL5_BANK2_PIN27_OFFSET 22
  265. #define PINCTRL_MUXSEL5_BANK2_PIN26_MASK (0x3 << 20)
  266. #define PINCTRL_MUXSEL5_BANK2_PIN26_OFFSET 20
  267. #define PINCTRL_MUXSEL5_BANK2_PIN25_MASK (0x3 << 18)
  268. #define PINCTRL_MUXSEL5_BANK2_PIN25_OFFSET 18
  269. #define PINCTRL_MUXSEL5_BANK2_PIN24_MASK (0x3 << 16)
  270. #define PINCTRL_MUXSEL5_BANK2_PIN24_OFFSET 16
  271. #define PINCTRL_MUXSEL5_BANK2_PIN21_MASK (0x3 << 10)
  272. #define PINCTRL_MUXSEL5_BANK2_PIN21_OFFSET 10
  273. #define PINCTRL_MUXSEL5_BANK2_PIN20_MASK (0x3 << 8)
  274. #define PINCTRL_MUXSEL5_BANK2_PIN20_OFFSET 8
  275. #define PINCTRL_MUXSEL5_BANK2_PIN19_MASK (0x3 << 6)
  276. #define PINCTRL_MUXSEL5_BANK2_PIN19_OFFSET 6
  277. #define PINCTRL_MUXSEL5_BANK2_PIN18_MASK (0x3 << 4)
  278. #define PINCTRL_MUXSEL5_BANK2_PIN18_OFFSET 4
  279. #define PINCTRL_MUXSEL5_BANK2_PIN17_MASK (0x3 << 2)
  280. #define PINCTRL_MUXSEL5_BANK2_PIN17_OFFSET 2
  281. #define PINCTRL_MUXSEL5_BANK2_PIN16_MASK (0x3 << 0)
  282. #define PINCTRL_MUXSEL5_BANK2_PIN16_OFFSET 0
  283. #define PINCTRL_MUXSEL6_BANK3_PIN15_MASK (0x3 << 30)
  284. #define PINCTRL_MUXSEL6_BANK3_PIN15_OFFSET 30
  285. #define PINCTRL_MUXSEL6_BANK3_PIN14_MASK (0x3 << 28)
  286. #define PINCTRL_MUXSEL6_BANK3_PIN14_OFFSET 28
  287. #define PINCTRL_MUXSEL6_BANK3_PIN13_MASK (0x3 << 26)
  288. #define PINCTRL_MUXSEL6_BANK3_PIN13_OFFSET 26
  289. #define PINCTRL_MUXSEL6_BANK3_PIN12_MASK (0x3 << 24)
  290. #define PINCTRL_MUXSEL6_BANK3_PIN12_OFFSET 24
  291. #define PINCTRL_MUXSEL6_BANK3_PIN11_MASK (0x3 << 22)
  292. #define PINCTRL_MUXSEL6_BANK3_PIN11_OFFSET 22
  293. #define PINCTRL_MUXSEL6_BANK3_PIN10_MASK (0x3 << 20)
  294. #define PINCTRL_MUXSEL6_BANK3_PIN10_OFFSET 20
  295. #define PINCTRL_MUXSEL6_BANK3_PIN09_MASK (0x3 << 18)
  296. #define PINCTRL_MUXSEL6_BANK3_PIN09_OFFSET 18
  297. #define PINCTRL_MUXSEL6_BANK3_PIN08_MASK (0x3 << 16)
  298. #define PINCTRL_MUXSEL6_BANK3_PIN08_OFFSET 16
  299. #define PINCTRL_MUXSEL6_BANK3_PIN07_MASK (0x3 << 14)
  300. #define PINCTRL_MUXSEL6_BANK3_PIN07_OFFSET 14
  301. #define PINCTRL_MUXSEL6_BANK3_PIN06_MASK (0x3 << 12)
  302. #define PINCTRL_MUXSEL6_BANK3_PIN06_OFFSET 12
  303. #define PINCTRL_MUXSEL6_BANK3_PIN05_MASK (0x3 << 10)
  304. #define PINCTRL_MUXSEL6_BANK3_PIN05_OFFSET 10
  305. #define PINCTRL_MUXSEL6_BANK3_PIN04_MASK (0x3 << 8)
  306. #define PINCTRL_MUXSEL6_BANK3_PIN04_OFFSET 8
  307. #define PINCTRL_MUXSEL6_BANK3_PIN03_MASK (0x3 << 6)
  308. #define PINCTRL_MUXSEL6_BANK3_PIN03_OFFSET 6
  309. #define PINCTRL_MUXSEL6_BANK3_PIN02_MASK (0x3 << 4)
  310. #define PINCTRL_MUXSEL6_BANK3_PIN02_OFFSET 4
  311. #define PINCTRL_MUXSEL6_BANK3_PIN01_MASK (0x3 << 2)
  312. #define PINCTRL_MUXSEL6_BANK3_PIN01_OFFSET 2
  313. #define PINCTRL_MUXSEL6_BANK3_PIN00_MASK (0x3 << 0)
  314. #define PINCTRL_MUXSEL6_BANK3_PIN00_OFFSET 0
  315. #define PINCTRL_MUXSEL7_BANK3_PIN30_MASK (0x3 << 28)
  316. #define PINCTRL_MUXSEL7_BANK3_PIN30_OFFSET 28
  317. #define PINCTRL_MUXSEL7_BANK3_PIN29_MASK (0x3 << 26)
  318. #define PINCTRL_MUXSEL7_BANK3_PIN29_OFFSET 26
  319. #define PINCTRL_MUXSEL7_BANK3_PIN28_MASK (0x3 << 24)
  320. #define PINCTRL_MUXSEL7_BANK3_PIN28_OFFSET 24
  321. #define PINCTRL_MUXSEL7_BANK3_PIN27_MASK (0x3 << 22)
  322. #define PINCTRL_MUXSEL7_BANK3_PIN27_OFFSET 22
  323. #define PINCTRL_MUXSEL7_BANK3_PIN26_MASK (0x3 << 20)
  324. #define PINCTRL_MUXSEL7_BANK3_PIN26_OFFSET 20
  325. #define PINCTRL_MUXSEL7_BANK3_PIN25_MASK (0x3 << 18)
  326. #define PINCTRL_MUXSEL7_BANK3_PIN25_OFFSET 18
  327. #define PINCTRL_MUXSEL7_BANK3_PIN24_MASK (0x3 << 16)
  328. #define PINCTRL_MUXSEL7_BANK3_PIN24_OFFSET 16
  329. #define PINCTRL_MUXSEL7_BANK3_PIN23_MASK (0x3 << 14)
  330. #define PINCTRL_MUXSEL7_BANK3_PIN23_OFFSET 14
  331. #define PINCTRL_MUXSEL7_BANK3_PIN22_MASK (0x3 << 12)
  332. #define PINCTRL_MUXSEL7_BANK3_PIN22_OFFSET 12
  333. #define PINCTRL_MUXSEL7_BANK3_PIN21_MASK (0x3 << 10)
  334. #define PINCTRL_MUXSEL7_BANK3_PIN21_OFFSET 10
  335. #define PINCTRL_MUXSEL7_BANK3_PIN20_MASK (0x3 << 8)
  336. #define PINCTRL_MUXSEL7_BANK3_PIN20_OFFSET 8
  337. #define PINCTRL_MUXSEL7_BANK3_PIN18_MASK (0x3 << 4)
  338. #define PINCTRL_MUXSEL7_BANK3_PIN18_OFFSET 4
  339. #define PINCTRL_MUXSEL7_BANK3_PIN17_MASK (0x3 << 2)
  340. #define PINCTRL_MUXSEL7_BANK3_PIN17_OFFSET 2
  341. #define PINCTRL_MUXSEL7_BANK3_PIN16_MASK (0x3 << 0)
  342. #define PINCTRL_MUXSEL7_BANK3_PIN16_OFFSET 0
  343. #define PINCTRL_MUXSEL8_BANK4_PIN15_MASK (0x3 << 30)
  344. #define PINCTRL_MUXSEL8_BANK4_PIN15_OFFSET 30
  345. #define PINCTRL_MUXSEL8_BANK4_PIN14_MASK (0x3 << 28)
  346. #define PINCTRL_MUXSEL8_BANK4_PIN14_OFFSET 28
  347. #define PINCTRL_MUXSEL8_BANK4_PIN13_MASK (0x3 << 26)
  348. #define PINCTRL_MUXSEL8_BANK4_PIN13_OFFSET 26
  349. #define PINCTRL_MUXSEL8_BANK4_PIN12_MASK (0x3 << 24)
  350. #define PINCTRL_MUXSEL8_BANK4_PIN12_OFFSET 24
  351. #define PINCTRL_MUXSEL8_BANK4_PIN11_MASK (0x3 << 22)
  352. #define PINCTRL_MUXSEL8_BANK4_PIN11_OFFSET 22
  353. #define PINCTRL_MUXSEL8_BANK4_PIN10_MASK (0x3 << 20)
  354. #define PINCTRL_MUXSEL8_BANK4_PIN10_OFFSET 20
  355. #define PINCTRL_MUXSEL8_BANK4_PIN09_MASK (0x3 << 18)
  356. #define PINCTRL_MUXSEL8_BANK4_PIN09_OFFSET 18
  357. #define PINCTRL_MUXSEL8_BANK4_PIN08_MASK (0x3 << 16)
  358. #define PINCTRL_MUXSEL8_BANK4_PIN08_OFFSET 16
  359. #define PINCTRL_MUXSEL8_BANK4_PIN07_MASK (0x3 << 14)
  360. #define PINCTRL_MUXSEL8_BANK4_PIN07_OFFSET 14
  361. #define PINCTRL_MUXSEL8_BANK4_PIN06_MASK (0x3 << 12)
  362. #define PINCTRL_MUXSEL8_BANK4_PIN06_OFFSET 12
  363. #define PINCTRL_MUXSEL8_BANK4_PIN05_MASK (0x3 << 10)
  364. #define PINCTRL_MUXSEL8_BANK4_PIN05_OFFSET 10
  365. #define PINCTRL_MUXSEL8_BANK4_PIN04_MASK (0x3 << 8)
  366. #define PINCTRL_MUXSEL8_BANK4_PIN04_OFFSET 8
  367. #define PINCTRL_MUXSEL8_BANK4_PIN03_MASK (0x3 << 6)
  368. #define PINCTRL_MUXSEL8_BANK4_PIN03_OFFSET 6
  369. #define PINCTRL_MUXSEL8_BANK4_PIN02_MASK (0x3 << 4)
  370. #define PINCTRL_MUXSEL8_BANK4_PIN02_OFFSET 4
  371. #define PINCTRL_MUXSEL8_BANK4_PIN01_MASK (0x3 << 2)
  372. #define PINCTRL_MUXSEL8_BANK4_PIN01_OFFSET 2
  373. #define PINCTRL_MUXSEL8_BANK4_PIN00_MASK (0x3 << 0)
  374. #define PINCTRL_MUXSEL8_BANK4_PIN00_OFFSET 0
  375. #define PINCTRL_MUXSEL9_BANK4_PIN20_MASK (0x3 << 8)
  376. #define PINCTRL_MUXSEL9_BANK4_PIN20_OFFSET 8
  377. #define PINCTRL_MUXSEL9_BANK4_PIN16_MASK (0x3 << 0)
  378. #define PINCTRL_MUXSEL9_BANK4_PIN16_OFFSET 0
  379. #define PINCTRL_MUXSEL10_BANK5_PIN15_MASK (0x3 << 30)
  380. #define PINCTRL_MUXSEL10_BANK5_PIN15_OFFSET 30
  381. #define PINCTRL_MUXSEL10_BANK5_PIN14_MASK (0x3 << 28)
  382. #define PINCTRL_MUXSEL10_BANK5_PIN14_OFFSET 28
  383. #define PINCTRL_MUXSEL10_BANK5_PIN13_MASK (0x3 << 26)
  384. #define PINCTRL_MUXSEL10_BANK5_PIN13_OFFSET 26
  385. #define PINCTRL_MUXSEL10_BANK5_PIN12_MASK (0x3 << 24)
  386. #define PINCTRL_MUXSEL10_BANK5_PIN12_OFFSET 24
  387. #define PINCTRL_MUXSEL10_BANK5_PIN11_MASK (0x3 << 22)
  388. #define PINCTRL_MUXSEL10_BANK5_PIN11_OFFSET 22
  389. #define PINCTRL_MUXSEL10_BANK5_PIN10_MASK (0x3 << 20)
  390. #define PINCTRL_MUXSEL10_BANK5_PIN10_OFFSET 20
  391. #define PINCTRL_MUXSEL10_BANK5_PIN09_MASK (0x3 << 18)
  392. #define PINCTRL_MUXSEL10_BANK5_PIN09_OFFSET 18
  393. #define PINCTRL_MUXSEL10_BANK5_PIN08_MASK (0x3 << 16)
  394. #define PINCTRL_MUXSEL10_BANK5_PIN08_OFFSET 16
  395. #define PINCTRL_MUXSEL10_BANK5_PIN07_MASK (0x3 << 14)
  396. #define PINCTRL_MUXSEL10_BANK5_PIN07_OFFSET 14
  397. #define PINCTRL_MUXSEL10_BANK5_PIN06_MASK (0x3 << 12)
  398. #define PINCTRL_MUXSEL10_BANK5_PIN06_OFFSET 12
  399. #define PINCTRL_MUXSEL10_BANK5_PIN05_MASK (0x3 << 10)
  400. #define PINCTRL_MUXSEL10_BANK5_PIN05_OFFSET 10
  401. #define PINCTRL_MUXSEL10_BANK5_PIN04_MASK (0x3 << 8)
  402. #define PINCTRL_MUXSEL10_BANK5_PIN04_OFFSET 8
  403. #define PINCTRL_MUXSEL10_BANK5_PIN03_MASK (0x3 << 6)
  404. #define PINCTRL_MUXSEL10_BANK5_PIN03_OFFSET 6
  405. #define PINCTRL_MUXSEL10_BANK5_PIN02_MASK (0x3 << 4)
  406. #define PINCTRL_MUXSEL10_BANK5_PIN02_OFFSET 4
  407. #define PINCTRL_MUXSEL10_BANK5_PIN01_MASK (0x3 << 2)
  408. #define PINCTRL_MUXSEL10_BANK5_PIN01_OFFSET 2
  409. #define PINCTRL_MUXSEL10_BANK5_PIN00_MASK (0x3 << 0)
  410. #define PINCTRL_MUXSEL10_BANK5_PIN00_OFFSET 0
  411. #define PINCTRL_MUXSEL11_BANK5_PIN26_MASK (0x3 << 20)
  412. #define PINCTRL_MUXSEL11_BANK5_PIN26_OFFSET 20
  413. #define PINCTRL_MUXSEL11_BANK5_PIN23_MASK (0x3 << 14)
  414. #define PINCTRL_MUXSEL11_BANK5_PIN23_OFFSET 14
  415. #define PINCTRL_MUXSEL11_BANK5_PIN22_MASK (0x3 << 12)
  416. #define PINCTRL_MUXSEL11_BANK5_PIN22_OFFSET 12
  417. #define PINCTRL_MUXSEL11_BANK5_PIN21_MASK (0x3 << 10)
  418. #define PINCTRL_MUXSEL11_BANK5_PIN21_OFFSET 10
  419. #define PINCTRL_MUXSEL11_BANK5_PIN20_MASK (0x3 << 8)
  420. #define PINCTRL_MUXSEL11_BANK5_PIN20_OFFSET 8
  421. #define PINCTRL_MUXSEL11_BANK5_PIN19_MASK (0x3 << 6)
  422. #define PINCTRL_MUXSEL11_BANK5_PIN19_OFFSET 6
  423. #define PINCTRL_MUXSEL11_BANK5_PIN18_MASK (0x3 << 4)
  424. #define PINCTRL_MUXSEL11_BANK5_PIN18_OFFSET 4
  425. #define PINCTRL_MUXSEL11_BANK5_PIN17_MASK (0x3 << 2)
  426. #define PINCTRL_MUXSEL11_BANK5_PIN17_OFFSET 2
  427. #define PINCTRL_MUXSEL11_BANK5_PIN16_MASK (0x3 << 0)
  428. #define PINCTRL_MUXSEL11_BANK5_PIN16_OFFSET 0
  429. #define PINCTRL_MUXSEL12_BANK6_PIN14_MASK (0x3 << 28)
  430. #define PINCTRL_MUXSEL12_BANK6_PIN14_OFFSET 28
  431. #define PINCTRL_MUXSEL12_BANK6_PIN13_MASK (0x3 << 26)
  432. #define PINCTRL_MUXSEL12_BANK6_PIN13_OFFSET 26
  433. #define PINCTRL_MUXSEL12_BANK6_PIN12_MASK (0x3 << 24)
  434. #define PINCTRL_MUXSEL12_BANK6_PIN12_OFFSET 24
  435. #define PINCTRL_MUXSEL12_BANK6_PIN11_MASK (0x3 << 22)
  436. #define PINCTRL_MUXSEL12_BANK6_PIN11_OFFSET 22
  437. #define PINCTRL_MUXSEL12_BANK6_PIN10_MASK (0x3 << 20)
  438. #define PINCTRL_MUXSEL12_BANK6_PIN10_OFFSET 20
  439. #define PINCTRL_MUXSEL12_BANK6_PIN09_MASK (0x3 << 18)
  440. #define PINCTRL_MUXSEL12_BANK6_PIN09_OFFSET 18
  441. #define PINCTRL_MUXSEL12_BANK6_PIN08_MASK (0x3 << 16)
  442. #define PINCTRL_MUXSEL12_BANK6_PIN08_OFFSET 16
  443. #define PINCTRL_MUXSEL12_BANK6_PIN07_MASK (0x3 << 14)
  444. #define PINCTRL_MUXSEL12_BANK6_PIN07_OFFSET 14
  445. #define PINCTRL_MUXSEL12_BANK6_PIN06_MASK (0x3 << 12)
  446. #define PINCTRL_MUXSEL12_BANK6_PIN06_OFFSET 12
  447. #define PINCTRL_MUXSEL12_BANK6_PIN05_MASK (0x3 << 10)
  448. #define PINCTRL_MUXSEL12_BANK6_PIN05_OFFSET 10
  449. #define PINCTRL_MUXSEL12_BANK6_PIN04_MASK (0x3 << 8)
  450. #define PINCTRL_MUXSEL12_BANK6_PIN04_OFFSET 8
  451. #define PINCTRL_MUXSEL12_BANK6_PIN03_MASK (0x3 << 6)
  452. #define PINCTRL_MUXSEL12_BANK6_PIN03_OFFSET 6
  453. #define PINCTRL_MUXSEL12_BANK6_PIN02_MASK (0x3 << 4)
  454. #define PINCTRL_MUXSEL12_BANK6_PIN02_OFFSET 4
  455. #define PINCTRL_MUXSEL12_BANK6_PIN01_MASK (0x3 << 2)
  456. #define PINCTRL_MUXSEL12_BANK6_PIN01_OFFSET 2
  457. #define PINCTRL_MUXSEL12_BANK6_PIN00_MASK (0x3 << 0)
  458. #define PINCTRL_MUXSEL12_BANK6_PIN00_OFFSET 0
  459. #define PINCTRL_MUXSEL13_BANK6_PIN24_MASK (0x3 << 16)
  460. #define PINCTRL_MUXSEL13_BANK6_PIN24_OFFSET 16
  461. #define PINCTRL_MUXSEL13_BANK6_PIN23_MASK (0x3 << 14)
  462. #define PINCTRL_MUXSEL13_BANK6_PIN23_OFFSET 14
  463. #define PINCTRL_MUXSEL13_BANK6_PIN22_MASK (0x3 << 12)
  464. #define PINCTRL_MUXSEL13_BANK6_PIN22_OFFSET 12
  465. #define PINCTRL_MUXSEL13_BANK6_PIN21_MASK (0x3 << 10)
  466. #define PINCTRL_MUXSEL13_BANK6_PIN21_OFFSET 10
  467. #define PINCTRL_MUXSEL13_BANK6_PIN20_MASK (0x3 << 8)
  468. #define PINCTRL_MUXSEL13_BANK6_PIN20_OFFSET 8
  469. #define PINCTRL_MUXSEL13_BANK6_PIN19_MASK (0x3 << 6)
  470. #define PINCTRL_MUXSEL13_BANK6_PIN19_OFFSET 6
  471. #define PINCTRL_MUXSEL13_BANK6_PIN18_MASK (0x3 << 4)
  472. #define PINCTRL_MUXSEL13_BANK6_PIN18_OFFSET 4
  473. #define PINCTRL_MUXSEL13_BANK6_PIN17_MASK (0x3 << 2)
  474. #define PINCTRL_MUXSEL13_BANK6_PIN17_OFFSET 2
  475. #define PINCTRL_MUXSEL13_BANK6_PIN16_MASK (0x3 << 0)
  476. #define PINCTRL_MUXSEL13_BANK6_PIN16_OFFSET 0
  477. #define PINCTRL_DRIVE0_BANK0_PIN07_V (1 << 30)
  478. #define PINCTRL_DRIVE0_BANK0_PIN07_MA_MASK (0x3 << 28)
  479. #define PINCTRL_DRIVE0_BANK0_PIN07_MA_OFFSET 28
  480. #define PINCTRL_DRIVE0_BANK0_PIN06_V (1 << 26)
  481. #define PINCTRL_DRIVE0_BANK0_PIN06_MA_MASK (0x3 << 24)
  482. #define PINCTRL_DRIVE0_BANK0_PIN06_MA_OFFSET 24
  483. #define PINCTRL_DRIVE0_BANK0_PIN05_V (1 << 22)
  484. #define PINCTRL_DRIVE0_BANK0_PIN05_MA_MASK (0x3 << 20)
  485. #define PINCTRL_DRIVE0_BANK0_PIN05_MA_OFFSET 20
  486. #define PINCTRL_DRIVE0_BANK0_PIN04_V (1 << 18)
  487. #define PINCTRL_DRIVE0_BANK0_PIN04_MA_MASK (0x3 << 16)
  488. #define PINCTRL_DRIVE0_BANK0_PIN04_MA_OFFSET 16
  489. #define PINCTRL_DRIVE0_BANK0_PIN03_V (1 << 14)
  490. #define PINCTRL_DRIVE0_BANK0_PIN03_MA_MASK (0x3 << 12)
  491. #define PINCTRL_DRIVE0_BANK0_PIN03_MA_OFFSET 12
  492. #define PINCTRL_DRIVE0_BANK0_PIN02_V (1 << 10)
  493. #define PINCTRL_DRIVE0_BANK0_PIN02_MA_MASK (0x3 << 8)
  494. #define PINCTRL_DRIVE0_BANK0_PIN02_MA_OFFSET 8
  495. #define PINCTRL_DRIVE0_BANK0_PIN01_V (1 << 6)
  496. #define PINCTRL_DRIVE0_BANK0_PIN01_MA_MASK (0x3 << 4)
  497. #define PINCTRL_DRIVE0_BANK0_PIN01_MA_OFFSET 4
  498. #define PINCTRL_DRIVE0_BANK0_PIN00_V (1 << 2)
  499. #define PINCTRL_DRIVE0_BANK0_PIN00_MA_MASK (0x3 << 0)
  500. #define PINCTRL_DRIVE0_BANK0_PIN00_MA_OFFSET 0
  501. #define PINCTRL_DRIVE2_BANK0_PIN23_V (1 << 30)
  502. #define PINCTRL_DRIVE2_BANK0_PIN23_MA_MASK (0x3 << 28)
  503. #define PINCTRL_DRIVE2_BANK0_PIN23_MA_OFFSET 28
  504. #define PINCTRL_DRIVE2_BANK0_PIN22_V (1 << 26)
  505. #define PINCTRL_DRIVE2_BANK0_PIN22_MA_MASK (0x3 << 24)
  506. #define PINCTRL_DRIVE2_BANK0_PIN22_MA_OFFSET 24
  507. #define PINCTRL_DRIVE2_BANK0_PIN21_V (1 << 22)
  508. #define PINCTRL_DRIVE2_BANK0_PIN21_MA_MASK (0x3 << 20)
  509. #define PINCTRL_DRIVE2_BANK0_PIN21_MA_OFFSET 20
  510. #define PINCTRL_DRIVE2_BANK0_PIN20_V (1 << 18)
  511. #define PINCTRL_DRIVE2_BANK0_PIN20_MA_MASK (0x3 << 16)
  512. #define PINCTRL_DRIVE2_BANK0_PIN20_MA_OFFSET 16
  513. #define PINCTRL_DRIVE2_BANK0_PIN19_V (1 << 14)
  514. #define PINCTRL_DRIVE2_BANK0_PIN19_MA_MASK (0x3 << 12)
  515. #define PINCTRL_DRIVE2_BANK0_PIN19_MA_OFFSET 12
  516. #define PINCTRL_DRIVE2_BANK0_PIN18_V (1 << 10)
  517. #define PINCTRL_DRIVE2_BANK0_PIN18_MA_MASK (0x3 << 8)
  518. #define PINCTRL_DRIVE2_BANK0_PIN18_MA_OFFSET 8
  519. #define PINCTRL_DRIVE2_BANK0_PIN17_V (1 << 6)
  520. #define PINCTRL_DRIVE2_BANK0_PIN17_MA_MASK (0x3 << 4)
  521. #define PINCTRL_DRIVE2_BANK0_PIN17_MA_OFFSET 4
  522. #define PINCTRL_DRIVE2_BANK0_PIN16_V (1 << 2)
  523. #define PINCTRL_DRIVE2_BANK0_PIN16_MA_MASK (0x3 << 0)
  524. #define PINCTRL_DRIVE2_BANK0_PIN16_MA_OFFSET 0
  525. #define PINCTRL_DRIVE3_BANK0_PIN28_V (1 << 18)
  526. #define PINCTRL_DRIVE3_BANK0_PIN28_MA_MASK (0x3 << 16)
  527. #define PINCTRL_DRIVE3_BANK0_PIN28_MA_OFFSET 16
  528. #define PINCTRL_DRIVE3_BANK0_PIN27_V (1 << 14)
  529. #define PINCTRL_DRIVE3_BANK0_PIN27_MA_MASK (0x3 << 12)
  530. #define PINCTRL_DRIVE3_BANK0_PIN27_MA_OFFSET 12
  531. #define PINCTRL_DRIVE3_BANK0_PIN26_V (1 << 10)
  532. #define PINCTRL_DRIVE3_BANK0_PIN26_MA_MASK (0x3 << 8)
  533. #define PINCTRL_DRIVE3_BANK0_PIN26_MA_OFFSET 8
  534. #define PINCTRL_DRIVE3_BANK0_PIN25_V (1 << 6)
  535. #define PINCTRL_DRIVE3_BANK0_PIN25_MA_MASK (0x3 << 4)
  536. #define PINCTRL_DRIVE3_BANK0_PIN25_MA_OFFSET 4
  537. #define PINCTRL_DRIVE3_BANK0_PIN24_V (1 << 2)
  538. #define PINCTRL_DRIVE3_BANK0_PIN24_MA_MASK (0x3 << 0)
  539. #define PINCTRL_DRIVE3_BANK0_PIN24_MA_OFFSET 0
  540. #define PINCTRL_DRIVE4_BANK1_PIN07_V (1 << 30)
  541. #define PINCTRL_DRIVE4_BANK1_PIN07_MA_MASK (0x3 << 28)
  542. #define PINCTRL_DRIVE4_BANK1_PIN07_MA_OFFSET 28
  543. #define PINCTRL_DRIVE4_BANK1_PIN06_V (1 << 26)
  544. #define PINCTRL_DRIVE4_BANK1_PIN06_MA_MASK (0x3 << 24)
  545. #define PINCTRL_DRIVE4_BANK1_PIN06_MA_OFFSET 24
  546. #define PINCTRL_DRIVE4_BANK1_PIN05_V (1 << 22)
  547. #define PINCTRL_DRIVE4_BANK1_PIN05_MA_MASK (0x3 << 20)
  548. #define PINCTRL_DRIVE4_BANK1_PIN05_MA_OFFSET 20
  549. #define PINCTRL_DRIVE4_BANK1_PIN04_V (1 << 18)
  550. #define PINCTRL_DRIVE4_BANK1_PIN04_MA_MASK (0x3 << 16)
  551. #define PINCTRL_DRIVE4_BANK1_PIN04_MA_OFFSET 16
  552. #define PINCTRL_DRIVE4_BANK1_PIN03_V (1 << 14)
  553. #define PINCTRL_DRIVE4_BANK1_PIN03_MA_MASK (0x3 << 12)
  554. #define PINCTRL_DRIVE4_BANK1_PIN03_MA_OFFSET 12
  555. #define PINCTRL_DRIVE4_BANK1_PIN02_V (1 << 10)
  556. #define PINCTRL_DRIVE4_BANK1_PIN02_MA_MASK (0x3 << 8)
  557. #define PINCTRL_DRIVE4_BANK1_PIN02_MA_OFFSET 8
  558. #define PINCTRL_DRIVE4_BANK1_PIN01_V (1 << 6)
  559. #define PINCTRL_DRIVE4_BANK1_PIN01_MA_MASK (0x3 << 4)
  560. #define PINCTRL_DRIVE4_BANK1_PIN01_MA_OFFSET 4
  561. #define PINCTRL_DRIVE4_BANK1_PIN00_V (1 << 2)
  562. #define PINCTRL_DRIVE4_BANK1_PIN00_MA_MASK (0x3 << 0)
  563. #define PINCTRL_DRIVE4_BANK1_PIN00_MA_OFFSET 0
  564. #define PINCTRL_DRIVE5_BANK1_PIN15_V (1 << 30)
  565. #define PINCTRL_DRIVE5_BANK1_PIN15_MA_MASK (0x3 << 28)
  566. #define PINCTRL_DRIVE5_BANK1_PIN15_MA_OFFSET 28
  567. #define PINCTRL_DRIVE5_BANK1_PIN14_V (1 << 26)
  568. #define PINCTRL_DRIVE5_BANK1_PIN14_MA_MASK (0x3 << 24)
  569. #define PINCTRL_DRIVE5_BANK1_PIN14_MA_OFFSET 24
  570. #define PINCTRL_DRIVE5_BANK1_PIN13_V (1 << 22)
  571. #define PINCTRL_DRIVE5_BANK1_PIN13_MA_MASK (0x3 << 20)
  572. #define PINCTRL_DRIVE5_BANK1_PIN13_MA_OFFSET 20
  573. #define PINCTRL_DRIVE5_BANK1_PIN12_V (1 << 18)
  574. #define PINCTRL_DRIVE5_BANK1_PIN12_MA_MASK (0x3 << 16)
  575. #define PINCTRL_DRIVE5_BANK1_PIN12_MA_OFFSET 16
  576. #define PINCTRL_DRIVE5_BANK1_PIN11_V (1 << 14)
  577. #define PINCTRL_DRIVE5_BANK1_PIN11_MA_MASK (0x3 << 12)
  578. #define PINCTRL_DRIVE5_BANK1_PIN11_MA_OFFSET 12
  579. #define PINCTRL_DRIVE5_BANK1_PIN10_V (1 << 10)
  580. #define PINCTRL_DRIVE5_BANK1_PIN10_MA_MASK (0x3 << 8)
  581. #define PINCTRL_DRIVE5_BANK1_PIN10_MA_OFFSET 8
  582. #define PINCTRL_DRIVE5_BANK1_PIN09_V (1 << 6)
  583. #define PINCTRL_DRIVE5_BANK1_PIN09_MA_MASK (0x3 << 4)
  584. #define PINCTRL_DRIVE5_BANK1_PIN09_MA_OFFSET 4
  585. #define PINCTRL_DRIVE5_BANK1_PIN08_V (1 << 2)
  586. #define PINCTRL_DRIVE5_BANK1_PIN08_MA_MASK (0x3 << 0)
  587. #define PINCTRL_DRIVE5_BANK1_PIN08_MA_OFFSET 0
  588. #define PINCTRL_DRIVE6_BANK1_PIN23_V (1 << 30)
  589. #define PINCTRL_DRIVE6_BANK1_PIN23_MA_MASK (0x3 << 28)
  590. #define PINCTRL_DRIVE6_BANK1_PIN23_MA_OFFSET 28
  591. #define PINCTRL_DRIVE6_BANK1_PIN22_V (1 << 26)
  592. #define PINCTRL_DRIVE6_BANK1_PIN22_MA_MASK (0x3 << 24)
  593. #define PINCTRL_DRIVE6_BANK1_PIN22_MA_OFFSET 24
  594. #define PINCTRL_DRIVE6_BANK1_PIN21_V (1 << 22)
  595. #define PINCTRL_DRIVE6_BANK1_PIN21_MA_MASK (0x3 << 20)
  596. #define PINCTRL_DRIVE6_BANK1_PIN21_MA_OFFSET 20
  597. #define PINCTRL_DRIVE6_BANK1_PIN20_V (1 << 18)
  598. #define PINCTRL_DRIVE6_BANK1_PIN20_MA_MASK (0x3 << 16)
  599. #define PINCTRL_DRIVE6_BANK1_PIN20_MA_OFFSET 16
  600. #define PINCTRL_DRIVE6_BANK1_PIN19_V (1 << 14)
  601. #define PINCTRL_DRIVE6_BANK1_PIN19_MA_MASK (0x3 << 12)
  602. #define PINCTRL_DRIVE6_BANK1_PIN19_MA_OFFSET 12
  603. #define PINCTRL_DRIVE6_BANK1_PIN18_V (1 << 10)
  604. #define PINCTRL_DRIVE6_BANK1_PIN18_MA_MASK (0x3 << 8)
  605. #define PINCTRL_DRIVE6_BANK1_PIN18_MA_OFFSET 8
  606. #define PINCTRL_DRIVE6_BANK1_PIN17_V (1 << 6)
  607. #define PINCTRL_DRIVE6_BANK1_PIN17_MA_MASK (0x3 << 4)
  608. #define PINCTRL_DRIVE6_BANK1_PIN17_MA_OFFSET 4
  609. #define PINCTRL_DRIVE6_BANK1_PIN16_V (1 << 2)
  610. #define PINCTRL_DRIVE6_BANK1_PIN16_MA_MASK (0x3 << 0)
  611. #define PINCTRL_DRIVE6_BANK1_PIN16_MA_OFFSET 0
  612. #define PINCTRL_DRIVE7_BANK1_PIN31_V (1 << 30)
  613. #define PINCTRL_DRIVE7_BANK1_PIN31_MA_MASK (0x3 << 28)
  614. #define PINCTRL_DRIVE7_BANK1_PIN31_MA_OFFSET 28
  615. #define PINCTRL_DRIVE7_BANK1_PIN30_V (1 << 26)
  616. #define PINCTRL_DRIVE7_BANK1_PIN30_MA_MASK (0x3 << 24)
  617. #define PINCTRL_DRIVE7_BANK1_PIN30_MA_OFFSET 24
  618. #define PINCTRL_DRIVE7_BANK1_PIN29_V (1 << 22)
  619. #define PINCTRL_DRIVE7_BANK1_PIN29_MA_MASK (0x3 << 20)
  620. #define PINCTRL_DRIVE7_BANK1_PIN29_MA_OFFSET 20
  621. #define PINCTRL_DRIVE7_BANK1_PIN28_V (1 << 18)
  622. #define PINCTRL_DRIVE7_BANK1_PIN28_MA_MASK (0x3 << 16)
  623. #define PINCTRL_DRIVE7_BANK1_PIN28_MA_OFFSET 16
  624. #define PINCTRL_DRIVE7_BANK1_PIN27_V (1 << 14)
  625. #define PINCTRL_DRIVE7_BANK1_PIN27_MA_MASK (0x3 << 12)
  626. #define PINCTRL_DRIVE7_BANK1_PIN27_MA_OFFSET 12
  627. #define PINCTRL_DRIVE7_BANK1_PIN26_V (1 << 10)
  628. #define PINCTRL_DRIVE7_BANK1_PIN26_MA_MASK (0x3 << 8)
  629. #define PINCTRL_DRIVE7_BANK1_PIN26_MA_OFFSET 8
  630. #define PINCTRL_DRIVE7_BANK1_PIN25_V (1 << 6)
  631. #define PINCTRL_DRIVE7_BANK1_PIN25_MA_MASK (0x3 << 4)
  632. #define PINCTRL_DRIVE7_BANK1_PIN25_MA_OFFSET 4
  633. #define PINCTRL_DRIVE7_BANK1_PIN24_V (1 << 2)
  634. #define PINCTRL_DRIVE7_BANK1_PIN24_MA_MASK (0x3 << 0)
  635. #define PINCTRL_DRIVE7_BANK1_PIN24_MA_OFFSET 0
  636. #define PINCTRL_DRIVE8_BANK2_PIN07_V (1 << 30)
  637. #define PINCTRL_DRIVE8_BANK2_PIN07_MA_MASK (0x3 << 28)
  638. #define PINCTRL_DRIVE8_BANK2_PIN07_MA_OFFSET 28
  639. #define PINCTRL_DRIVE8_BANK2_PIN06_V (1 << 26)
  640. #define PINCTRL_DRIVE8_BANK2_PIN06_MA_MASK (0x3 << 24)
  641. #define PINCTRL_DRIVE8_BANK2_PIN06_MA_OFFSET 24
  642. #define PINCTRL_DRIVE8_BANK2_PIN05_V (1 << 22)
  643. #define PINCTRL_DRIVE8_BANK2_PIN05_MA_MASK (0x3 << 20)
  644. #define PINCTRL_DRIVE8_BANK2_PIN05_MA_OFFSET 20
  645. #define PINCTRL_DRIVE8_BANK2_PIN04_V (1 << 18)
  646. #define PINCTRL_DRIVE8_BANK2_PIN04_MA_MASK (0x3 << 16)
  647. #define PINCTRL_DRIVE8_BANK2_PIN04_MA_OFFSET 16
  648. #define PINCTRL_DRIVE8_BANK2_PIN03_V (1 << 14)
  649. #define PINCTRL_DRIVE8_BANK2_PIN03_MA_MASK (0x3 << 12)
  650. #define PINCTRL_DRIVE8_BANK2_PIN03_MA_OFFSET 12
  651. #define PINCTRL_DRIVE8_BANK2_PIN02_V (1 << 10)
  652. #define PINCTRL_DRIVE8_BANK2_PIN02_MA_MASK (0x3 << 8)
  653. #define PINCTRL_DRIVE8_BANK2_PIN02_MA_OFFSET 8
  654. #define PINCTRL_DRIVE8_BANK2_PIN01_V (1 << 6)
  655. #define PINCTRL_DRIVE8_BANK2_PIN01_MA_MASK (0x3 << 4)
  656. #define PINCTRL_DRIVE8_BANK2_PIN01_MA_OFFSET 4
  657. #define PINCTRL_DRIVE8_BANK2_PIN00_V (1 << 2)
  658. #define PINCTRL_DRIVE8_BANK2_PIN00_MA_MASK (0x3 << 0)
  659. #define PINCTRL_DRIVE8_BANK2_PIN00_MA_OFFSET 0
  660. #define PINCTRL_DRIVE9_BANK2_PIN15_V (1 << 30)
  661. #define PINCTRL_DRIVE9_BANK2_PIN15_MA_MASK (0x3 << 28)
  662. #define PINCTRL_DRIVE9_BANK2_PIN15_MA_OFFSET 28
  663. #define PINCTRL_DRIVE9_BANK2_PIN14_V (1 << 26)
  664. #define PINCTRL_DRIVE9_BANK2_PIN14_MA_MASK (0x3 << 24)
  665. #define PINCTRL_DRIVE9_BANK2_PIN14_MA_OFFSET 24
  666. #define PINCTRL_DRIVE9_BANK2_PIN13_V (1 << 22)
  667. #define PINCTRL_DRIVE9_BANK2_PIN13_MA_MASK (0x3 << 20)
  668. #define PINCTRL_DRIVE9_BANK2_PIN13_MA_OFFSET 20
  669. #define PINCTRL_DRIVE9_BANK2_PIN12_V (1 << 18)
  670. #define PINCTRL_DRIVE9_BANK2_PIN12_MA_MASK (0x3 << 16)
  671. #define PINCTRL_DRIVE9_BANK2_PIN12_MA_OFFSET 16
  672. #define PINCTRL_DRIVE9_BANK2_PIN10_V (1 << 10)
  673. #define PINCTRL_DRIVE9_BANK2_PIN10_MA_MASK (0x3 << 8)
  674. #define PINCTRL_DRIVE9_BANK2_PIN10_MA_OFFSET 8
  675. #define PINCTRL_DRIVE9_BANK2_PIN09_V (1 << 6)
  676. #define PINCTRL_DRIVE9_BANK2_PIN09_MA_MASK (0x3 << 4)
  677. #define PINCTRL_DRIVE9_BANK2_PIN09_MA_OFFSET 4
  678. #define PINCTRL_DRIVE9_BANK2_PIN08_V (1 << 2)
  679. #define PINCTRL_DRIVE9_BANK2_PIN08_MA_MASK (0x3 << 0)
  680. #define PINCTRL_DRIVE9_BANK2_PIN08_MA_OFFSET 0
  681. #define PINCTRL_DRIVE10_BANK2_PIN21_V (1 << 22)
  682. #define PINCTRL_DRIVE10_BANK2_PIN21_MA_MASK (0x3 << 20)
  683. #define PINCTRL_DRIVE10_BANK2_PIN21_MA_OFFSET 20
  684. #define PINCTRL_DRIVE10_BANK2_PIN20_V (1 << 18)
  685. #define PINCTRL_DRIVE10_BANK2_PIN20_MA_MASK (0x3 << 16)
  686. #define PINCTRL_DRIVE10_BANK2_PIN20_MA_OFFSET 16
  687. #define PINCTRL_DRIVE10_BANK2_PIN19_V (1 << 14)
  688. #define PINCTRL_DRIVE10_BANK2_PIN19_MA_MASK (0x3 << 12)
  689. #define PINCTRL_DRIVE10_BANK2_PIN19_MA_OFFSET 12
  690. #define PINCTRL_DRIVE10_BANK2_PIN18_V (1 << 10)
  691. #define PINCTRL_DRIVE10_BANK2_PIN18_MA_MASK (0x3 << 8)
  692. #define PINCTRL_DRIVE10_BANK2_PIN18_MA_OFFSET 8
  693. #define PINCTRL_DRIVE10_BANK2_PIN17_V (1 << 6)
  694. #define PINCTRL_DRIVE10_BANK2_PIN17_MA_MASK (0x3 << 4)
  695. #define PINCTRL_DRIVE10_BANK2_PIN17_MA_OFFSET 4
  696. #define PINCTRL_DRIVE10_BANK2_PIN16_V (1 << 2)
  697. #define PINCTRL_DRIVE10_BANK2_PIN16_MA_MASK (0x3 << 0)
  698. #define PINCTRL_DRIVE10_BANK2_PIN16_MA_OFFSET 0
  699. #define PINCTRL_DRIVE11_BANK2_PIN27_V (1 << 14)
  700. #define PINCTRL_DRIVE11_BANK2_PIN27_MA_MASK (0x3 << 12)
  701. #define PINCTRL_DRIVE11_BANK2_PIN27_MA_OFFSET 12
  702. #define PINCTRL_DRIVE11_BANK2_PIN26_V (1 << 10)
  703. #define PINCTRL_DRIVE11_BANK2_PIN26_MA_MASK (0x3 << 8)
  704. #define PINCTRL_DRIVE11_BANK2_PIN26_MA_OFFSET 8
  705. #define PINCTRL_DRIVE11_BANK2_PIN25_V (1 << 6)
  706. #define PINCTRL_DRIVE11_BANK2_PIN25_MA_MASK (0x3 << 4)
  707. #define PINCTRL_DRIVE11_BANK2_PIN25_MA_OFFSET 4
  708. #define PINCTRL_DRIVE11_BANK2_PIN24_V (1 << 2)
  709. #define PINCTRL_DRIVE11_BANK2_PIN24_MA_MASK (0x3 << 0)
  710. #define PINCTRL_DRIVE11_BANK2_PIN24_MA_OFFSET 0
  711. #define PINCTRL_DRIVE12_BANK3_PIN07_V (1 << 30)
  712. #define PINCTRL_DRIVE12_BANK3_PIN07_MA_MASK (0x3 << 28)
  713. #define PINCTRL_DRIVE12_BANK3_PIN07_MA_OFFSET 28
  714. #define PINCTRL_DRIVE12_BANK3_PIN06_V (1 << 26)
  715. #define PINCTRL_DRIVE12_BANK3_PIN06_MA_MASK (0x3 << 24)
  716. #define PINCTRL_DRIVE12_BANK3_PIN06_MA_OFFSET 24
  717. #define PINCTRL_DRIVE12_BANK3_PIN05_V (1 << 22)
  718. #define PINCTRL_DRIVE12_BANK3_PIN05_MA_MASK (0x3 << 20)
  719. #define PINCTRL_DRIVE12_BANK3_PIN05_MA_OFFSET 20
  720. #define PINCTRL_DRIVE12_BANK3_PIN04_V (1 << 18)
  721. #define PINCTRL_DRIVE12_BANK3_PIN04_MA_MASK (0x3 << 16)
  722. #define PINCTRL_DRIVE12_BANK3_PIN04_MA_OFFSET 16
  723. #define PINCTRL_DRIVE12_BANK3_PIN03_V (1 << 14)
  724. #define PINCTRL_DRIVE12_BANK3_PIN03_MA_MASK (0x3 << 12)
  725. #define PINCTRL_DRIVE12_BANK3_PIN03_MA_OFFSET 12
  726. #define PINCTRL_DRIVE12_BANK3_PIN02_V (1 << 10)
  727. #define PINCTRL_DRIVE12_BANK3_PIN02_MA_MASK (0x3 << 8)
  728. #define PINCTRL_DRIVE12_BANK3_PIN02_MA_OFFSET 8
  729. #define PINCTRL_DRIVE12_BANK3_PIN01_V (1 << 6)
  730. #define PINCTRL_DRIVE12_BANK3_PIN01_MA_MASK (0x3 << 4)
  731. #define PINCTRL_DRIVE12_BANK3_PIN01_MA_OFFSET 4
  732. #define PINCTRL_DRIVE12_BANK3_PIN00_V (1 << 2)
  733. #define PINCTRL_DRIVE12_BANK3_PIN00_MA_MASK (0x3 << 0)
  734. #define PINCTRL_DRIVE12_BANK3_PIN00_MA_OFFSET 0
  735. #define PINCTRL_DRIVE13_BANK3_PIN15_V (1 << 30)
  736. #define PINCTRL_DRIVE13_BANK3_PIN15_MA_MASK (0x3 << 28)
  737. #define PINCTRL_DRIVE13_BANK3_PIN15_MA_OFFSET 28
  738. #define PINCTRL_DRIVE13_BANK3_PIN14_V (1 << 26)
  739. #define PINCTRL_DRIVE13_BANK3_PIN14_MA_MASK (0x3 << 24)
  740. #define PINCTRL_DRIVE13_BANK3_PIN14_MA_OFFSET 24
  741. #define PINCTRL_DRIVE13_BANK3_PIN13_V (1 << 22)
  742. #define PINCTRL_DRIVE13_BANK3_PIN13_MA_MASK (0x3 << 20)
  743. #define PINCTRL_DRIVE13_BANK3_PIN13_MA_OFFSET 20
  744. #define PINCTRL_DRIVE13_BANK3_PIN12_V (1 << 18)
  745. #define PINCTRL_DRIVE13_BANK3_PIN12_MA_MASK (0x3 << 16)
  746. #define PINCTRL_DRIVE13_BANK3_PIN12_MA_OFFSET 16
  747. #define PINCTRL_DRIVE13_BANK3_PIN11_V (1 << 14)
  748. #define PINCTRL_DRIVE13_BANK3_PIN11_MA_MASK (0x3 << 12)
  749. #define PINCTRL_DRIVE13_BANK3_PIN11_MA_OFFSET 12
  750. #define PINCTRL_DRIVE13_BANK3_PIN10_V (1 << 10)
  751. #define PINCTRL_DRIVE13_BANK3_PIN10_MA_MASK (0x3 << 8)
  752. #define PINCTRL_DRIVE13_BANK3_PIN10_MA_OFFSET 8
  753. #define PINCTRL_DRIVE13_BANK3_PIN09_V (1 << 6)
  754. #define PINCTRL_DRIVE13_BANK3_PIN09_MA_MASK (0x3 << 4)
  755. #define PINCTRL_DRIVE13_BANK3_PIN09_MA_OFFSET 4
  756. #define PINCTRL_DRIVE13_BANK3_PIN08_V (1 << 2)
  757. #define PINCTRL_DRIVE13_BANK3_PIN08_MA_MASK (0x3 << 0)
  758. #define PINCTRL_DRIVE13_BANK3_PIN08_MA_OFFSET 0
  759. #define PINCTRL_DRIVE14_BANK3_PIN23_V (1 << 30)
  760. #define PINCTRL_DRIVE14_BANK3_PIN23_MA_MASK (0x3 << 28)
  761. #define PINCTRL_DRIVE14_BANK3_PIN23_MA_OFFSET 28
  762. #define PINCTRL_DRIVE14_BANK3_PIN22_V (1 << 26)
  763. #define PINCTRL_DRIVE14_BANK3_PIN22_MA_MASK (0x3 << 24)
  764. #define PINCTRL_DRIVE14_BANK3_PIN22_MA_OFFSET 24
  765. #define PINCTRL_DRIVE14_BANK3_PIN21_V (1 << 22)
  766. #define PINCTRL_DRIVE14_BANK3_PIN21_MA_MASK (0x3 << 20)
  767. #define PINCTRL_DRIVE14_BANK3_PIN21_MA_OFFSET 20
  768. #define PINCTRL_DRIVE14_BANK3_PIN20_V (1 << 18)
  769. #define PINCTRL_DRIVE14_BANK3_PIN20_MA_MASK (0x3 << 16)
  770. #define PINCTRL_DRIVE14_BANK3_PIN20_MA_OFFSET 16
  771. #define PINCTRL_DRIVE14_BANK3_PIN18_V (1 << 10)
  772. #define PINCTRL_DRIVE14_BANK3_PIN18_MA_MASK (0x3 << 8)
  773. #define PINCTRL_DRIVE14_BANK3_PIN18_MA_OFFSET 8
  774. #define PINCTRL_DRIVE14_BANK3_PIN17_V (1 << 6)
  775. #define PINCTRL_DRIVE14_BANK3_PIN17_MA_MASK (0x3 << 4)
  776. #define PINCTRL_DRIVE14_BANK3_PIN17_MA_OFFSET 4
  777. #define PINCTRL_DRIVE14_BANK3_PIN16_V (1 << 2)
  778. #define PINCTRL_DRIVE14_BANK3_PIN16_MA_MASK (0x3 << 0)
  779. #define PINCTRL_DRIVE14_BANK3_PIN16_MA_OFFSET 0
  780. #define PINCTRL_DRIVE15_BANK3_PIN30_V (1 << 26)
  781. #define PINCTRL_DRIVE15_BANK3_PIN30_MA_MASK (0x3 << 24)
  782. #define PINCTRL_DRIVE15_BANK3_PIN30_MA_OFFSET 24
  783. #define PINCTRL_DRIVE15_BANK3_PIN29_V (1 << 22)
  784. #define PINCTRL_DRIVE15_BANK3_PIN29_MA_MASK (0x3 << 20)
  785. #define PINCTRL_DRIVE15_BANK3_PIN29_MA_OFFSET 20
  786. #define PINCTRL_DRIVE15_BANK3_PIN28_V (1 << 18)
  787. #define PINCTRL_DRIVE15_BANK3_PIN28_MA_MASK (0x3 << 16)
  788. #define PINCTRL_DRIVE15_BANK3_PIN28_MA_OFFSET 16
  789. #define PINCTRL_DRIVE15_BANK3_PIN27_V (1 << 14)
  790. #define PINCTRL_DRIVE15_BANK3_PIN27_MA_MASK (0x3 << 12)
  791. #define PINCTRL_DRIVE15_BANK3_PIN27_MA_OFFSET 12
  792. #define PINCTRL_DRIVE15_BANK3_PIN26_V (1 << 10)
  793. #define PINCTRL_DRIVE15_BANK3_PIN26_MA_MASK (0x3 << 8)
  794. #define PINCTRL_DRIVE15_BANK3_PIN26_MA_OFFSET 8
  795. #define PINCTRL_DRIVE15_BANK3_PIN25_V (1 << 6)
  796. #define PINCTRL_DRIVE15_BANK3_PIN25_MA_MASK (0x3 << 4)
  797. #define PINCTRL_DRIVE15_BANK3_PIN25_MA_OFFSET 4
  798. #define PINCTRL_DRIVE15_BANK3_PIN24_V (1 << 2)
  799. #define PINCTRL_DRIVE15_BANK3_PIN24_MA_MASK (0x3 << 0)
  800. #define PINCTRL_DRIVE15_BANK3_PIN24_MA_OFFSET 0
  801. #define PINCTRL_DRIVE16_BANK4_PIN07_V (1 << 30)
  802. #define PINCTRL_DRIVE16_BANK4_PIN07_MA_MASK (0x3 << 28)
  803. #define PINCTRL_DRIVE16_BANK4_PIN07_MA_OFFSET 28
  804. #define PINCTRL_DRIVE16_BANK4_PIN06_V (1 << 26)
  805. #define PINCTRL_DRIVE16_BANK4_PIN06_MA_MASK (0x3 << 24)
  806. #define PINCTRL_DRIVE16_BANK4_PIN06_MA_OFFSET 24
  807. #define PINCTRL_DRIVE16_BANK4_PIN05_V (1 << 22)
  808. #define PINCTRL_DRIVE16_BANK4_PIN05_MA_MASK (0x3 << 20)
  809. #define PINCTRL_DRIVE16_BANK4_PIN05_MA_OFFSET 20
  810. #define PINCTRL_DRIVE16_BANK4_PIN04_V (1 << 18)
  811. #define PINCTRL_DRIVE16_BANK4_PIN04_MA_MASK (0x3 << 16)
  812. #define PINCTRL_DRIVE16_BANK4_PIN04_MA_OFFSET 16
  813. #define PINCTRL_DRIVE16_BANK4_PIN03_V (1 << 14)
  814. #define PINCTRL_DRIVE16_BANK4_PIN03_MA_MASK (0x3 << 12)
  815. #define PINCTRL_DRIVE16_BANK4_PIN03_MA_OFFSET 12
  816. #define PINCTRL_DRIVE16_BANK4_PIN02_V (1 << 10)
  817. #define PINCTRL_DRIVE16_BANK4_PIN02_MA_MASK (0x3 << 8)
  818. #define PINCTRL_DRIVE16_BANK4_PIN02_MA_OFFSET 8
  819. #define PINCTRL_DRIVE16_BANK4_PIN01_V (1 << 6)
  820. #define PINCTRL_DRIVE16_BANK4_PIN01_MA_MASK (0x3 << 4)
  821. #define PINCTRL_DRIVE16_BANK4_PIN01_MA_OFFSET 4
  822. #define PINCTRL_DRIVE16_BANK4_PIN00_V (1 << 2)
  823. #define PINCTRL_DRIVE16_BANK4_PIN00_MA_MASK (0x3 << 0)
  824. #define PINCTRL_DRIVE16_BANK4_PIN00_MA_OFFSET 0
  825. #define PINCTRL_DRIVE17_BANK4_PIN15_V (1 << 30)
  826. #define PINCTRL_DRIVE17_BANK4_PIN15_MA_MASK (0x3 << 28)
  827. #define PINCTRL_DRIVE17_BANK4_PIN15_MA_OFFSET 28
  828. #define PINCTRL_DRIVE17_BANK4_PIN14_V (1 << 26)
  829. #define PINCTRL_DRIVE17_BANK4_PIN14_MA_MASK (0x3 << 24)
  830. #define PINCTRL_DRIVE17_BANK4_PIN14_MA_OFFSET 24
  831. #define PINCTRL_DRIVE17_BANK4_PIN13_V (1 << 22)
  832. #define PINCTRL_DRIVE17_BANK4_PIN13_MA_MASK (0x3 << 20)
  833. #define PINCTRL_DRIVE17_BANK4_PIN13_MA_OFFSET 20
  834. #define PINCTRL_DRIVE17_BANK4_PIN12_V (1 << 18)
  835. #define PINCTRL_DRIVE17_BANK4_PIN12_MA_MASK (0x3 << 16)
  836. #define PINCTRL_DRIVE17_BANK4_PIN12_MA_OFFSET 16
  837. #define PINCTRL_DRIVE17_BANK4_PIN11_V (1 << 14)
  838. #define PINCTRL_DRIVE17_BANK4_PIN11_MA_MASK (0x3 << 12)
  839. #define PINCTRL_DRIVE17_BANK4_PIN11_MA_OFFSET 12
  840. #define PINCTRL_DRIVE17_BANK4_PIN10_V (1 << 10)
  841. #define PINCTRL_DRIVE17_BANK4_PIN10_MA_MASK (0x3 << 8)
  842. #define PINCTRL_DRIVE17_BANK4_PIN10_MA_OFFSET 8
  843. #define PINCTRL_DRIVE17_BANK4_PIN09_V (1 << 6)
  844. #define PINCTRL_DRIVE17_BANK4_PIN09_MA_MASK (0x3 << 4)
  845. #define PINCTRL_DRIVE17_BANK4_PIN09_MA_OFFSET 4
  846. #define PINCTRL_DRIVE17_BANK4_PIN08_V (1 << 2)
  847. #define PINCTRL_DRIVE17_BANK4_PIN08_MA_MASK (0x3 << 0)
  848. #define PINCTRL_DRIVE17_BANK4_PIN08_MA_OFFSET 0
  849. #define PINCTRL_DRIVE18_BANK4_PIN20_V (1 << 18)
  850. #define PINCTRL_DRIVE18_BANK4_PIN20_MA_MASK (0x3 << 16)
  851. #define PINCTRL_DRIVE18_BANK4_PIN20_MA_OFFSET 16
  852. #define PINCTRL_DRIVE18_BANK4_PIN16_V (1 << 2)
  853. #define PINCTRL_DRIVE18_BANK4_PIN16_MA_MASK (0x3 << 0)
  854. #define PINCTRL_DRIVE18_BANK4_PIN16_MA_OFFSET 0
  855. #define PINCTRL_PULL0_BANK0_PIN28 (1 << 28)
  856. #define PINCTRL_PULL0_BANK0_PIN27 (1 << 27)
  857. #define PINCTRL_PULL0_BANK0_PIN26 (1 << 26)
  858. #define PINCTRL_PULL0_BANK0_PIN25 (1 << 25)
  859. #define PINCTRL_PULL0_BANK0_PIN24 (1 << 24)
  860. #define PINCTRL_PULL0_BANK0_PIN23 (1 << 23)
  861. #define PINCTRL_PULL0_BANK0_PIN22 (1 << 22)
  862. #define PINCTRL_PULL0_BANK0_PIN21 (1 << 21)
  863. #define PINCTRL_PULL0_BANK0_PIN20 (1 << 20)
  864. #define PINCTRL_PULL0_BANK0_PIN19 (1 << 19)
  865. #define PINCTRL_PULL0_BANK0_PIN18 (1 << 18)
  866. #define PINCTRL_PULL0_BANK0_PIN17 (1 << 17)
  867. #define PINCTRL_PULL0_BANK0_PIN16 (1 << 16)
  868. #define PINCTRL_PULL0_BANK0_PIN07 (1 << 7)
  869. #define PINCTRL_PULL0_BANK0_PIN06 (1 << 6)
  870. #define PINCTRL_PULL0_BANK0_PIN05 (1 << 5)
  871. #define PINCTRL_PULL0_BANK0_PIN04 (1 << 4)
  872. #define PINCTRL_PULL0_BANK0_PIN03 (1 << 3)
  873. #define PINCTRL_PULL0_BANK0_PIN02 (1 << 2)
  874. #define PINCTRL_PULL0_BANK0_PIN01 (1 << 1)
  875. #define PINCTRL_PULL0_BANK0_PIN00 (1 << 0)
  876. #define PINCTRL_PULL1_BANK1_PIN31 (1 << 31)
  877. #define PINCTRL_PULL1_BANK1_PIN30 (1 << 30)
  878. #define PINCTRL_PULL1_BANK1_PIN29 (1 << 29)
  879. #define PINCTRL_PULL1_BANK1_PIN28 (1 << 28)
  880. #define PINCTRL_PULL1_BANK1_PIN27 (1 << 27)
  881. #define PINCTRL_PULL1_BANK1_PIN26 (1 << 26)
  882. #define PINCTRL_PULL1_BANK1_PIN25 (1 << 25)
  883. #define PINCTRL_PULL1_BANK1_PIN24 (1 << 24)
  884. #define PINCTRL_PULL1_BANK1_PIN23 (1 << 23)
  885. #define PINCTRL_PULL1_BANK1_PIN22 (1 << 22)
  886. #define PINCTRL_PULL1_BANK1_PIN21 (1 << 21)
  887. #define PINCTRL_PULL1_BANK1_PIN20 (1 << 20)
  888. #define PINCTRL_PULL1_BANK1_PIN19 (1 << 19)
  889. #define PINCTRL_PULL1_BANK1_PIN18 (1 << 18)
  890. #define PINCTRL_PULL1_BANK1_PIN17 (1 << 17)
  891. #define PINCTRL_PULL1_BANK1_PIN16 (1 << 16)
  892. #define PINCTRL_PULL1_BANK1_PIN15 (1 << 15)
  893. #define PINCTRL_PULL1_BANK1_PIN14 (1 << 14)
  894. #define PINCTRL_PULL1_BANK1_PIN13 (1 << 13)
  895. #define PINCTRL_PULL1_BANK1_PIN12 (1 << 12)
  896. #define PINCTRL_PULL1_BANK1_PIN11 (1 << 11)
  897. #define PINCTRL_PULL1_BANK1_PIN10 (1 << 10)
  898. #define PINCTRL_PULL1_BANK1_PIN09 (1 << 9)
  899. #define PINCTRL_PULL1_BANK1_PIN08 (1 << 8)
  900. #define PINCTRL_PULL1_BANK1_PIN07 (1 << 7)
  901. #define PINCTRL_PULL1_BANK1_PIN06 (1 << 6)
  902. #define PINCTRL_PULL1_BANK1_PIN05 (1 << 5)
  903. #define PINCTRL_PULL1_BANK1_PIN04 (1 << 4)
  904. #define PINCTRL_PULL1_BANK1_PIN03 (1 << 3)
  905. #define PINCTRL_PULL1_BANK1_PIN02 (1 << 2)
  906. #define PINCTRL_PULL1_BANK1_PIN01 (1 << 1)
  907. #define PINCTRL_PULL1_BANK1_PIN00 (1 << 0)
  908. #define PINCTRL_PULL2_BANK2_PIN27 (1 << 27)
  909. #define PINCTRL_PULL2_BANK2_PIN26 (1 << 26)
  910. #define PINCTRL_PULL2_BANK2_PIN25 (1 << 25)
  911. #define PINCTRL_PULL2_BANK2_PIN24 (1 << 24)
  912. #define PINCTRL_PULL2_BANK2_PIN21 (1 << 21)
  913. #define PINCTRL_PULL2_BANK2_PIN20 (1 << 20)
  914. #define PINCTRL_PULL2_BANK2_PIN19 (1 << 19)
  915. #define PINCTRL_PULL2_BANK2_PIN18 (1 << 18)
  916. #define PINCTRL_PULL2_BANK2_PIN17 (1 << 17)
  917. #define PINCTRL_PULL2_BANK2_PIN16 (1 << 16)
  918. #define PINCTRL_PULL2_BANK2_PIN15 (1 << 15)
  919. #define PINCTRL_PULL2_BANK2_PIN14 (1 << 14)
  920. #define PINCTRL_PULL2_BANK2_PIN13 (1 << 13)
  921. #define PINCTRL_PULL2_BANK2_PIN12 (1 << 12)
  922. #define PINCTRL_PULL2_BANK2_PIN10 (1 << 10)
  923. #define PINCTRL_PULL2_BANK2_PIN09 (1 << 9)
  924. #define PINCTRL_PULL2_BANK2_PIN08 (1 << 8)
  925. #define PINCTRL_PULL2_BANK2_PIN07 (1 << 7)
  926. #define PINCTRL_PULL2_BANK2_PIN06 (1 << 6)
  927. #define PINCTRL_PULL2_BANK2_PIN05 (1 << 5)
  928. #define PINCTRL_PULL2_BANK2_PIN04 (1 << 4)
  929. #define PINCTRL_PULL2_BANK2_PIN03 (1 << 3)
  930. #define PINCTRL_PULL2_BANK2_PIN02 (1 << 2)
  931. #define PINCTRL_PULL2_BANK2_PIN01 (1 << 1)
  932. #define PINCTRL_PULL2_BANK2_PIN00 (1 << 0)
  933. #define PINCTRL_PULL3_BANK3_PIN30 (1 << 30)
  934. #define PINCTRL_PULL3_BANK3_PIN29 (1 << 29)
  935. #define PINCTRL_PULL3_BANK3_PIN28 (1 << 28)
  936. #define PINCTRL_PULL3_BANK3_PIN27 (1 << 27)
  937. #define PINCTRL_PULL3_BANK3_PIN26 (1 << 26)
  938. #define PINCTRL_PULL3_BANK3_PIN25 (1 << 25)
  939. #define PINCTRL_PULL3_BANK3_PIN24 (1 << 24)
  940. #define PINCTRL_PULL3_BANK3_PIN23 (1 << 23)
  941. #define PINCTRL_PULL3_BANK3_PIN22 (1 << 22)
  942. #define PINCTRL_PULL3_BANK3_PIN21 (1 << 21)
  943. #define PINCTRL_PULL3_BANK3_PIN20 (1 << 20)
  944. #define PINCTRL_PULL3_BANK3_PIN18 (1 << 18)
  945. #define PINCTRL_PULL3_BANK3_PIN17 (1 << 17)
  946. #define PINCTRL_PULL3_BANK3_PIN16 (1 << 16)
  947. #define PINCTRL_PULL3_BANK3_PIN15 (1 << 15)
  948. #define PINCTRL_PULL3_BANK3_PIN14 (1 << 14)
  949. #define PINCTRL_PULL3_BANK3_PIN13 (1 << 13)
  950. #define PINCTRL_PULL3_BANK3_PIN12 (1 << 12)
  951. #define PINCTRL_PULL3_BANK3_PIN11 (1 << 11)
  952. #define PINCTRL_PULL3_BANK3_PIN10 (1 << 10)
  953. #define PINCTRL_PULL3_BANK3_PIN09 (1 << 9)
  954. #define PINCTRL_PULL3_BANK3_PIN08 (1 << 8)
  955. #define PINCTRL_PULL3_BANK3_PIN07 (1 << 7)
  956. #define PINCTRL_PULL3_BANK3_PIN06 (1 << 6)
  957. #define PINCTRL_PULL3_BANK3_PIN05 (1 << 5)
  958. #define PINCTRL_PULL3_BANK3_PIN04 (1 << 4)
  959. #define PINCTRL_PULL3_BANK3_PIN03 (1 << 3)
  960. #define PINCTRL_PULL3_BANK3_PIN02 (1 << 2)
  961. #define PINCTRL_PULL3_BANK3_PIN01 (1 << 1)
  962. #define PINCTRL_PULL3_BANK3_PIN00 (1 << 0)
  963. #define PINCTRL_PULL4_BANK4_PIN20 (1 << 20)
  964. #define PINCTRL_PULL4_BANK4_PIN16 (1 << 16)
  965. #define PINCTRL_PULL4_BANK4_PIN15 (1 << 15)
  966. #define PINCTRL_PULL4_BANK4_PIN14 (1 << 14)
  967. #define PINCTRL_PULL4_BANK4_PIN13 (1 << 13)
  968. #define PINCTRL_PULL4_BANK4_PIN12 (1 << 12)
  969. #define PINCTRL_PULL4_BANK4_PIN11 (1 << 11)
  970. #define PINCTRL_PULL4_BANK4_PIN10 (1 << 10)
  971. #define PINCTRL_PULL4_BANK4_PIN09 (1 << 9)
  972. #define PINCTRL_PULL4_BANK4_PIN08 (1 << 8)
  973. #define PINCTRL_PULL4_BANK4_PIN07 (1 << 7)
  974. #define PINCTRL_PULL4_BANK4_PIN06 (1 << 6)
  975. #define PINCTRL_PULL4_BANK4_PIN05 (1 << 5)
  976. #define PINCTRL_PULL4_BANK4_PIN04 (1 << 4)
  977. #define PINCTRL_PULL4_BANK4_PIN03 (1 << 3)
  978. #define PINCTRL_PULL4_BANK4_PIN02 (1 << 2)
  979. #define PINCTRL_PULL4_BANK4_PIN01 (1 << 1)
  980. #define PINCTRL_PULL4_BANK4_PIN00 (1 << 0)
  981. #define PINCTRL_PULL5_BANK5_PIN26 (1 << 26)
  982. #define PINCTRL_PULL5_BANK5_PIN23 (1 << 23)
  983. #define PINCTRL_PULL5_BANK5_PIN22 (1 << 22)
  984. #define PINCTRL_PULL5_BANK5_PIN21 (1 << 21)
  985. #define PINCTRL_PULL5_BANK5_PIN20 (1 << 20)
  986. #define PINCTRL_PULL5_BANK5_PIN19 (1 << 19)
  987. #define PINCTRL_PULL5_BANK5_PIN18 (1 << 18)
  988. #define PINCTRL_PULL5_BANK5_PIN17 (1 << 17)
  989. #define PINCTRL_PULL5_BANK5_PIN16 (1 << 16)
  990. #define PINCTRL_PULL5_BANK5_PIN15 (1 << 15)
  991. #define PINCTRL_PULL5_BANK5_PIN14 (1 << 14)
  992. #define PINCTRL_PULL5_BANK5_PIN13 (1 << 13)
  993. #define PINCTRL_PULL5_BANK5_PIN12 (1 << 12)
  994. #define PINCTRL_PULL5_BANK5_PIN11 (1 << 11)
  995. #define PINCTRL_PULL5_BANK5_PIN10 (1 << 10)
  996. #define PINCTRL_PULL5_BANK5_PIN09 (1 << 9)
  997. #define PINCTRL_PULL5_BANK5_PIN08 (1 << 8)
  998. #define PINCTRL_PULL5_BANK5_PIN07 (1 << 7)
  999. #define PINCTRL_PULL5_BANK5_PIN06 (1 << 6)
  1000. #define PINCTRL_PULL5_BANK5_PIN05 (1 << 5)
  1001. #define PINCTRL_PULL5_BANK5_PIN04 (1 << 4)
  1002. #define PINCTRL_PULL5_BANK5_PIN03 (1 << 3)
  1003. #define PINCTRL_PULL5_BANK5_PIN02 (1 << 2)
  1004. #define PINCTRL_PULL5_BANK5_PIN01 (1 << 1)
  1005. #define PINCTRL_PULL5_BANK5_PIN00 (1 << 0)
  1006. #define PINCTRL_PULL6_BANK6_PIN24 (1 << 24)
  1007. #define PINCTRL_PULL6_BANK6_PIN23 (1 << 23)
  1008. #define PINCTRL_PULL6_BANK6_PIN22 (1 << 22)
  1009. #define PINCTRL_PULL6_BANK6_PIN21 (1 << 21)
  1010. #define PINCTRL_PULL6_BANK6_PIN20 (1 << 20)
  1011. #define PINCTRL_PULL6_BANK6_PIN19 (1 << 19)
  1012. #define PINCTRL_PULL6_BANK6_PIN18 (1 << 18)
  1013. #define PINCTRL_PULL6_BANK6_PIN17 (1 << 17)
  1014. #define PINCTRL_PULL6_BANK6_PIN16 (1 << 16)
  1015. #define PINCTRL_PULL6_BANK6_PIN14 (1 << 14)
  1016. #define PINCTRL_PULL6_BANK6_PIN13 (1 << 13)
  1017. #define PINCTRL_PULL6_BANK6_PIN12 (1 << 12)
  1018. #define PINCTRL_PULL6_BANK6_PIN11 (1 << 11)
  1019. #define PINCTRL_PULL6_BANK6_PIN10 (1 << 10)
  1020. #define PINCTRL_PULL6_BANK6_PIN09 (1 << 9)
  1021. #define PINCTRL_PULL6_BANK6_PIN08 (1 << 8)
  1022. #define PINCTRL_PULL6_BANK6_PIN07 (1 << 7)
  1023. #define PINCTRL_PULL6_BANK6_PIN06 (1 << 6)
  1024. #define PINCTRL_PULL6_BANK6_PIN05 (1 << 5)
  1025. #define PINCTRL_PULL6_BANK6_PIN04 (1 << 4)
  1026. #define PINCTRL_PULL6_BANK6_PIN03 (1 << 3)
  1027. #define PINCTRL_PULL6_BANK6_PIN02 (1 << 2)
  1028. #define PINCTRL_PULL6_BANK6_PIN01 (1 << 1)
  1029. #define PINCTRL_PULL6_BANK6_PIN00 (1 << 0)
  1030. #define PINCTRL_DOUT0_DOUT_MASK 0x1fffffff
  1031. #define PINCTRL_DOUT0_DOUT_OFFSET 0
  1032. #define PINCTRL_DOUT1_DOUT_MASK 0xffffffff
  1033. #define PINCTRL_DOUT1_DOUT_OFFSET 0
  1034. #define PINCTRL_DOUT2_DOUT_MASK 0xfffffff
  1035. #define PINCTRL_DOUT2_DOUT_OFFSET 0
  1036. #define PINCTRL_DOUT3_DOUT_MASK 0x7fffffff
  1037. #define PINCTRL_DOUT3_DOUT_OFFSET 0
  1038. #define PINCTRL_DOUT4_DOUT_MASK 0x1fffff
  1039. #define PINCTRL_DOUT4_DOUT_OFFSET 0
  1040. #define PINCTRL_DIN0_DIN_MASK 0x1fffffff
  1041. #define PINCTRL_DIN0_DIN_OFFSET 0
  1042. #define PINCTRL_DIN1_DIN_MASK 0xffffffff
  1043. #define PINCTRL_DIN1_DIN_OFFSET 0
  1044. #define PINCTRL_DIN2_DIN_MASK 0xfffffff
  1045. #define PINCTRL_DIN2_DIN_OFFSET 0
  1046. #define PINCTRL_DIN3_DIN_MASK 0x7fffffff
  1047. #define PINCTRL_DIN3_DIN_OFFSET 0
  1048. #define PINCTRL_DIN4_DIN_MASK 0x1fffff
  1049. #define PINCTRL_DIN4_DIN_OFFSET 0
  1050. #define PINCTRL_DOE0_DOE_MASK 0x1fffffff
  1051. #define PINCTRL_DOE0_DOE_OFFSET 0
  1052. #define PINCTRL_DOE1_DOE_MASK 0xffffffff
  1053. #define PINCTRL_DOE1_DOE_OFFSET 0
  1054. #define PINCTRL_DOE2_DOE_MASK 0xfffffff
  1055. #define PINCTRL_DOE2_DOE_OFFSET 0
  1056. #define PINCTRL_DOE3_DOE_MASK 0x7fffffff
  1057. #define PINCTRL_DOE3_DOE_OFFSET 0
  1058. #define PINCTRL_DOE4_DOE_MASK 0x1fffff
  1059. #define PINCTRL_DOE4_DOE_OFFSET 0
  1060. #define PINCTRL_PIN2IRQ0_PIN2IRQ_MASK 0x1fffffff
  1061. #define PINCTRL_PIN2IRQ0_PIN2IRQ_OFFSET 0
  1062. #define PINCTRL_PIN2IRQ1_PIN2IRQ_MASK 0xffffffff
  1063. #define PINCTRL_PIN2IRQ1_PIN2IRQ_OFFSET 0
  1064. #define PINCTRL_PIN2IRQ2_PIN2IRQ_MASK 0xfffffff
  1065. #define PINCTRL_PIN2IRQ2_PIN2IRQ_OFFSET 0
  1066. #define PINCTRL_PIN2IRQ3_PIN2IRQ_MASK 0x7fffffff
  1067. #define PINCTRL_PIN2IRQ3_PIN2IRQ_OFFSET 0
  1068. #define PINCTRL_PIN2IRQ4_PIN2IRQ_MASK 0x1fffff
  1069. #define PINCTRL_PIN2IRQ4_PIN2IRQ_OFFSET 0
  1070. #define PINCTRL_IRQEN0_IRQEN_MASK 0x1fffffff
  1071. #define PINCTRL_IRQEN0_IRQEN_OFFSET 0
  1072. #define PINCTRL_IRQEN1_IRQEN_MASK 0xffffffff
  1073. #define PINCTRL_IRQEN1_IRQEN_OFFSET 0
  1074. #define PINCTRL_IRQEN2_IRQEN_MASK 0xfffffff
  1075. #define PINCTRL_IRQEN2_IRQEN_OFFSET 0
  1076. #define PINCTRL_IRQEN3_IRQEN_MASK 0x7fffffff
  1077. #define PINCTRL_IRQEN3_IRQEN_OFFSET 0
  1078. #define PINCTRL_IRQEN4_IRQEN_MASK 0x1fffff
  1079. #define PINCTRL_IRQEN4_IRQEN_OFFSET 0
  1080. #define PINCTRL_IRQLEVEL0_IRQLEVEL_MASK 0x1fffffff
  1081. #define PINCTRL_IRQLEVEL0_IRQLEVEL_OFFSET 0
  1082. #define PINCTRL_IRQLEVEL1_IRQLEVEL_MASK 0xffffffff
  1083. #define PINCTRL_IRQLEVEL1_IRQLEVEL_OFFSET 0
  1084. #define PINCTRL_IRQLEVEL2_IRQLEVEL_MASK 0xfffffff
  1085. #define PINCTRL_IRQLEVEL2_IRQLEVEL_OFFSET 0
  1086. #define PINCTRL_IRQLEVEL3_IRQLEVEL_MASK 0x7fffffff
  1087. #define PINCTRL_IRQLEVEL3_IRQLEVEL_OFFSET 0
  1088. #define PINCTRL_IRQLEVEL4_IRQLEVEL_MASK 0x1fffff
  1089. #define PINCTRL_IRQLEVEL4_IRQLEVEL_OFFSET 0
  1090. #define PINCTRL_IRQPOL0_IRQPOL_MASK 0x1fffffff
  1091. #define PINCTRL_IRQPOL0_IRQPOL_OFFSET 0
  1092. #define PINCTRL_IRQPOL1_IRQPOL_MASK 0xffffffff
  1093. #define PINCTRL_IRQPOL1_IRQPOL_OFFSET 0
  1094. #define PINCTRL_IRQPOL2_IRQPOL_MASK 0xfffffff
  1095. #define PINCTRL_IRQPOL2_IRQPOL_OFFSET 0
  1096. #define PINCTRL_IRQPOL3_IRQPOL_MASK 0x7fffffff
  1097. #define PINCTRL_IRQPOL3_IRQPOL_OFFSET 0
  1098. #define PINCTRL_IRQPOL4_IRQPOL_MASK 0x1fffff
  1099. #define PINCTRL_IRQPOL4_IRQPOL_OFFSET 0
  1100. #define PINCTRL_IRQSTAT0_IRQSTAT_MASK 0x1fffffff
  1101. #define PINCTRL_IRQSTAT0_IRQSTAT_OFFSET 0
  1102. #define PINCTRL_IRQSTAT1_IRQSTAT_MASK 0xffffffff
  1103. #define PINCTRL_IRQSTAT1_IRQSTAT_OFFSET 0
  1104. #define PINCTRL_IRQSTAT2_IRQSTAT_MASK 0xfffffff
  1105. #define PINCTRL_IRQSTAT2_IRQSTAT_OFFSET 0
  1106. #define PINCTRL_IRQSTAT3_IRQSTAT_MASK 0x7fffffff
  1107. #define PINCTRL_IRQSTAT3_IRQSTAT_OFFSET 0
  1108. #define PINCTRL_IRQSTAT4_IRQSTAT_MASK 0x1fffff
  1109. #define PINCTRL_IRQSTAT4_IRQSTAT_OFFSET 0
  1110. #define PINCTRL_EMI_ODT_CTRL_ADDRESS_CALIB_MASK (0x3 << 26)
  1111. #define PINCTRL_EMI_ODT_CTRL_ADDRESS_CALIB_OFFSET 26
  1112. #define PINCTRL_EMI_ODT_CTRL_ADDRESS_TLOAD_MASK (0x3 << 24)
  1113. #define PINCTRL_EMI_ODT_CTRL_ADDRESS_TLOAD_OFFSET 24
  1114. #define PINCTRL_EMI_ODT_CTRL_CONTROL_CALIB_MASK (0x3 << 22)
  1115. #define PINCTRL_EMI_ODT_CTRL_CONTROL_CALIB_OFFSET 22
  1116. #define PINCTRL_EMI_ODT_CTRL_CONTROL_TLOAD_MASK (0x3 << 20)
  1117. #define PINCTRL_EMI_ODT_CTRL_CONTROL_TLOAD_OFFSET 20
  1118. #define PINCTRL_EMI_ODT_CTRL_DUALPAD_CALIB_MASK (0x3 << 18)
  1119. #define PINCTRL_EMI_ODT_CTRL_DUALPAD_CALIB_OFFSET 18
  1120. #define PINCTRL_EMI_ODT_CTRL_DUALPAD_TLOAD_MASK (0x3 << 16)
  1121. #define PINCTRL_EMI_ODT_CTRL_DUALPAD_TLOAD_OFFSET 16
  1122. #define PINCTRL_EMI_ODT_CTRL_SLICE3_CALIB_MASK (0x3 << 14)
  1123. #define PINCTRL_EMI_ODT_CTRL_SLICE3_CALIB_OFFSET 14
  1124. #define PINCTRL_EMI_ODT_CTRL_SLICE3_TLOAD_MASK (0x3 << 12)
  1125. #define PINCTRL_EMI_ODT_CTRL_SLICE3_TLOAD_OFFSET 12
  1126. #define PINCTRL_EMI_ODT_CTRL_SLICE2_CALIB_MASK (0x3 << 10)
  1127. #define PINCTRL_EMI_ODT_CTRL_SLICE2_CALIB_OFFSET 10
  1128. #define PINCTRL_EMI_ODT_CTRL_SLICE2_TLOAD_MASK (0x3 << 8)
  1129. #define PINCTRL_EMI_ODT_CTRL_SLICE2_TLOAD_OFFSET 8
  1130. #define PINCTRL_EMI_ODT_CTRL_SLICE1_CALIB_MASK (0x3 << 6)
  1131. #define PINCTRL_EMI_ODT_CTRL_SLICE1_CALIB_OFFSET 6
  1132. #define PINCTRL_EMI_ODT_CTRL_SLICE1_TLOAD_MASK (0x3 << 4)
  1133. #define PINCTRL_EMI_ODT_CTRL_SLICE1_TLOAD_OFFSET 4
  1134. #define PINCTRL_EMI_ODT_CTRL_SLICE0_CALIB_MASK (0x3 << 2)
  1135. #define PINCTRL_EMI_ODT_CTRL_SLICE0_CALIB_OFFSET 2
  1136. #define PINCTRL_EMI_ODT_CTRL_SLICE0_TLOAD_MASK (0x3 << 0)
  1137. #define PINCTRL_EMI_ODT_CTRL_SLICE0_TLOAD_OFFSET 0
  1138. #define PINCTRL_EMI_DS_CTRL_DDR_MODE_MASK (0x3 << 16)
  1139. #define PINCTRL_EMI_DS_CTRL_DDR_MODE_OFFSET 16
  1140. #define PINCTRL_EMI_DS_CTRL_DDR_MODE_mDDR (0x0 << 16)
  1141. #define PINCTRL_EMI_DS_CTRL_DDR_MODE_GPIO (0x1 << 16)
  1142. #define PINCTRL_EMI_DS_CTRL_DDR_MODE_LVDDR2 (0x2 << 16)
  1143. #define PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2 (0x3 << 16)
  1144. #define PINCTRL_EMI_DS_CTRL_ADDRESS_MA_MASK (0x3 << 12)
  1145. #define PINCTRL_EMI_DS_CTRL_ADDRESS_MA_OFFSET 12
  1146. #define PINCTRL_EMI_DS_CTRL_CONTROL_MA_MASK (0x3 << 10)
  1147. #define PINCTRL_EMI_DS_CTRL_CONTROL_MA_OFFSET 10
  1148. #define PINCTRL_EMI_DS_CTRL_DUALPAD_MA_MASK (0x3 << 8)
  1149. #define PINCTRL_EMI_DS_CTRL_DUALPAD_MA_OFFSET 8
  1150. #define PINCTRL_EMI_DS_CTRL_SLICE3_MA_MASK (0x3 << 6)
  1151. #define PINCTRL_EMI_DS_CTRL_SLICE3_MA_OFFSET 6
  1152. #define PINCTRL_EMI_DS_CTRL_SLICE2_MA_MASK (0x3 << 4)
  1153. #define PINCTRL_EMI_DS_CTRL_SLICE2_MA_OFFSET 4
  1154. #define PINCTRL_EMI_DS_CTRL_SLICE1_MA_MASK (0x3 << 2)
  1155. #define PINCTRL_EMI_DS_CTRL_SLICE1_MA_OFFSET 2
  1156. #define PINCTRL_EMI_DS_CTRL_SLICE0_MA_MASK (0x3 << 0)
  1157. #define PINCTRL_EMI_DS_CTRL_SLICE0_MA_OFFSET 0
  1158. #endif /* __MX28_REGS_PINCTRL_H__ */