regs-base.h 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Freescale i.MX23/i.MX28 Peripheral Base Addresses
  4. *
  5. * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  6. * on behalf of DENX Software Engineering GmbH
  7. *
  8. * Based on code from LTIB:
  9. * Copyright (C) 2008 Embedded Alley Solutions Inc.
  10. *
  11. * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
  12. */
  13. #ifndef __MXS_REGS_BASE_H__
  14. #define __MXS_REGS_BASE_H__
  15. /*
  16. * Register base addresses for i.MX23
  17. */
  18. #if defined(CONFIG_MX23)
  19. #define MXS_ICOLL_BASE 0x80000000
  20. #define MXS_APBH_BASE 0x80004000
  21. #define MXS_ECC8_BASE 0x80008000
  22. #define MXS_BCH_BASE 0x8000A000
  23. #define MXS_GPMI_BASE 0x8000C000
  24. #define MXS_SSP0_BASE 0x80010000
  25. #define MXS_SSP1_BASE 0x80034000
  26. #define MXS_ETM_BASE 0x80014000
  27. #define MXS_PINCTRL_BASE 0x80018000
  28. #define MXS_DIGCTL_BASE 0x8001C000
  29. #define MXS_EMI_BASE 0x80020000
  30. #define MXS_APBX_BASE 0x80024000
  31. #define MXS_DCP_BASE 0x80028000
  32. #define MXS_PXP_BASE 0x8002A000
  33. #define MXS_OCOTP_BASE 0x8002C000
  34. #define MXS_AXI_BASE 0x8002E000
  35. #define MXS_LCDIF_BASE 0x80030000
  36. #define MXS_SSP1_BASE 0x80034000
  37. #define MXS_TVENC_BASE 0x80038000
  38. #define MXS_CLKCTRL_BASE 0x80040000
  39. #define MXS_SAIF0_BASE 0x80042000
  40. #define MXS_POWER_BASE 0x80044000
  41. #define MXS_SAIF1_BASE 0x80046000
  42. #define MXS_AUDIOOUT_BASE 0x80048000
  43. #define MXS_AUDIOIN_BASE 0x8004C000
  44. #define MXS_LRADC_BASE 0x80050000
  45. #define MXS_SPDIF_BASE 0x80054000
  46. #define MXS_I2C0_BASE 0x80058000
  47. #define MXS_RTC_BASE 0x8005C000
  48. #define MXS_PWM_BASE 0x80064000
  49. #define MXS_TIMROT_BASE 0x80068000
  50. #define MXS_UARTAPP0_BASE 0x8006C000
  51. #define MXS_UARTAPP1_BASE 0x8006E000
  52. #define MXS_UARTDBG_BASE 0x80070000
  53. #define MXS_USBPHY0_BASE 0x8007C000
  54. #define MXS_USBCTRL0_BASE 0x80080000
  55. #define MXS_DRAM_BASE 0x800E0000
  56. /*
  57. * Register base addresses for i.MX28
  58. */
  59. #elif defined(CONFIG_MX28)
  60. #define MXS_ICOL_BASE 0x80000000
  61. #define MXS_HSADC_BASE 0x80002000
  62. #define MXS_APBH_BASE 0x80004000
  63. #define MXS_PERFMON_BASE 0x80006000
  64. #define MXS_BCH_BASE 0x8000A000
  65. #define MXS_GPMI_BASE 0x8000C000
  66. #define MXS_SSP0_BASE 0x80010000
  67. #define MXS_SSP1_BASE 0x80012000
  68. #define MXS_SSP2_BASE 0x80014000
  69. #define MXS_SSP3_BASE 0x80016000
  70. #define MXS_PINCTRL_BASE 0x80018000
  71. #define MXS_DIGCTL_BASE 0x8001C000
  72. #define MXS_ETM_BASE 0x80022000
  73. #define MXS_APBX_BASE 0x80024000
  74. #define MXS_DCP_BASE 0x80028000
  75. #define MXS_PXP_BASE 0x8002A000
  76. #define MXS_OCOTP_BASE 0x8002C000
  77. #define MXS_AXI_AHB0_BASE 0x8002E000
  78. #define MXS_LCDIF_BASE 0x80030000
  79. #define MXS_CAN0_BASE 0x80032000
  80. #define MXS_CAN1_BASE 0x80034000
  81. #define MXS_SIMDBG_BASE 0x8003C000
  82. #define MXS_SIMGPMISEL_BASE 0x8003C200
  83. #define MXS_SIMSSPSEL_BASE 0x8003C300
  84. #define MXS_SIMMEMSEL_BASE 0x8003C400
  85. #define MXS_GPIOMON_BASE 0x8003C500
  86. #define MXS_SIMENET_BASE 0x8003C700
  87. #define MXS_ARMJTAG_BASE 0x8003C800
  88. #define MXS_CLKCTRL_BASE 0x80040000
  89. #define MXS_SAIF0_BASE 0x80042000
  90. #define MXS_POWER_BASE 0x80044000
  91. #define MXS_SAIF1_BASE 0x80046000
  92. #define MXS_LRADC_BASE 0x80050000
  93. #define MXS_SPDIF_BASE 0x80054000
  94. #define MXS_RTC_BASE 0x80056000
  95. #define MXS_I2C0_BASE 0x80058000
  96. #define MXS_I2C1_BASE 0x8005A000
  97. #define MXS_PWM_BASE 0x80064000
  98. #define MXS_TIMROT_BASE 0x80068000
  99. #define MXS_UARTAPP0_BASE 0x8006A000
  100. #define MXS_UARTAPP1_BASE 0x8006C000
  101. #define MXS_UARTAPP2_BASE 0x8006E000
  102. #define MXS_UARTAPP3_BASE 0x80070000
  103. #define MXS_UARTAPP4_BASE 0x80072000
  104. #define MXS_UARTDBG_BASE 0x80074000
  105. #define MXS_USBPHY0_BASE 0x8007C000
  106. #define MXS_USBPHY1_BASE 0x8007E000
  107. #define MXS_USBCTRL0_BASE 0x80080000
  108. #define MXS_USBCTRL1_BASE 0x80090000
  109. #define MXS_DFLPT_BASE 0x800C0000
  110. #define MXS_DRAM_BASE 0x800E0000
  111. #define MXS_ENET0_BASE 0x800F0000
  112. #define MXS_ENET1_BASE 0x800F4000
  113. #else
  114. #error Unkown SoC. Please set CONFIG_MX23 or CONFIG_MX28
  115. #endif
  116. #endif /* __MXS_REGS_BASE_H__ */