ls2080a_serdes.c 3.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014-2015 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <asm/arch/fsl_serdes.h>
  7. struct serdes_config {
  8. u8 protocol;
  9. u8 lanes[SRDS_MAX_LANES];
  10. };
  11. static struct serdes_config serdes1_cfg_tbl[] = {
  12. /* SerDes 1 */
  13. {0x03, {PCIE2, PCIE2, PCIE2, PCIE2, PCIE1, PCIE1, PCIE1, PCIE1 } },
  14. {0x05, {PCIE2, PCIE2, PCIE2, PCIE2, SGMII4, SGMII3, SGMII2, SGMII1 } },
  15. {0x07, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2,
  16. SGMII1 } },
  17. {0x09, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2,
  18. SGMII1 } },
  19. {0x0A, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2,
  20. SGMII1 } },
  21. {0x0C, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2,
  22. SGMII1 } },
  23. {0x0E, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2,
  24. SGMII1 } },
  25. {0x26, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, XFI2, XFI1 } },
  26. {0x28, {SGMII8, SGMII7, SGMII6, SGMII5, XFI4, XFI3, XFI2, XFI1 } },
  27. {0x2A, {XFI8, XFI7, XFI6, XFI5, XFI4, XFI3, XFI2, XFI1 } },
  28. {0x2B, {SGMII8, SGMII7, SGMII6, SGMII5, XAUI1, XAUI1, XAUI1, XAUI1 } },
  29. {0x32, {XAUI2, XAUI2, XAUI2, XAUI2, XAUI1, XAUI1, XAUI1, XAUI1 } },
  30. {0x33, {PCIE2, PCIE2, PCIE2, PCIE2, QSGMII_D, QSGMII_C, QSGMII_B,
  31. QSGMII_A} },
  32. {0x35, {QSGMII_D, QSGMII_C, QSGMII_B, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
  33. {0x39, {SGMII8, SGMII7, SGMII6, PCIE2, SGMII4, SGMII3, SGMII2,
  34. PCIE1 } },
  35. {0x3B, {XFI8, XFI7, XFI6, PCIE2, XFI4, XFI3, XFI2, PCIE1 } },
  36. {0x4B, {PCIE2, PCIE2, PCIE2, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
  37. {0x4C, {XFI8, XFI7, XFI6, XFI5, PCIE1, PCIE1, PCIE1, PCIE1 } },
  38. {0x4D, {SGMII8, SGMII7, PCIE2, PCIE2, SGMII4, SGMII3, PCIE1, PCIE1 } },
  39. {}
  40. };
  41. static struct serdes_config serdes2_cfg_tbl[] = {
  42. /* SerDes 2 */
  43. {0x07, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15,
  44. SGMII16 } },
  45. {0x09, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15,
  46. SGMII16 } },
  47. {0x0A, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15,
  48. SGMII16 } },
  49. {0x0C, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15,
  50. SGMII16 } },
  51. {0x0E, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15,
  52. SGMII16 } },
  53. {0x3D, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3 } },
  54. {0x3E, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3 } },
  55. {0x3F, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } },
  56. {0x40, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } },
  57. {0x41, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SATA1, SATA2 } },
  58. {0x42, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SATA1, SATA2 } },
  59. {0x43, {PCIE3, PCIE3, PCIE3, PCIE3, NONE, NONE, SATA1, SATA2 } },
  60. {0x44, {PCIE3, PCIE3, PCIE3, PCIE3, NONE, NONE, SATA1, SATA2 } },
  61. {0x45, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, PCIE4,
  62. PCIE4 } },
  63. {0x47, {PCIE3, SGMII10, SGMII11, SGMII12, PCIE4, SGMII14, SGMII15,
  64. SGMII16 } },
  65. {0x49, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
  66. SATA2 } },
  67. {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
  68. SATA2 } },
  69. {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } },
  70. {0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } },
  71. {}
  72. };
  73. static struct serdes_config *serdes_cfg_tbl[] = {
  74. serdes1_cfg_tbl,
  75. serdes2_cfg_tbl,
  76. };
  77. enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
  78. {
  79. struct serdes_config *ptr;
  80. if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
  81. return 0;
  82. ptr = serdes_cfg_tbl[serdes];
  83. while (ptr->protocol) {
  84. if (ptr->protocol == cfg)
  85. return ptr->lanes[lane];
  86. ptr++;
  87. }
  88. return 0;
  89. }
  90. int is_serdes_prtcl_valid(int serdes, u32 prtcl)
  91. {
  92. int i;
  93. struct serdes_config *ptr;
  94. if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
  95. return 0;
  96. ptr = serdes_cfg_tbl[serdes];
  97. while (ptr->protocol) {
  98. if (ptr->protocol == prtcl)
  99. break;
  100. ptr++;
  101. }
  102. if (!ptr->protocol)
  103. return 0;
  104. for (i = 0; i < SRDS_MAX_LANES; i++) {
  105. if (ptr->lanes[i] != NONE)
  106. return 1;
  107. }
  108. return 0;
  109. }