ls1088a_serdes.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2017-2019 NXP
  4. */
  5. #include <common.h>
  6. #include <asm/arch/fsl_serdes.h>
  7. #include <asm/arch/soc.h>
  8. #include <asm/io.h>
  9. struct serdes_config {
  10. u8 ip_protocol;
  11. u8 lanes[SRDS_MAX_LANES];
  12. u8 rcw_lanes[SRDS_MAX_LANES];
  13. };
  14. static struct serdes_config serdes1_cfg_tbl[] = {
  15. /* SerDes 1 */
  16. {0x12, {SGMII3, SGMII7, SGMII1, SGMII2 }, {3, 3, 3, 3 } },
  17. {0x15, {SGMII3, SGMII7, XFI1, XFI2 }, {3, 3, 1, 1 } },
  18. {0x16, {SGMII3, SGMII7, SGMII1, XFI2 }, {3, 3, 3, 1 } },
  19. {0x17, {SGMII3, SGMII7, SGMII1, SGMII2 }, {3, 3, 3, 2 } },
  20. {0x18, {SGMII3, SGMII7, SGMII1, SGMII2 }, {3, 3, 2, 2 } },
  21. {0x19, {SGMII3, QSGMII_B, XFI1, XFI2}, {3, 4, 1, 1 } },
  22. {0x1A, {SGMII3, QSGMII_B, SGMII1, XFI2 }, {3, 4, 3, 1 } },
  23. {0x1B, {SGMII3, QSGMII_B, SGMII1, SGMII2 }, {3, 4, 3, 2 } },
  24. {0x1C, {SGMII3, QSGMII_B, SGMII1, SGMII2 }, {3, 4, 2, 2 } },
  25. {0x1D, {QSGMII_A, QSGMII_B, XFI1, XFI2 }, {4, 4, 1, 1 } },
  26. {0x1E, {QSGMII_A, QSGMII_B, SGMII1, XFI2 }, {4, 4, 3, 1 } },
  27. {0x1F, {QSGMII_A, QSGMII_B, SGMII1, SGMII2 }, {4, 4, 3, 2 } },
  28. {0x20, {QSGMII_A, QSGMII_B, SGMII1, SGMII2 }, {4, 4, 2, 2 } },
  29. {0x35, {SGMII3, QSGMII_B, SGMII1, SGMII2 }, {3, 4, 3, 3 } },
  30. {0x36, {QSGMII_A, QSGMII_B, SGMII1, SGMII2 }, {4, 4, 3, 3 } },
  31. {0x3A, {SGMII3, PCIE1, SGMII1, SGMII2 }, {3, 5, 3, 3 } },
  32. {}
  33. };
  34. static struct serdes_config serdes2_cfg_tbl[] = {
  35. /* SerDes 2 */
  36. {0x0C, {PCIE1, PCIE1, PCIE1, PCIE1 }, {8, 8, 8, 8 } },
  37. {0x0D, {PCIE1, PCIE2, PCIE3, SATA1 }, {5, 5, 5, 9 } },
  38. {0x0E, {PCIE1, PCIE1, PCIE2, SATA1 }, {7, 7, 6, 9 } },
  39. {0x13, {PCIE1, PCIE1, PCIE3, PCIE3 }, {7, 7, 7, 7 } },
  40. {0x14, {PCIE1, PCIE2, PCIE3, PCIE3 }, {5, 5, 7, 7 } },
  41. {0x3C, {NONE, PCIE2, NONE, PCIE3 }, {0, 5, 0, 6 } },
  42. {}
  43. };
  44. static struct serdes_config *serdes_cfg_tbl[] = {
  45. serdes1_cfg_tbl,
  46. serdes2_cfg_tbl,
  47. };
  48. bool soc_has_mac1(void)
  49. {
  50. struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
  51. unsigned int svr = gur_in32(&gur->svr);
  52. unsigned int version = SVR_SOC_VER(svr);
  53. return (version == SVR_LS1088A || version == SVR_LS1084A);
  54. }
  55. int serdes_get_number(int serdes, int cfg)
  56. {
  57. struct serdes_config *ptr;
  58. int i, j, index, lnk;
  59. int is_found, max_lane = SRDS_MAX_LANES;
  60. if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
  61. return 0;
  62. ptr = serdes_cfg_tbl[serdes];
  63. while (ptr->ip_protocol) {
  64. is_found = 1;
  65. for (i = 0, j = max_lane - 1; i < max_lane; i++, j--) {
  66. lnk = cfg & (0xf << 4 * i);
  67. lnk = lnk >> (4 * i);
  68. index = (serdes == FSL_SRDS_1) ? j : i;
  69. if (ptr->rcw_lanes[index] == lnk && is_found)
  70. is_found = 1;
  71. else
  72. is_found = 0;
  73. }
  74. if (is_found)
  75. return ptr->ip_protocol;
  76. ptr++;
  77. }
  78. return 0;
  79. }
  80. enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
  81. {
  82. struct serdes_config *ptr;
  83. if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
  84. return 0;
  85. /*
  86. * LS1044A/1048A support only one XFI port
  87. * Disable MAC1 for LS1044A/1048A
  88. */
  89. if (serdes == FSL_SRDS_1 && lane == 2) {
  90. if (!soc_has_mac1())
  91. return 0;
  92. }
  93. ptr = serdes_cfg_tbl[serdes];
  94. while (ptr->ip_protocol) {
  95. if (ptr->ip_protocol == cfg)
  96. return ptr->lanes[lane];
  97. ptr++;
  98. }
  99. return 0;
  100. }
  101. int is_serdes_prtcl_valid(int serdes, u32 prtcl)
  102. {
  103. int i;
  104. struct serdes_config *ptr;
  105. if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
  106. return 0;
  107. ptr = serdes_cfg_tbl[serdes];
  108. while (ptr->ip_protocol) {
  109. if (ptr->ip_protocol == prtcl)
  110. break;
  111. ptr++;
  112. }
  113. if (!ptr->ip_protocol)
  114. return 0;
  115. for (i = 0; i < SRDS_MAX_LANES; i++) {
  116. if (ptr->lanes[i] != NONE)
  117. return 1;
  118. }
  119. return 0;
  120. }