relocate.S 1.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * relocate - i.MX27-specific vector relocation
  4. *
  5. * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
  6. */
  7. #include <asm-offsets.h>
  8. #include <config.h>
  9. #include <linux/linkage.h>
  10. /*
  11. * The i.MX27 SoC is very specific with respect to exceptions: it
  12. * does not provide RAM at the high vectors address (0xFFFF0000),
  13. * thus only the low address (0x00000000) is useable; but that is
  14. * in ROM. Therefore, vectors cannot be changed at all.
  15. *
  16. * However, these ROM-based vectors actually just perform indirect
  17. * calls through pointers located in RAM at SoC-specific addresses,
  18. * as follows:
  19. *
  20. * Offset Exception Use by ROM code
  21. * 0x00000000 reset indirect branch to [0x00000014]
  22. * 0x00000004 undefined instruction indirect branch to [0xfffffef0]
  23. * 0x00000008 software interrupt indirect branch to [0xfffffef4]
  24. * 0x0000000c prefetch abort indirect branch to [0xfffffef8]
  25. * 0x00000010 data abort indirect branch to [0xfffffefc]
  26. * 0x00000014 (reserved in ARMv5) vector to ROM reset: 0xc0000000
  27. * 0x00000018 IRQ indirect branch to [0xffffff00]
  28. * 0x0000001c FIQ indirect branch to [0xffffff04]
  29. *
  30. * In order to initialize exceptions on i.MX27, we must copy U-Boot's
  31. * indirect (not exception!) vector table into 0xfffffef0..0xffffff04
  32. * taking care not to copy vectors number 5 (reserved exception).
  33. */
  34. .section .text.relocate_vectors,"ax",%progbits
  35. ENTRY(relocate_vectors)
  36. ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
  37. ldr r1, =32 /* size of vector table */
  38. add r0, r0, r1 /* skip to indirect table */
  39. ldr r1, =0xFFFFFEF0 /* i.MX27 indirect table */
  40. ldmia r0!, {r2-r8} /* load indirect vectors 1..7 */
  41. stmia r1!, {r2-r5, r7,r8} /* write all but vector 5 */
  42. bx lr
  43. ENDPROC(relocate_vectors)