Kconfig 46 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. select INIT_SP_RELATIVE
  13. help
  14. U-Boot expects to be linked to a specific hard-coded address, and to
  15. be loaded to and run from that address. This option lifts that
  16. restriction, thus allowing the code to be loaded to and executed
  17. from almost any address. This logic relies on the relocation
  18. information that is embedded in the binary to support U-Boot
  19. relocating itself to the top-of-RAM later during execution.
  20. config INIT_SP_RELATIVE
  21. bool "Specify the early stack pointer relative to the .bss section"
  22. help
  23. U-Boot typically uses a hard-coded value for the stack pointer
  24. before relocation. Enable this option to instead calculate the
  25. initial SP at run-time. This is useful to avoid hard-coding addresses
  26. into U-Boot, so that it can be loaded and executed at arbitrary
  27. addresses and thus avoid using arbitrary addresses at runtime.
  28. If this option is enabled, the early stack pointer is set to
  29. &_bss_start with a offset value added. The offset is specified by
  30. SYS_INIT_SP_BSS_OFFSET.
  31. config SYS_INIT_SP_BSS_OFFSET
  32. int "Early stack offset from the .bss base address"
  33. depends on INIT_SP_RELATIVE
  34. default 524288
  35. help
  36. This option's value is the offset added to &_bss_start in order to
  37. calculate the stack pointer. This offset should be large enough so
  38. that the early malloc region, global data (gd), and early stack usage
  39. do not overlap any appended DTB.
  40. config LINUX_KERNEL_IMAGE_HEADER
  41. bool
  42. help
  43. Place a Linux kernel image header at the start of the U-Boot binary.
  44. The format of the header is described in the Linux kernel source at
  45. Documentation/arm64/booting.txt. This feature is useful since the
  46. image header reports the amount of memory (BSS and similar) that
  47. U-Boot needs to use, but which isn't part of the binary.
  48. if LINUX_KERNEL_IMAGE_HEADER
  49. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  50. hex
  51. help
  52. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  53. TEXT_OFFSET value written to the Linux kernel image header.
  54. endif
  55. endif
  56. config GIC_V3_ITS
  57. bool "ARM GICV3 ITS"
  58. help
  59. ARM GICV3 Interrupt translation service (ITS).
  60. Basic support for programming locality specific peripheral
  61. interrupts (LPI) configuration tables and enable LPI tables.
  62. LPI configuration table can be used by u-boot or Linux.
  63. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  64. configuration table can not be re-programmed, unless GICV3 reset.
  65. config STATIC_RELA
  66. bool
  67. default y if ARM64 && !POSITION_INDEPENDENT
  68. config DMA_ADDR_T_64BIT
  69. bool
  70. default y if ARM64
  71. config HAS_VBAR
  72. bool
  73. config HAS_THUMB2
  74. bool
  75. # Used for compatibility with asm files copied from the kernel
  76. config ARM_ASM_UNIFIED
  77. bool
  78. default y
  79. # Used for compatibility with asm files copied from the kernel
  80. config THUMB2_KERNEL
  81. bool
  82. config SYS_ICACHE_OFF
  83. bool "Do not enable icache"
  84. default n
  85. help
  86. Do not enable instruction cache in U-Boot.
  87. config SPL_SYS_ICACHE_OFF
  88. bool "Do not enable icache in SPL"
  89. depends on SPL
  90. default SYS_ICACHE_OFF
  91. help
  92. Do not enable instruction cache in SPL.
  93. config SYS_DCACHE_OFF
  94. bool "Do not enable dcache"
  95. default n
  96. help
  97. Do not enable data cache in U-Boot.
  98. config SPL_SYS_DCACHE_OFF
  99. bool "Do not enable dcache in SPL"
  100. depends on SPL
  101. default SYS_DCACHE_OFF
  102. help
  103. Do not enable data cache in SPL.
  104. config SYS_ARM_CACHE_CP15
  105. bool "CP15 based cache enabling support"
  106. help
  107. Select this if your processor suports enabling caches by using
  108. CP15 registers.
  109. config SYS_ARM_MMU
  110. bool "MMU-based Paged Memory Management Support"
  111. select SYS_ARM_CACHE_CP15
  112. help
  113. Select if you want MMU-based virtualised addressing space
  114. support via paged memory management.
  115. config SYS_ARM_MPU
  116. bool 'Use the ARM v7 PMSA Compliant MPU'
  117. help
  118. Some ARM systems without an MMU have instead a Memory Protection
  119. Unit (MPU) that defines the type and permissions for regions of
  120. memory.
  121. If your CPU has an MPU then you should choose 'y' here unless you
  122. know that you do not want to use the MPU.
  123. # If set, the workarounds for these ARM errata are applied early during U-Boot
  124. # startup. Note that in general these options force the workarounds to be
  125. # applied; no CPU-type/version detection exists, unlike the similar options in
  126. # the Linux kernel. Do not set these options unless they apply! Also note that
  127. # the following can be machine-specific errata. These do have ability to
  128. # provide rudimentary version and machine-specific checks, but expect no
  129. # product checks:
  130. # CONFIG_ARM_ERRATA_430973
  131. # CONFIG_ARM_ERRATA_454179
  132. # CONFIG_ARM_ERRATA_621766
  133. # CONFIG_ARM_ERRATA_798870
  134. # CONFIG_ARM_ERRATA_801819
  135. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  136. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  137. config ARM_ERRATA_430973
  138. bool
  139. config ARM_ERRATA_454179
  140. bool
  141. config ARM_ERRATA_621766
  142. bool
  143. config ARM_ERRATA_716044
  144. bool
  145. config ARM_ERRATA_725233
  146. bool
  147. config ARM_ERRATA_742230
  148. bool
  149. config ARM_ERRATA_743622
  150. bool
  151. config ARM_ERRATA_751472
  152. bool
  153. config ARM_ERRATA_761320
  154. bool
  155. config ARM_ERRATA_773022
  156. bool
  157. config ARM_ERRATA_774769
  158. bool
  159. config ARM_ERRATA_794072
  160. bool
  161. config ARM_ERRATA_798870
  162. bool
  163. config ARM_ERRATA_801819
  164. bool
  165. config ARM_ERRATA_826974
  166. bool
  167. config ARM_ERRATA_828024
  168. bool
  169. config ARM_ERRATA_829520
  170. bool
  171. config ARM_ERRATA_833069
  172. bool
  173. config ARM_ERRATA_833471
  174. bool
  175. config ARM_ERRATA_845369
  176. bool
  177. config ARM_ERRATA_852421
  178. bool
  179. config ARM_ERRATA_852423
  180. bool
  181. config ARM_ERRATA_855873
  182. bool
  183. config ARM_CORTEX_A8_CVE_2017_5715
  184. bool
  185. config ARM_CORTEX_A15_CVE_2017_5715
  186. bool
  187. config CPU_ARM720T
  188. bool
  189. select SYS_CACHE_SHIFT_5
  190. imply SYS_ARM_MMU
  191. config CPU_ARM920T
  192. bool
  193. select SYS_CACHE_SHIFT_5
  194. imply SYS_ARM_MMU
  195. config CPU_ARM926EJS
  196. bool
  197. select SYS_CACHE_SHIFT_5
  198. imply SYS_ARM_MMU
  199. config CPU_ARM946ES
  200. bool
  201. select SYS_CACHE_SHIFT_5
  202. imply SYS_ARM_MMU
  203. config CPU_ARM1136
  204. bool
  205. select SYS_CACHE_SHIFT_5
  206. imply SYS_ARM_MMU
  207. config CPU_ARM1176
  208. bool
  209. select HAS_VBAR
  210. select SYS_CACHE_SHIFT_5
  211. imply SYS_ARM_MMU
  212. config CPU_V7A
  213. bool
  214. select HAS_THUMB2
  215. select HAS_VBAR
  216. select SYS_CACHE_SHIFT_6
  217. imply SYS_ARM_MMU
  218. config CPU_V7M
  219. bool
  220. select HAS_THUMB2
  221. select SYS_ARM_MPU
  222. select SYS_CACHE_SHIFT_5
  223. select SYS_THUMB_BUILD
  224. select THUMB2_KERNEL
  225. config CPU_V7R
  226. bool
  227. select HAS_THUMB2
  228. select SYS_ARM_CACHE_CP15
  229. select SYS_ARM_MPU
  230. select SYS_CACHE_SHIFT_6
  231. config CPU_PXA
  232. bool
  233. select SYS_CACHE_SHIFT_5
  234. imply SYS_ARM_MMU
  235. config CPU_SA1100
  236. bool
  237. select SYS_CACHE_SHIFT_5
  238. imply SYS_ARM_MMU
  239. config SYS_CPU
  240. default "arm720t" if CPU_ARM720T
  241. default "arm920t" if CPU_ARM920T
  242. default "arm926ejs" if CPU_ARM926EJS
  243. default "arm946es" if CPU_ARM946ES
  244. default "arm1136" if CPU_ARM1136
  245. default "arm1176" if CPU_ARM1176
  246. default "armv7" if CPU_V7A
  247. default "armv7" if CPU_V7R
  248. default "armv7m" if CPU_V7M
  249. default "pxa" if CPU_PXA
  250. default "sa1100" if CPU_SA1100
  251. default "armv8" if ARM64
  252. config SYS_ARM_ARCH
  253. int
  254. default 4 if CPU_ARM720T
  255. default 4 if CPU_ARM920T
  256. default 5 if CPU_ARM926EJS
  257. default 5 if CPU_ARM946ES
  258. default 6 if CPU_ARM1136
  259. default 6 if CPU_ARM1176
  260. default 7 if CPU_V7A
  261. default 7 if CPU_V7M
  262. default 7 if CPU_V7R
  263. default 5 if CPU_PXA
  264. default 4 if CPU_SA1100
  265. default 8 if ARM64
  266. config SYS_CACHE_SHIFT_5
  267. bool
  268. config SYS_CACHE_SHIFT_6
  269. bool
  270. config SYS_CACHE_SHIFT_7
  271. bool
  272. config SYS_CACHELINE_SIZE
  273. int
  274. default 128 if SYS_CACHE_SHIFT_7
  275. default 64 if SYS_CACHE_SHIFT_6
  276. default 32 if SYS_CACHE_SHIFT_5
  277. choice
  278. prompt "Select the ARM data write cache policy"
  279. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
  280. TARGET_BCMNSP || CPU_PXA || RZA1
  281. default SYS_ARM_CACHE_WRITEBACK
  282. config SYS_ARM_CACHE_WRITEBACK
  283. bool "Write-back (WB)"
  284. help
  285. A write updates the cache only and marks the cache line as dirty.
  286. External memory is updated only when the line is evicted or explicitly
  287. cleaned.
  288. config SYS_ARM_CACHE_WRITETHROUGH
  289. bool "Write-through (WT)"
  290. help
  291. A write updates both the cache and the external memory system.
  292. This does not mark the cache line as dirty.
  293. config SYS_ARM_CACHE_WRITEALLOC
  294. bool "Write allocation (WA)"
  295. help
  296. A cache line is allocated on a write miss. This means that executing a
  297. store instruction on the processor might cause a burst read to occur.
  298. There is a linefill to obtain the data for the cache line, before the
  299. write is performed.
  300. endchoice
  301. config ARCH_CPU_INIT
  302. bool "Enable ARCH_CPU_INIT"
  303. help
  304. Some architectures require a call to arch_cpu_init().
  305. Say Y here to enable it
  306. config SYS_ARCH_TIMER
  307. bool "ARM Generic Timer support"
  308. depends on CPU_V7A || ARM64
  309. default y if ARM64
  310. help
  311. The ARM Generic Timer (aka arch-timer) provides an architected
  312. interface to a timer source on an SoC.
  313. It is mandatory for ARMv8 implementation and widely available
  314. on ARMv7 systems.
  315. config ARM_SMCCC
  316. bool "Support for ARM SMC Calling Convention (SMCCC)"
  317. depends on CPU_V7A || ARM64
  318. select ARM_PSCI_FW
  319. help
  320. Say Y here if you want to enable ARM SMC Calling Convention.
  321. This should be enabled if U-Boot needs to communicate with system
  322. firmware (for example, PSCI) according to SMCCC.
  323. config SEMIHOSTING
  324. bool "support boot from semihosting"
  325. help
  326. In emulated environments, semihosting is a way for
  327. the hosted environment to call out to the emulator to
  328. retrieve files from the host machine.
  329. config SYS_THUMB_BUILD
  330. bool "Build U-Boot using the Thumb instruction set"
  331. depends on !ARM64
  332. help
  333. Use this flag to build U-Boot using the Thumb instruction set for
  334. ARM architectures. Thumb instruction set provides better code
  335. density. For ARM architectures that support Thumb2 this flag will
  336. result in Thumb2 code generated by GCC.
  337. config SPL_SYS_THUMB_BUILD
  338. bool "Build SPL using the Thumb instruction set"
  339. default y if SYS_THUMB_BUILD
  340. depends on !ARM64 && SPL
  341. help
  342. Use this flag to build SPL using the Thumb instruction set for
  343. ARM architectures. Thumb instruction set provides better code
  344. density. For ARM architectures that support Thumb2 this flag will
  345. result in Thumb2 code generated by GCC.
  346. config TPL_SYS_THUMB_BUILD
  347. bool "Build TPL using the Thumb instruction set"
  348. default y if SYS_THUMB_BUILD
  349. depends on TPL && !ARM64
  350. help
  351. Use this flag to build TPL using the Thumb instruction set for
  352. ARM architectures. Thumb instruction set provides better code
  353. density. For ARM architectures that support Thumb2 this flag will
  354. result in Thumb2 code generated by GCC.
  355. config SYS_L2CACHE_OFF
  356. bool "L2cache off"
  357. help
  358. If SoC does not support L2CACHE or one does not want to enable
  359. L2CACHE, choose this option.
  360. config ENABLE_ARM_SOC_BOOT0_HOOK
  361. bool "prepare BOOT0 header"
  362. help
  363. If the SoC's BOOT0 requires a header area filled with (magic)
  364. values, then choose this option, and create a file included as
  365. <asm/arch/boot0.h> which contains the required assembler code.
  366. config ARM_CORTEX_CPU_IS_UP
  367. bool
  368. default n
  369. config USE_ARCH_MEMCPY
  370. bool "Use an assembly optimized implementation of memcpy"
  371. default y
  372. depends on !ARM64
  373. help
  374. Enable the generation of an optimized version of memcpy.
  375. Such an implementation may be faster under some conditions
  376. but may increase the binary size.
  377. config SPL_USE_ARCH_MEMCPY
  378. bool "Use an assembly optimized implementation of memcpy for SPL"
  379. default y if USE_ARCH_MEMCPY
  380. depends on !ARM64 && SPL
  381. help
  382. Enable the generation of an optimized version of memcpy.
  383. Such an implementation may be faster under some conditions
  384. but may increase the binary size.
  385. config TPL_USE_ARCH_MEMCPY
  386. bool "Use an assembly optimized implementation of memcpy for TPL"
  387. default y if USE_ARCH_MEMCPY
  388. depends on !ARM64 && TPL
  389. help
  390. Enable the generation of an optimized version of memcpy.
  391. Such an implementation may be faster under some conditions
  392. but may increase the binary size.
  393. config USE_ARCH_MEMSET
  394. bool "Use an assembly optimized implementation of memset"
  395. default y
  396. depends on !ARM64
  397. help
  398. Enable the generation of an optimized version of memset.
  399. Such an implementation may be faster under some conditions
  400. but may increase the binary size.
  401. config SPL_USE_ARCH_MEMSET
  402. bool "Use an assembly optimized implementation of memset for SPL"
  403. default y if USE_ARCH_MEMSET
  404. depends on !ARM64 && SPL
  405. help
  406. Enable the generation of an optimized version of memset.
  407. Such an implementation may be faster under some conditions
  408. but may increase the binary size.
  409. config TPL_USE_ARCH_MEMSET
  410. bool "Use an assembly optimized implementation of memset for TPL"
  411. default y if USE_ARCH_MEMSET
  412. depends on !ARM64 && TPL
  413. help
  414. Enable the generation of an optimized version of memset.
  415. Such an implementation may be faster under some conditions
  416. but may increase the binary size.
  417. config SET_STACK_SIZE
  418. bool "Enable an option to set max stack size that can be used"
  419. default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
  420. help
  421. This will enable an option to set max stack size that can be
  422. used by U-Boot.
  423. config STACK_SIZE
  424. hex "Define max stack size that can be used by U-Boot"
  425. depends on SET_STACK_SIZE
  426. default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
  427. default 0x1000000 if ARCH_ZYNQ
  428. help
  429. Define Max stack size that can be used by U-Boot so that the
  430. initrd_high will be calculated as base stack pointer minus this
  431. stack size.
  432. config ARM64_SUPPORT_AARCH32
  433. bool "ARM64 system support AArch32 execution state"
  434. depends on ARM64
  435. default y if !TARGET_THUNDERX_88XX
  436. help
  437. This ARM64 system supports AArch32 execution state.
  438. choice
  439. prompt "Target select"
  440. default TARGET_HIKEY
  441. config ARCH_AT91
  442. bool "Atmel AT91"
  443. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  444. select SPL_SEPARATE_BSS if SPL
  445. config TARGET_EDB93XX
  446. bool "Support edb93xx"
  447. select CPU_ARM920T
  448. select PL010_SERIAL
  449. config TARGET_ASPENITE
  450. bool "Support aspenite"
  451. select CPU_ARM926EJS
  452. config TARGET_GPLUGD
  453. bool "Support gplugd"
  454. select CPU_ARM926EJS
  455. config ARCH_DAVINCI
  456. bool "TI DaVinci"
  457. select CPU_ARM926EJS
  458. select SPL_DM_SPI if SPL
  459. imply CMD_SAVES
  460. help
  461. Support for TI's DaVinci platform.
  462. config ARCH_KIRKWOOD
  463. bool "Marvell Kirkwood"
  464. select ARCH_MISC_INIT
  465. select BOARD_EARLY_INIT_F
  466. select CPU_ARM926EJS
  467. config ARCH_MVEBU
  468. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  469. select DM
  470. select DM_ETH
  471. select DM_SERIAL
  472. select DM_SPI
  473. select DM_SPI_FLASH
  474. select SPL_DM_SPI if SPL
  475. select SPL_DM_SPI_FLASH if SPL
  476. select OF_CONTROL
  477. select OF_SEPARATE
  478. select SPI
  479. imply CMD_DM
  480. config TARGET_APF27
  481. bool "Support apf27"
  482. select CPU_ARM926EJS
  483. select SUPPORT_SPL
  484. config ARCH_ORION5X
  485. bool "Marvell Orion"
  486. select CPU_ARM926EJS
  487. config TARGET_SPEAR300
  488. bool "Support spear300"
  489. select BOARD_EARLY_INIT_F
  490. select CPU_ARM926EJS
  491. select PL011_SERIAL
  492. imply CMD_SAVES
  493. config TARGET_SPEAR310
  494. bool "Support spear310"
  495. select BOARD_EARLY_INIT_F
  496. select CPU_ARM926EJS
  497. select PL011_SERIAL
  498. imply CMD_SAVES
  499. config TARGET_SPEAR320
  500. bool "Support spear320"
  501. select BOARD_EARLY_INIT_F
  502. select CPU_ARM926EJS
  503. select PL011_SERIAL
  504. imply CMD_SAVES
  505. config TARGET_SPEAR600
  506. bool "Support spear600"
  507. select BOARD_EARLY_INIT_F
  508. select CPU_ARM926EJS
  509. select PL011_SERIAL
  510. imply CMD_SAVES
  511. config TARGET_STV0991
  512. bool "Support stv0991"
  513. select CPU_V7A
  514. select DM
  515. select DM_SERIAL
  516. select DM_SPI
  517. select DM_SPI_FLASH
  518. select PL01X_SERIAL
  519. select SPI
  520. select SPI_FLASH
  521. imply CMD_DM
  522. config TARGET_X600
  523. bool "Support x600"
  524. select BOARD_LATE_INIT
  525. select CPU_ARM926EJS
  526. select PL011_SERIAL
  527. select SUPPORT_SPL
  528. config TARGET_FLEA3
  529. bool "Support flea3"
  530. select CPU_ARM1136
  531. config TARGET_MX35PDK
  532. bool "Support mx35pdk"
  533. select BOARD_LATE_INIT
  534. select CPU_ARM1136
  535. config ARCH_BCM283X
  536. bool "Broadcom BCM283X family"
  537. select DM
  538. select DM_GPIO
  539. select DM_SERIAL
  540. select OF_CONTROL
  541. select PL01X_SERIAL
  542. select SERIAL_SEARCH_ALL
  543. imply CMD_DM
  544. imply FAT_WRITE
  545. config ARCH_BCM63158
  546. bool "Broadcom BCM63158 family"
  547. select DM
  548. select OF_CONTROL
  549. imply CMD_DM
  550. config ARCH_BCM68360
  551. bool "Broadcom BCM68360 family"
  552. select DM
  553. select OF_CONTROL
  554. imply CMD_DM
  555. config ARCH_BCM6858
  556. bool "Broadcom BCM6858 family"
  557. select DM
  558. select OF_CONTROL
  559. imply CMD_DM
  560. config TARGET_VEXPRESS_CA15_TC2
  561. bool "Support vexpress_ca15_tc2"
  562. select CPU_V7A
  563. select CPU_V7_HAS_NONSEC
  564. select CPU_V7_HAS_VIRT
  565. select PL011_SERIAL
  566. config ARCH_BCMSTB
  567. bool "Broadcom BCM7XXX family"
  568. select CPU_V7A
  569. select DM
  570. select OF_CONTROL
  571. select OF_PRIOR_STAGE
  572. imply CMD_DM
  573. help
  574. This enables support for Broadcom ARM-based set-top box
  575. chipsets, including the 7445 family of chips.
  576. config TARGET_VEXPRESS_CA5X2
  577. bool "Support vexpress_ca5x2"
  578. select CPU_V7A
  579. select PL011_SERIAL
  580. config TARGET_VEXPRESS_CA9X4
  581. bool "Support vexpress_ca9x4"
  582. select CPU_V7A
  583. select PL011_SERIAL
  584. config TARGET_BCM23550_W1D
  585. bool "Support bcm23550_w1d"
  586. select CPU_V7A
  587. imply CRC32_VERIFY
  588. imply FAT_WRITE
  589. config TARGET_BCM28155_AP
  590. bool "Support bcm28155_ap"
  591. select CPU_V7A
  592. imply CRC32_VERIFY
  593. imply FAT_WRITE
  594. config TARGET_BCMCYGNUS
  595. bool "Support bcmcygnus"
  596. select CPU_V7A
  597. imply BCM_SF2_ETH
  598. imply BCM_SF2_ETH_GMAC
  599. imply CMD_HASH
  600. imply CRC32_VERIFY
  601. imply FAT_WRITE
  602. imply HASH_VERIFY
  603. imply NETDEVICES
  604. config TARGET_BCMNSP
  605. bool "Support bcmnsp"
  606. select CPU_V7A
  607. config TARGET_BCMNS2
  608. bool "Support Broadcom Northstar2"
  609. select ARM64
  610. help
  611. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  612. ARMv8 Cortex-A57 processors targeting a broad range of networking
  613. applications.
  614. config ARCH_EXYNOS
  615. bool "Samsung EXYNOS"
  616. select DM
  617. select DM_GPIO
  618. select DM_I2C
  619. select DM_KEYBOARD
  620. select DM_SERIAL
  621. select DM_SPI
  622. select DM_SPI_FLASH
  623. select SPI
  624. imply SYS_THUMB_BUILD
  625. imply CMD_DM
  626. imply FAT_WRITE
  627. config ARCH_S5PC1XX
  628. bool "Samsung S5PC1XX"
  629. select CPU_V7A
  630. select DM
  631. select DM_GPIO
  632. select DM_I2C
  633. select DM_SERIAL
  634. imply CMD_DM
  635. config ARCH_HIGHBANK
  636. bool "Calxeda Highbank"
  637. select CPU_V7A
  638. select PL011_SERIAL
  639. config ARCH_INTEGRATOR
  640. bool "ARM Ltd. Integrator family"
  641. select DM
  642. select DM_SERIAL
  643. select PL01X_SERIAL
  644. imply CMD_DM
  645. config ARCH_KEYSTONE
  646. bool "TI Keystone"
  647. select CMD_POWEROFF
  648. select CPU_V7A
  649. select SUPPORT_SPL
  650. select SYS_ARCH_TIMER
  651. select SYS_THUMB_BUILD
  652. imply CMD_MTDPARTS
  653. imply CMD_SAVES
  654. imply FIT
  655. config ARCH_K3
  656. bool "Texas Instruments' K3 Architecture"
  657. select SPL
  658. select SUPPORT_SPL
  659. select FIT
  660. config ARCH_OMAP2PLUS
  661. bool "TI OMAP2+"
  662. select CPU_V7A
  663. select SPL_BOARD_INIT if SPL
  664. select SPL_STACK_R if SPL
  665. select SUPPORT_SPL
  666. imply FIT
  667. config ARCH_MESON
  668. bool "Amlogic Meson"
  669. imply DISTRO_DEFAULTS
  670. imply DM_RNG
  671. help
  672. Support for the Meson SoC family developed by Amlogic Inc.,
  673. targeted at media players and tablet computers. We currently
  674. support the S905 (GXBaby) 64-bit SoC.
  675. config ARCH_MEDIATEK
  676. bool "MediaTek SoCs"
  677. select DM
  678. select OF_CONTROL
  679. select SPL_DM if SPL
  680. select SPL_LIBCOMMON_SUPPORT if SPL
  681. select SPL_LIBGENERIC_SUPPORT if SPL
  682. select SPL_OF_CONTROL if SPL
  683. select SUPPORT_SPL
  684. help
  685. Support for the MediaTek SoCs family developed by MediaTek Inc.
  686. Please refer to doc/README.mediatek for more information.
  687. config ARCH_LPC32XX
  688. bool "NXP LPC32xx platform"
  689. select CPU_ARM926EJS
  690. select DM
  691. select DM_GPIO
  692. select DM_SERIAL
  693. select SPL_DM if SPL
  694. select SUPPORT_SPL
  695. imply CMD_DM
  696. config ARCH_IMX8
  697. bool "NXP i.MX8 platform"
  698. select ARM64
  699. select DM
  700. select OF_CONTROL
  701. select ENABLE_ARM_SOC_BOOT0_HOOK
  702. config ARCH_IMX8M
  703. bool "NXP i.MX8M platform"
  704. select ARM64
  705. select DM
  706. select SUPPORT_SPL
  707. imply CMD_DM
  708. config ARCH_IMXRT
  709. bool "NXP i.MXRT platform"
  710. select CPU_V7M
  711. select DM
  712. select DM_SERIAL
  713. select SUPPORT_SPL
  714. imply CMD_DM
  715. config ARCH_MX23
  716. bool "NXP i.MX23 family"
  717. select CPU_ARM926EJS
  718. select PL011_SERIAL
  719. select SUPPORT_SPL
  720. config ARCH_MX25
  721. bool "NXP MX25"
  722. select CPU_ARM926EJS
  723. imply MXC_GPIO
  724. config ARCH_MX28
  725. bool "NXP i.MX28 family"
  726. select CPU_ARM926EJS
  727. select PL011_SERIAL
  728. select SUPPORT_SPL
  729. config ARCH_MX31
  730. bool "NXP i.MX31 family"
  731. select CPU_ARM1136
  732. config ARCH_MX7ULP
  733. bool "NXP MX7ULP"
  734. select CPU_V7A
  735. select ROM_UNIFIED_SECTIONS
  736. imply MXC_GPIO
  737. imply SYS_THUMB_BUILD
  738. config ARCH_MX7
  739. bool "Freescale MX7"
  740. select ARCH_MISC_INIT
  741. select CPU_V7A
  742. select SYS_FSL_HAS_SEC if IMX_HAB
  743. select SYS_FSL_SEC_COMPAT_4
  744. select SYS_FSL_SEC_LE
  745. imply BOARD_EARLY_INIT_F
  746. imply MXC_GPIO
  747. imply SYS_THUMB_BUILD
  748. config ARCH_MX6
  749. bool "Freescale MX6"
  750. select CPU_V7A
  751. select SYS_FSL_HAS_SEC
  752. select SYS_FSL_SEC_COMPAT_4
  753. select SYS_FSL_SEC_LE
  754. imply MXC_GPIO
  755. imply SYS_THUMB_BUILD
  756. if ARCH_MX6
  757. config SPL_LDSCRIPT
  758. default "arch/arm/mach-omap2/u-boot-spl.lds"
  759. endif
  760. config ARCH_MX5
  761. bool "Freescale MX5"
  762. select BOARD_EARLY_INIT_F
  763. select CPU_V7A
  764. imply MXC_GPIO
  765. config ARCH_OWL
  766. bool "Actions Semi OWL SoCs"
  767. select DM
  768. select DM_ETH
  769. select DM_SERIAL
  770. select OWL_SERIAL
  771. select CLK
  772. select CLK_OWL
  773. select OF_CONTROL
  774. select SYS_RELOC_GD_ENV_ADDR
  775. imply CMD_DM
  776. config ARCH_QEMU
  777. bool "QEMU Virtual Platform"
  778. select ARCH_SUPPORT_TFABOOT
  779. select DM
  780. select DM_SERIAL
  781. select OF_CONTROL
  782. select PL01X_SERIAL
  783. imply CMD_DM
  784. imply DM_RTC
  785. imply RTC_PL031
  786. config ARCH_RMOBILE
  787. bool "Renesas ARM SoCs"
  788. select BOARD_EARLY_INIT_F if !RZA1
  789. select DM
  790. select DM_SERIAL
  791. imply CMD_DM
  792. imply FAT_WRITE
  793. imply SYS_THUMB_BUILD
  794. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  795. config TARGET_S32V234EVB
  796. bool "Support s32v234evb"
  797. select ARM64
  798. select SYS_FSL_ERRATUM_ESDHC111
  799. config ARCH_SNAPDRAGON
  800. bool "Qualcomm Snapdragon SoCs"
  801. select ARM64
  802. select DM
  803. select DM_GPIO
  804. select DM_SERIAL
  805. select MSM_SMEM
  806. select OF_CONTROL
  807. select OF_SEPARATE
  808. select SMEM
  809. select SPMI
  810. imply CMD_DM
  811. config ARCH_SOCFPGA
  812. bool "Altera SOCFPGA family"
  813. select ARCH_EARLY_INIT_R
  814. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  815. select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  816. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  817. select DM
  818. select DM_SERIAL
  819. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  820. select OF_CONTROL
  821. select SPL_DM_RESET if DM_RESET
  822. select SPL_DM_SERIAL
  823. select SPL_LIBCOMMON_SUPPORT
  824. select SPL_LIBGENERIC_SUPPORT
  825. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  826. select SPL_OF_CONTROL
  827. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  828. select SPL_SERIAL_SUPPORT
  829. select SPL_SYSRESET
  830. select SPL_WATCHDOG_SUPPORT
  831. select SUPPORT_SPL
  832. select SYS_NS16550
  833. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  834. select SYSRESET
  835. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  836. select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
  837. imply CMD_DM
  838. imply CMD_MTDPARTS
  839. imply CRC32_VERIFY
  840. imply DM_SPI
  841. imply DM_SPI_FLASH
  842. imply FAT_WRITE
  843. imply SPL
  844. imply SPL_DM
  845. imply SPL_DM_SPI
  846. imply SPL_DM_SPI_FLASH
  847. imply SPL_LIBDISK_SUPPORT
  848. imply SPL_MMC_SUPPORT
  849. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  850. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  851. imply SPL_SPI_FLASH_SUPPORT
  852. imply SPL_SPI_SUPPORT
  853. imply L2X0_CACHE
  854. config ARCH_SUNXI
  855. bool "Support sunxi (Allwinner) SoCs"
  856. select BINMAN
  857. select CMD_GPIO
  858. select CMD_MMC if MMC
  859. select CMD_USB if DISTRO_DEFAULTS
  860. select CLK
  861. select DM
  862. select DM_ETH
  863. select DM_GPIO
  864. select DM_KEYBOARD
  865. select DM_MMC if MMC
  866. select DM_SCSI if SCSI
  867. select DM_SERIAL
  868. select DM_USB if DISTRO_DEFAULTS
  869. select OF_BOARD_SETUP
  870. select OF_CONTROL
  871. select OF_SEPARATE
  872. select SPECIFY_CONSOLE_INDEX
  873. select SPL_STACK_R if SPL
  874. select SPL_SYS_MALLOC_SIMPLE if SPL
  875. select SPL_SYS_THUMB_BUILD if !ARM64
  876. select SUNXI_GPIO
  877. select SYS_NS16550
  878. select SYS_THUMB_BUILD if !ARM64
  879. select USB if DISTRO_DEFAULTS
  880. select USB_KEYBOARD if DISTRO_DEFAULTS
  881. select USB_STORAGE if DISTRO_DEFAULTS
  882. select SPL_USE_TINY_PRINTF
  883. select USE_PREBOOT
  884. select SYS_RELOC_GD_ENV_ADDR
  885. imply CMD_DM
  886. imply CMD_GPT
  887. imply CMD_UBI if MTD_RAW_NAND
  888. imply DISTRO_DEFAULTS
  889. imply FAT_WRITE
  890. imply FIT
  891. imply OF_LIBFDT_OVERLAY
  892. imply PRE_CONSOLE_BUFFER
  893. imply SPL_GPIO_SUPPORT
  894. imply SPL_LIBCOMMON_SUPPORT
  895. imply SPL_LIBGENERIC_SUPPORT
  896. imply SPL_MMC_SUPPORT if MMC
  897. imply SPL_POWER_SUPPORT
  898. imply SPL_SERIAL_SUPPORT
  899. imply USB_GADGET
  900. config ARCH_U8500
  901. bool "ST-Ericsson U8500 Series"
  902. select CPU_V7A
  903. select DM
  904. select DM_GPIO
  905. select DM_MMC if MMC
  906. select DM_SERIAL
  907. select DM_USB if USB
  908. select OF_CONTROL
  909. select SYSRESET
  910. select TIMER
  911. imply ARM_PL180_MMCI
  912. imply DM_RTC
  913. imply NOMADIK_MTU_TIMER
  914. imply PL01X_SERIAL
  915. imply RTC_PL031
  916. imply SYSRESET_SYSCON
  917. config ARCH_VERSAL
  918. bool "Support Xilinx Versal Platform"
  919. select ARM64
  920. select CLK
  921. select DM
  922. select DM_ETH if NET
  923. select DM_MMC if MMC
  924. select DM_SERIAL
  925. select OF_CONTROL
  926. imply BOARD_LATE_INIT
  927. config ARCH_VF610
  928. bool "Freescale Vybrid"
  929. select CPU_V7A
  930. select SYS_FSL_ERRATUM_ESDHC111
  931. imply CMD_MTDPARTS
  932. imply MTD_RAW_NAND
  933. config ARCH_ZYNQ
  934. bool "Xilinx Zynq based platform"
  935. select CLK
  936. select CLK_ZYNQ
  937. select CPU_V7A
  938. select DM
  939. select DM_ETH if NET
  940. select DM_MMC if MMC
  941. select DM_SERIAL
  942. select DM_SPI
  943. select DM_SPI_FLASH
  944. select DM_USB if USB
  945. select OF_CONTROL
  946. select SPI
  947. select SPL_BOARD_INIT if SPL
  948. select SPL_CLK if SPL
  949. select SPL_DM if SPL
  950. select SPL_DM_SPI if SPL
  951. select SPL_DM_SPI_FLASH if SPL
  952. select SPL_OF_CONTROL if SPL
  953. select SPL_SEPARATE_BSS if SPL
  954. select SUPPORT_SPL
  955. imply ARCH_EARLY_INIT_R
  956. imply BOARD_LATE_INIT
  957. imply CMD_CLK
  958. imply CMD_DM
  959. imply CMD_SPL
  960. imply FAT_WRITE
  961. config ARCH_ZYNQMP_R5
  962. bool "Xilinx ZynqMP R5 based platform"
  963. select CLK
  964. select CPU_V7R
  965. select DM
  966. select DM_ETH if NET
  967. select DM_MMC if MMC
  968. select DM_SERIAL
  969. select OF_CONTROL
  970. imply CMD_DM
  971. imply DM_USB_GADGET
  972. config ARCH_ZYNQMP
  973. bool "Xilinx ZynqMP based platform"
  974. select ARM64
  975. select CLK
  976. select DM
  977. select DM_ETH if NET
  978. select DM_MAILBOX
  979. select DM_MMC if MMC
  980. select DM_SERIAL
  981. select DM_SPI if SPI
  982. select DM_SPI_FLASH if DM_SPI
  983. select DM_USB if USB
  984. select FIRMWARE
  985. select OF_CONTROL
  986. select SPL_BOARD_INIT if SPL
  987. select SPL_CLK if SPL
  988. select SPL_DM_SPI if SPI
  989. select SPL_DM_SPI_FLASH if SPL_DM_SPI
  990. select SPL_DM_MAILBOX if SPL
  991. select SPL_FIRMWARE if SPL
  992. select SPL_SEPARATE_BSS if SPL
  993. select SUPPORT_SPL
  994. select ZYNQMP_IPI
  995. imply BOARD_LATE_INIT
  996. imply CMD_DM
  997. imply FAT_WRITE
  998. imply MP
  999. imply DM_USB_GADGET
  1000. config ARCH_TEGRA
  1001. bool "NVIDIA Tegra"
  1002. imply DISTRO_DEFAULTS
  1003. imply FAT_WRITE
  1004. config TARGET_VEXPRESS64_AEMV8A
  1005. bool "Support vexpress_aemv8a"
  1006. select ARM64
  1007. select PL01X_SERIAL
  1008. config TARGET_VEXPRESS64_BASE_FVP
  1009. bool "Support Versatile Express ARMv8a FVP BASE model"
  1010. select ARM64
  1011. select PL01X_SERIAL
  1012. select SEMIHOSTING
  1013. config TARGET_VEXPRESS64_JUNO
  1014. bool "Support Versatile Express Juno Development Platform"
  1015. select ARM64
  1016. select PL01X_SERIAL
  1017. select DM
  1018. select OF_CONTROL
  1019. select OF_BOARD
  1020. select CLK
  1021. select DM_SERIAL
  1022. select ARM_PSCI_FW
  1023. select PSCI_RESET
  1024. select DM_ETH
  1025. select BLK
  1026. select USB
  1027. select DM_USB
  1028. config TARGET_LS2080A_EMU
  1029. bool "Support ls2080a_emu"
  1030. select ARCH_LS2080A
  1031. select ARM64
  1032. select ARMV8_MULTIENTRY
  1033. select FSL_DDR_SYNC_REFRESH
  1034. help
  1035. Support for Freescale LS2080A_EMU platform.
  1036. The LS2080A Development System (EMULATOR) is a pre-silicon
  1037. development platform that supports the QorIQ LS2080A
  1038. Layerscape Architecture processor.
  1039. config TARGET_LS2080A_SIMU
  1040. bool "Support ls2080a_simu"
  1041. select ARCH_LS2080A
  1042. select ARM64
  1043. select ARMV8_MULTIENTRY
  1044. select BOARD_LATE_INIT
  1045. help
  1046. Support for Freescale LS2080A_SIMU platform.
  1047. The LS2080A Development System (QDS) is a pre silicon
  1048. development platform that supports the QorIQ LS2080A
  1049. Layerscape Architecture processor.
  1050. config TARGET_LS1088AQDS
  1051. bool "Support ls1088aqds"
  1052. select ARCH_LS1088A
  1053. select ARM64
  1054. select ARMV8_MULTIENTRY
  1055. select ARCH_SUPPORT_TFABOOT
  1056. select BOARD_LATE_INIT
  1057. select SUPPORT_SPL
  1058. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1059. help
  1060. Support for NXP LS1088AQDS platform.
  1061. The LS1088A Development System (QDS) is a high-performance
  1062. development platform that supports the QorIQ LS1088A
  1063. Layerscape Architecture processor.
  1064. config TARGET_LS2080AQDS
  1065. bool "Support ls2080aqds"
  1066. select ARCH_LS2080A
  1067. select ARM64
  1068. select ARMV8_MULTIENTRY
  1069. select ARCH_SUPPORT_TFABOOT
  1070. select BOARD_LATE_INIT
  1071. select SUPPORT_SPL
  1072. imply SCSI
  1073. imply SCSI_AHCI
  1074. select FSL_DDR_BIST
  1075. select FSL_DDR_INTERACTIVE if !SPL
  1076. help
  1077. Support for Freescale LS2080AQDS platform.
  1078. The LS2080A Development System (QDS) is a high-performance
  1079. development platform that supports the QorIQ LS2080A
  1080. Layerscape Architecture processor.
  1081. config TARGET_LS2080ARDB
  1082. bool "Support ls2080ardb"
  1083. select ARCH_LS2080A
  1084. select ARM64
  1085. select ARMV8_MULTIENTRY
  1086. select ARCH_SUPPORT_TFABOOT
  1087. select BOARD_LATE_INIT
  1088. select SUPPORT_SPL
  1089. select FSL_DDR_BIST
  1090. select FSL_DDR_INTERACTIVE if !SPL
  1091. imply SCSI
  1092. imply SCSI_AHCI
  1093. help
  1094. Support for Freescale LS2080ARDB platform.
  1095. The LS2080A Reference design board (RDB) is a high-performance
  1096. development platform that supports the QorIQ LS2080A
  1097. Layerscape Architecture processor.
  1098. config TARGET_LS2081ARDB
  1099. bool "Support ls2081ardb"
  1100. select ARCH_LS2080A
  1101. select ARM64
  1102. select ARMV8_MULTIENTRY
  1103. select BOARD_LATE_INIT
  1104. select SUPPORT_SPL
  1105. help
  1106. Support for Freescale LS2081ARDB platform.
  1107. The LS2081A Reference design board (RDB) is a high-performance
  1108. development platform that supports the QorIQ LS2081A/LS2041A
  1109. Layerscape Architecture processor.
  1110. config TARGET_LX2160ARDB
  1111. bool "Support lx2160ardb"
  1112. select ARCH_LX2160A
  1113. select ARM64
  1114. select ARMV8_MULTIENTRY
  1115. select ARCH_SUPPORT_TFABOOT
  1116. select BOARD_LATE_INIT
  1117. help
  1118. Support for NXP LX2160ARDB platform.
  1119. The lx2160ardb (LX2160A Reference design board (RDB)
  1120. is a high-performance development platform that supports the
  1121. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1122. config TARGET_LX2160AQDS
  1123. bool "Support lx2160aqds"
  1124. select ARCH_LX2160A
  1125. select ARM64
  1126. select ARMV8_MULTIENTRY
  1127. select ARCH_SUPPORT_TFABOOT
  1128. select BOARD_LATE_INIT
  1129. help
  1130. Support for NXP LX2160AQDS platform.
  1131. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1132. is a high-performance development platform that supports the
  1133. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1134. config TARGET_HIKEY
  1135. bool "Support HiKey 96boards Consumer Edition Platform"
  1136. select ARM64
  1137. select DM
  1138. select DM_GPIO
  1139. select DM_SERIAL
  1140. select OF_CONTROL
  1141. select PL01X_SERIAL
  1142. select SPECIFY_CONSOLE_INDEX
  1143. imply CMD_DM
  1144. help
  1145. Support for HiKey 96boards platform. It features a HI6220
  1146. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1147. config TARGET_HIKEY960
  1148. bool "Support HiKey960 96boards Consumer Edition Platform"
  1149. select ARM64
  1150. select DM
  1151. select DM_SERIAL
  1152. select OF_CONTROL
  1153. select PL01X_SERIAL
  1154. imply CMD_DM
  1155. help
  1156. Support for HiKey960 96boards platform. It features a HI3660
  1157. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1158. config TARGET_POPLAR
  1159. bool "Support Poplar 96boards Enterprise Edition Platform"
  1160. select ARM64
  1161. select DM
  1162. select DM_SERIAL
  1163. select DM_USB
  1164. select OF_CONTROL
  1165. select PL01X_SERIAL
  1166. imply CMD_DM
  1167. help
  1168. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1169. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1170. making it capable of running any commercial set-top solution based on
  1171. Linux or Android.
  1172. config TARGET_LS1012AQDS
  1173. bool "Support ls1012aqds"
  1174. select ARCH_LS1012A
  1175. select ARM64
  1176. select ARCH_SUPPORT_TFABOOT
  1177. select BOARD_LATE_INIT
  1178. help
  1179. Support for Freescale LS1012AQDS platform.
  1180. The LS1012A Development System (QDS) is a high-performance
  1181. development platform that supports the QorIQ LS1012A
  1182. Layerscape Architecture processor.
  1183. config TARGET_LS1012ARDB
  1184. bool "Support ls1012ardb"
  1185. select ARCH_LS1012A
  1186. select ARM64
  1187. select ARCH_SUPPORT_TFABOOT
  1188. select BOARD_LATE_INIT
  1189. imply SCSI
  1190. imply SCSI_AHCI
  1191. help
  1192. Support for Freescale LS1012ARDB platform.
  1193. The LS1012A Reference design board (RDB) is a high-performance
  1194. development platform that supports the QorIQ LS1012A
  1195. Layerscape Architecture processor.
  1196. config TARGET_LS1012A2G5RDB
  1197. bool "Support ls1012a2g5rdb"
  1198. select ARCH_LS1012A
  1199. select ARM64
  1200. select ARCH_SUPPORT_TFABOOT
  1201. select BOARD_LATE_INIT
  1202. imply SCSI
  1203. help
  1204. Support for Freescale LS1012A2G5RDB platform.
  1205. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1206. development platform that supports the QorIQ LS1012A
  1207. Layerscape Architecture processor.
  1208. config TARGET_LS1012AFRWY
  1209. bool "Support ls1012afrwy"
  1210. select ARCH_LS1012A
  1211. select ARM64
  1212. select ARCH_SUPPORT_TFABOOT
  1213. select BOARD_LATE_INIT
  1214. imply SCSI
  1215. imply SCSI_AHCI
  1216. help
  1217. Support for Freescale LS1012AFRWY platform.
  1218. The LS1012A FRWY board (FRWY) is a high-performance
  1219. development platform that supports the QorIQ LS1012A
  1220. Layerscape Architecture processor.
  1221. config TARGET_LS1012AFRDM
  1222. bool "Support ls1012afrdm"
  1223. select ARCH_LS1012A
  1224. select ARM64
  1225. select ARCH_SUPPORT_TFABOOT
  1226. help
  1227. Support for Freescale LS1012AFRDM platform.
  1228. The LS1012A Freedom board (FRDM) is a high-performance
  1229. development platform that supports the QorIQ LS1012A
  1230. Layerscape Architecture processor.
  1231. config TARGET_LS1028AQDS
  1232. bool "Support ls1028aqds"
  1233. select ARCH_LS1028A
  1234. select ARM64
  1235. select ARMV8_MULTIENTRY
  1236. select ARCH_SUPPORT_TFABOOT
  1237. select BOARD_LATE_INIT
  1238. help
  1239. Support for Freescale LS1028AQDS platform
  1240. The LS1028A Development System (QDS) is a high-performance
  1241. development platform that supports the QorIQ LS1028A
  1242. Layerscape Architecture processor.
  1243. config TARGET_LS1028ARDB
  1244. bool "Support ls1028ardb"
  1245. select ARCH_LS1028A
  1246. select ARM64
  1247. select ARMV8_MULTIENTRY
  1248. select ARCH_SUPPORT_TFABOOT
  1249. select BOARD_LATE_INIT
  1250. help
  1251. Support for Freescale LS1028ARDB platform
  1252. The LS1028A Development System (RDB) is a high-performance
  1253. development platform that supports the QorIQ LS1028A
  1254. Layerscape Architecture processor.
  1255. config TARGET_LS1088ARDB
  1256. bool "Support ls1088ardb"
  1257. select ARCH_LS1088A
  1258. select ARM64
  1259. select ARMV8_MULTIENTRY
  1260. select ARCH_SUPPORT_TFABOOT
  1261. select BOARD_LATE_INIT
  1262. select SUPPORT_SPL
  1263. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1264. help
  1265. Support for NXP LS1088ARDB platform.
  1266. The LS1088A Reference design board (RDB) is a high-performance
  1267. development platform that supports the QorIQ LS1088A
  1268. Layerscape Architecture processor.
  1269. config TARGET_LS1021AQDS
  1270. bool "Support ls1021aqds"
  1271. select ARCH_LS1021A
  1272. select ARCH_SUPPORT_PSCI
  1273. select BOARD_EARLY_INIT_F
  1274. select BOARD_LATE_INIT
  1275. select CPU_V7A
  1276. select CPU_V7_HAS_NONSEC
  1277. select CPU_V7_HAS_VIRT
  1278. select LS1_DEEP_SLEEP
  1279. select SUPPORT_SPL
  1280. select SYS_FSL_DDR
  1281. select FSL_DDR_INTERACTIVE
  1282. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1283. select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
  1284. imply SCSI
  1285. config TARGET_LS1021ATWR
  1286. bool "Support ls1021atwr"
  1287. select ARCH_LS1021A
  1288. select ARCH_SUPPORT_PSCI
  1289. select BOARD_EARLY_INIT_F
  1290. select BOARD_LATE_INIT
  1291. select CPU_V7A
  1292. select CPU_V7_HAS_NONSEC
  1293. select CPU_V7_HAS_VIRT
  1294. select LS1_DEEP_SLEEP
  1295. select SUPPORT_SPL
  1296. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1297. imply SCSI
  1298. config TARGET_LS1021ATSN
  1299. bool "Support ls1021atsn"
  1300. select ARCH_LS1021A
  1301. select ARCH_SUPPORT_PSCI
  1302. select BOARD_EARLY_INIT_F
  1303. select BOARD_LATE_INIT
  1304. select CPU_V7A
  1305. select CPU_V7_HAS_NONSEC
  1306. select CPU_V7_HAS_VIRT
  1307. select LS1_DEEP_SLEEP
  1308. select SUPPORT_SPL
  1309. imply SCSI
  1310. config TARGET_LS1021AIOT
  1311. bool "Support ls1021aiot"
  1312. select ARCH_LS1021A
  1313. select ARCH_SUPPORT_PSCI
  1314. select BOARD_LATE_INIT
  1315. select CPU_V7A
  1316. select CPU_V7_HAS_NONSEC
  1317. select CPU_V7_HAS_VIRT
  1318. select SUPPORT_SPL
  1319. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1320. imply SCSI
  1321. help
  1322. Support for Freescale LS1021AIOT platform.
  1323. The LS1021A Freescale board (IOT) is a high-performance
  1324. development platform that supports the QorIQ LS1021A
  1325. Layerscape Architecture processor.
  1326. config TARGET_LS1043AQDS
  1327. bool "Support ls1043aqds"
  1328. select ARCH_LS1043A
  1329. select ARM64
  1330. select ARMV8_MULTIENTRY
  1331. select ARCH_SUPPORT_TFABOOT
  1332. select BOARD_EARLY_INIT_F
  1333. select BOARD_LATE_INIT
  1334. select SUPPORT_SPL
  1335. select FSL_DDR_INTERACTIVE if !SPL
  1336. select FSL_DSPI if !SPL_NO_DSPI
  1337. select DM_SPI_FLASH if FSL_DSPI
  1338. imply SCSI
  1339. imply SCSI_AHCI
  1340. help
  1341. Support for Freescale LS1043AQDS platform.
  1342. config TARGET_LS1043ARDB
  1343. bool "Support ls1043ardb"
  1344. select ARCH_LS1043A
  1345. select ARM64
  1346. select ARMV8_MULTIENTRY
  1347. select ARCH_SUPPORT_TFABOOT
  1348. select BOARD_EARLY_INIT_F
  1349. select BOARD_LATE_INIT
  1350. select SUPPORT_SPL
  1351. select FSL_DSPI if !SPL_NO_DSPI
  1352. select DM_SPI_FLASH if FSL_DSPI
  1353. help
  1354. Support for Freescale LS1043ARDB platform.
  1355. config TARGET_LS1046AQDS
  1356. bool "Support ls1046aqds"
  1357. select ARCH_LS1046A
  1358. select ARM64
  1359. select ARMV8_MULTIENTRY
  1360. select ARCH_SUPPORT_TFABOOT
  1361. select BOARD_EARLY_INIT_F
  1362. select BOARD_LATE_INIT
  1363. select DM_SPI_FLASH if DM_SPI
  1364. select SUPPORT_SPL
  1365. select FSL_DDR_BIST if !SPL
  1366. select FSL_DDR_INTERACTIVE if !SPL
  1367. select FSL_DDR_INTERACTIVE if !SPL
  1368. imply SCSI
  1369. help
  1370. Support for Freescale LS1046AQDS platform.
  1371. The LS1046A Development System (QDS) is a high-performance
  1372. development platform that supports the QorIQ LS1046A
  1373. Layerscape Architecture processor.
  1374. config TARGET_LS1046ARDB
  1375. bool "Support ls1046ardb"
  1376. select ARCH_LS1046A
  1377. select ARM64
  1378. select ARMV8_MULTIENTRY
  1379. select ARCH_SUPPORT_TFABOOT
  1380. select BOARD_EARLY_INIT_F
  1381. select BOARD_LATE_INIT
  1382. select DM_SPI_FLASH if DM_SPI
  1383. select POWER_MC34VR500
  1384. select SUPPORT_SPL
  1385. select FSL_DDR_BIST
  1386. select FSL_DDR_INTERACTIVE if !SPL
  1387. imply SCSI
  1388. help
  1389. Support for Freescale LS1046ARDB platform.
  1390. The LS1046A Reference Design Board (RDB) is a high-performance
  1391. development platform that supports the QorIQ LS1046A
  1392. Layerscape Architecture processor.
  1393. config TARGET_LS1046AFRWY
  1394. bool "Support ls1046afrwy"
  1395. select ARCH_LS1046A
  1396. select ARM64
  1397. select ARMV8_MULTIENTRY
  1398. select ARCH_SUPPORT_TFABOOT
  1399. select BOARD_EARLY_INIT_F
  1400. select BOARD_LATE_INIT
  1401. select DM_SPI_FLASH if DM_SPI
  1402. imply SCSI
  1403. help
  1404. Support for Freescale LS1046AFRWY platform.
  1405. The LS1046A Freeway Board (FRWY) is a high-performance
  1406. development platform that supports the QorIQ LS1046A
  1407. Layerscape Architecture processor.
  1408. config TARGET_COLIBRI_PXA270
  1409. bool "Support colibri_pxa270"
  1410. select CPU_PXA
  1411. config ARCH_UNIPHIER
  1412. bool "Socionext UniPhier SoCs"
  1413. select BOARD_LATE_INIT
  1414. select DM
  1415. select DM_ETH
  1416. select DM_GPIO
  1417. select DM_I2C
  1418. select DM_MMC
  1419. select DM_MTD
  1420. select DM_RESET
  1421. select DM_SERIAL
  1422. select DM_USB
  1423. select OF_BOARD_SETUP
  1424. select OF_CONTROL
  1425. select OF_LIBFDT
  1426. select PINCTRL
  1427. select SPL_BOARD_INIT if SPL
  1428. select SPL_DM if SPL
  1429. select SPL_LIBCOMMON_SUPPORT if SPL
  1430. select SPL_LIBGENERIC_SUPPORT if SPL
  1431. select SPL_OF_CONTROL if SPL
  1432. select SPL_PINCTRL if SPL
  1433. select SUPPORT_SPL
  1434. imply CMD_DM
  1435. imply DISTRO_DEFAULTS
  1436. imply FAT_WRITE
  1437. help
  1438. Support for UniPhier SoC family developed by Socionext Inc.
  1439. (formerly, System LSI Business Division of Panasonic Corporation)
  1440. config ARCH_STM32
  1441. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1442. select CPU_V7M
  1443. select DM
  1444. select DM_SERIAL
  1445. imply CMD_DM
  1446. config ARCH_STI
  1447. bool "Support STMicrolectronics SoCs"
  1448. select BLK
  1449. select CPU_V7A
  1450. select DM
  1451. select DM_MMC
  1452. select DM_RESET
  1453. select DM_SERIAL
  1454. imply CMD_DM
  1455. help
  1456. Support for STMicroelectronics STiH407/10 SoC family.
  1457. This SoC is used on Linaro 96Board STiH410-B2260
  1458. config ARCH_STM32MP
  1459. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1460. select ARCH_MISC_INIT
  1461. select ARCH_SUPPORT_TFABOOT
  1462. select BOARD_LATE_INIT
  1463. select CLK
  1464. select DM
  1465. select DM_GPIO
  1466. select DM_RESET
  1467. select DM_SERIAL
  1468. select MISC
  1469. select OF_CONTROL
  1470. select OF_LIBFDT
  1471. select OF_SYSTEM_SETUP
  1472. select PINCTRL
  1473. select REGMAP
  1474. select SUPPORT_SPL
  1475. select SYSCON
  1476. select SYSRESET
  1477. select SYS_THUMB_BUILD
  1478. imply SPL_SYSRESET
  1479. imply CMD_DM
  1480. imply CMD_POWEROFF
  1481. imply OF_LIBFDT_OVERLAY
  1482. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1483. imply USE_PREBOOT
  1484. help
  1485. Support for STM32MP SoC family developed by STMicroelectronics,
  1486. MPUs based on ARM cortex A core
  1487. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1488. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1489. chain.
  1490. SPL is the unsecure FSBL for the basic boot chain.
  1491. config ARCH_ROCKCHIP
  1492. bool "Support Rockchip SoCs"
  1493. select BLK
  1494. select BINMAN if !ARM64
  1495. select DM
  1496. select DM_GPIO
  1497. select DM_I2C
  1498. select DM_MMC
  1499. select DM_PWM
  1500. select DM_REGULATOR
  1501. select DM_SERIAL
  1502. select DM_SPI
  1503. select DM_SPI_FLASH
  1504. select DM_USB if USB
  1505. select ENABLE_ARM_SOC_BOOT0_HOOK
  1506. select OF_CONTROL
  1507. select SPI
  1508. select SPL_DM if SPL
  1509. select SPL_DM_SPI if SPL
  1510. select SPL_DM_SPI_FLASH if SPL
  1511. select SYS_MALLOC_F
  1512. select SYS_THUMB_BUILD if !ARM64
  1513. imply ADC
  1514. imply CMD_DM
  1515. imply DEBUG_UART_BOARD_INIT
  1516. imply DISTRO_DEFAULTS
  1517. imply FAT_WRITE
  1518. imply SARADC_ROCKCHIP
  1519. imply SPL_SYSRESET
  1520. imply SPL_SYS_MALLOC_SIMPLE
  1521. imply SYS_NS16550
  1522. imply TPL_SYSRESET
  1523. imply USB_FUNCTION_FASTBOOT
  1524. config TARGET_THUNDERX_88XX
  1525. bool "Support ThunderX 88xx"
  1526. select ARM64
  1527. select OF_CONTROL
  1528. select PL01X_SERIAL
  1529. select SYS_CACHE_SHIFT_7
  1530. config ARCH_ASPEED
  1531. bool "Support Aspeed SoCs"
  1532. select DM
  1533. select OF_CONTROL
  1534. imply CMD_DM
  1535. config TARGET_DURIAN
  1536. bool "Support Phytium Durian Platform"
  1537. select ARM64
  1538. help
  1539. Support for durian platform.
  1540. It has 2GB Sdram, uart and pcie.
  1541. config TARGET_PRESIDIO_ASIC
  1542. bool "Support Cortina Presidio ASIC Platform"
  1543. select ARM64
  1544. endchoice
  1545. config ARCH_SUPPORT_TFABOOT
  1546. bool
  1547. config TFABOOT
  1548. bool "Support for booting from TF-A"
  1549. depends on ARCH_SUPPORT_TFABOOT
  1550. default n
  1551. help
  1552. Enabling this will make a U-Boot binary that is capable of being
  1553. booted via TF-A (Trusted Firmware for Cortex-A).
  1554. config TI_SECURE_DEVICE
  1555. bool "HS Device Type Support"
  1556. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1557. help
  1558. If a high secure (HS) device type is being used, this config
  1559. must be set. This option impacts various aspects of the
  1560. build system (to create signed boot images that can be
  1561. authenticated) and the code. See the doc/README.ti-secure
  1562. file for further details.
  1563. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1564. config ISW_ENTRY_ADDR
  1565. hex "Address in memory or XIP address of bootloader entry point"
  1566. default 0x402F4000 if AM43XX
  1567. default 0x402F0400 if AM33XX
  1568. default 0x40301350 if OMAP54XX
  1569. help
  1570. After any reset, the boot ROM searches the boot media for a valid
  1571. boot image. For non-XIP devices, the ROM then copies the image into
  1572. internal memory. For all boot modes, after the ROM processes the
  1573. boot image it eventually computes the entry point address depending
  1574. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1575. image headers.
  1576. endif
  1577. source "arch/arm/mach-aspeed/Kconfig"
  1578. source "arch/arm/mach-at91/Kconfig"
  1579. source "arch/arm/mach-bcm283x/Kconfig"
  1580. source "arch/arm/mach-bcmstb/Kconfig"
  1581. source "arch/arm/mach-davinci/Kconfig"
  1582. source "arch/arm/mach-exynos/Kconfig"
  1583. source "arch/arm/mach-highbank/Kconfig"
  1584. source "arch/arm/mach-integrator/Kconfig"
  1585. source "arch/arm/mach-k3/Kconfig"
  1586. source "arch/arm/mach-keystone/Kconfig"
  1587. source "arch/arm/mach-kirkwood/Kconfig"
  1588. source "arch/arm/mach-lpc32xx/Kconfig"
  1589. source "arch/arm/mach-mvebu/Kconfig"
  1590. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1591. source "arch/arm/mach-imx/mx2/Kconfig"
  1592. source "arch/arm/mach-imx/mx3/Kconfig"
  1593. source "arch/arm/mach-imx/mx5/Kconfig"
  1594. source "arch/arm/mach-imx/mx6/Kconfig"
  1595. source "arch/arm/mach-imx/mx7/Kconfig"
  1596. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1597. source "arch/arm/mach-imx/imx8/Kconfig"
  1598. source "arch/arm/mach-imx/imx8m/Kconfig"
  1599. source "arch/arm/mach-imx/imxrt/Kconfig"
  1600. source "arch/arm/mach-imx/mxs/Kconfig"
  1601. source "arch/arm/mach-omap2/Kconfig"
  1602. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1603. source "arch/arm/mach-orion5x/Kconfig"
  1604. source "arch/arm/mach-owl/Kconfig"
  1605. source "arch/arm/mach-rmobile/Kconfig"
  1606. source "arch/arm/mach-meson/Kconfig"
  1607. source "arch/arm/mach-mediatek/Kconfig"
  1608. source "arch/arm/mach-qemu/Kconfig"
  1609. source "arch/arm/mach-rockchip/Kconfig"
  1610. source "arch/arm/mach-s5pc1xx/Kconfig"
  1611. source "arch/arm/mach-snapdragon/Kconfig"
  1612. source "arch/arm/mach-socfpga/Kconfig"
  1613. source "arch/arm/mach-sti/Kconfig"
  1614. source "arch/arm/mach-stm32/Kconfig"
  1615. source "arch/arm/mach-stm32mp/Kconfig"
  1616. source "arch/arm/mach-sunxi/Kconfig"
  1617. source "arch/arm/mach-tegra/Kconfig"
  1618. source "arch/arm/mach-u8500/Kconfig"
  1619. source "arch/arm/mach-uniphier/Kconfig"
  1620. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1621. source "arch/arm/mach-zynq/Kconfig"
  1622. source "arch/arm/mach-zynqmp/Kconfig"
  1623. source "arch/arm/mach-versal/Kconfig"
  1624. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1625. source "arch/arm/cpu/armv7/Kconfig"
  1626. source "arch/arm/cpu/armv8/Kconfig"
  1627. source "arch/arm/mach-imx/Kconfig"
  1628. source "board/bosch/shc/Kconfig"
  1629. source "board/bosch/guardian/Kconfig"
  1630. source "board/CarMediaLab/flea3/Kconfig"
  1631. source "board/Marvell/aspenite/Kconfig"
  1632. source "board/Marvell/gplugd/Kconfig"
  1633. source "board/armadeus/apf27/Kconfig"
  1634. source "board/armltd/vexpress/Kconfig"
  1635. source "board/armltd/vexpress64/Kconfig"
  1636. source "board/cortina/presidio-asic/Kconfig"
  1637. source "board/broadcom/bcm23550_w1d/Kconfig"
  1638. source "board/broadcom/bcm28155_ap/Kconfig"
  1639. source "board/broadcom/bcm963158/Kconfig"
  1640. source "board/broadcom/bcm968360bg/Kconfig"
  1641. source "board/broadcom/bcm968580xref/Kconfig"
  1642. source "board/broadcom/bcmcygnus/Kconfig"
  1643. source "board/broadcom/bcmnsp/Kconfig"
  1644. source "board/broadcom/bcmns2/Kconfig"
  1645. source "board/cavium/thunderx/Kconfig"
  1646. source "board/cirrus/edb93xx/Kconfig"
  1647. source "board/eets/pdu001/Kconfig"
  1648. source "board/emulation/qemu-arm/Kconfig"
  1649. source "board/freescale/ls2080a/Kconfig"
  1650. source "board/freescale/ls2080aqds/Kconfig"
  1651. source "board/freescale/ls2080ardb/Kconfig"
  1652. source "board/freescale/ls1088a/Kconfig"
  1653. source "board/freescale/ls1028a/Kconfig"
  1654. source "board/freescale/ls1021aqds/Kconfig"
  1655. source "board/freescale/ls1043aqds/Kconfig"
  1656. source "board/freescale/ls1021atwr/Kconfig"
  1657. source "board/freescale/ls1021atsn/Kconfig"
  1658. source "board/freescale/ls1021aiot/Kconfig"
  1659. source "board/freescale/ls1046aqds/Kconfig"
  1660. source "board/freescale/ls1043ardb/Kconfig"
  1661. source "board/freescale/ls1046ardb/Kconfig"
  1662. source "board/freescale/ls1046afrwy/Kconfig"
  1663. source "board/freescale/ls1012aqds/Kconfig"
  1664. source "board/freescale/ls1012ardb/Kconfig"
  1665. source "board/freescale/ls1012afrdm/Kconfig"
  1666. source "board/freescale/lx2160a/Kconfig"
  1667. source "board/freescale/mx35pdk/Kconfig"
  1668. source "board/freescale/s32v234evb/Kconfig"
  1669. source "board/grinn/chiliboard/Kconfig"
  1670. source "board/hisilicon/hikey/Kconfig"
  1671. source "board/hisilicon/hikey960/Kconfig"
  1672. source "board/hisilicon/poplar/Kconfig"
  1673. source "board/isee/igep003x/Kconfig"
  1674. source "board/spear/spear300/Kconfig"
  1675. source "board/spear/spear310/Kconfig"
  1676. source "board/spear/spear320/Kconfig"
  1677. source "board/spear/spear600/Kconfig"
  1678. source "board/spear/x600/Kconfig"
  1679. source "board/st/stv0991/Kconfig"
  1680. source "board/tcl/sl50/Kconfig"
  1681. source "board/toradex/colibri_pxa270/Kconfig"
  1682. source "board/variscite/dart_6ul/Kconfig"
  1683. source "board/vscom/baltos/Kconfig"
  1684. source "board/xilinx/Kconfig"
  1685. source "board/xilinx/zynq/Kconfig"
  1686. source "board/xilinx/zynqmp/Kconfig"
  1687. source "board/phytium/durian/Kconfig"
  1688. source "arch/arm/Kconfig.debug"
  1689. endmenu
  1690. config SPL_LDSCRIPT
  1691. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1692. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1693. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64