board_f.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <clock_legacy.h>
  14. #include <console.h>
  15. #include <cpu.h>
  16. #include <cpu_func.h>
  17. #include <dm.h>
  18. #include <env.h>
  19. #include <env_internal.h>
  20. #include <fdtdec.h>
  21. #include <fs.h>
  22. #include <hang.h>
  23. #include <i2c.h>
  24. #include <init.h>
  25. #include <initcall.h>
  26. #include <lcd.h>
  27. #include <malloc.h>
  28. #include <mapmem.h>
  29. #include <os.h>
  30. #include <post.h>
  31. #include <relocate.h>
  32. #include <serial.h>
  33. #ifdef CONFIG_SPL
  34. #include <spl.h>
  35. #endif
  36. #include <status_led.h>
  37. #include <sysreset.h>
  38. #include <timer.h>
  39. #include <trace.h>
  40. #include <video.h>
  41. #include <watchdog.h>
  42. #include <asm/cache.h>
  43. #ifdef CONFIG_MACH_TYPE
  44. #include <asm/mach-types.h>
  45. #endif
  46. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  47. #include <asm/mp.h>
  48. #endif
  49. #include <asm/io.h>
  50. #include <asm/sections.h>
  51. #include <dm/root.h>
  52. #include <linux/errno.h>
  53. /*
  54. * Pointer to initial global data area
  55. *
  56. * Here we initialize it if needed.
  57. */
  58. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  59. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  60. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  61. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  62. #else
  63. DECLARE_GLOBAL_DATA_PTR;
  64. #endif
  65. /*
  66. * TODO(sjg@chromium.org): IMO this code should be
  67. * refactored to a single function, something like:
  68. *
  69. * void led_set_state(enum led_colour_t colour, int on);
  70. */
  71. /************************************************************************
  72. * Coloured LED functionality
  73. ************************************************************************
  74. * May be supplied by boards if desired
  75. */
  76. __weak void coloured_LED_init(void) {}
  77. __weak void red_led_on(void) {}
  78. __weak void red_led_off(void) {}
  79. __weak void green_led_on(void) {}
  80. __weak void green_led_off(void) {}
  81. __weak void yellow_led_on(void) {}
  82. __weak void yellow_led_off(void) {}
  83. __weak void blue_led_on(void) {}
  84. __weak void blue_led_off(void) {}
  85. /*
  86. * Why is gd allocated a register? Prior to reloc it might be better to
  87. * just pass it around to each function in this file?
  88. *
  89. * After reloc one could argue that it is hardly used and doesn't need
  90. * to be in a register. Or if it is it should perhaps hold pointers to all
  91. * global data for all modules, so that post-reloc we can avoid the massive
  92. * literal pool we get on ARM. Or perhaps just encourage each module to use
  93. * a structure...
  94. */
  95. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  96. static int init_func_watchdog_init(void)
  97. {
  98. # if defined(CONFIG_HW_WATCHDOG) && \
  99. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  100. defined(CONFIG_SH) || \
  101. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  102. defined(CONFIG_IMX_WATCHDOG))
  103. hw_watchdog_init();
  104. puts(" Watchdog enabled\n");
  105. # endif
  106. WATCHDOG_RESET();
  107. return 0;
  108. }
  109. int init_func_watchdog_reset(void)
  110. {
  111. WATCHDOG_RESET();
  112. return 0;
  113. }
  114. #endif /* CONFIG_WATCHDOG */
  115. __weak void board_add_ram_info(int use_default)
  116. {
  117. /* please define platform specific board_add_ram_info() */
  118. }
  119. static int init_baud_rate(void)
  120. {
  121. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  122. return 0;
  123. }
  124. static int display_text_info(void)
  125. {
  126. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  127. ulong bss_start, bss_end, text_base;
  128. bss_start = (ulong)&__bss_start;
  129. bss_end = (ulong)&__bss_end;
  130. #ifdef CONFIG_SYS_TEXT_BASE
  131. text_base = CONFIG_SYS_TEXT_BASE;
  132. #else
  133. text_base = CONFIG_SYS_MONITOR_BASE;
  134. #endif
  135. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  136. text_base, bss_start, bss_end);
  137. #endif
  138. return 0;
  139. }
  140. #ifdef CONFIG_SYSRESET
  141. static int print_resetinfo(void)
  142. {
  143. struct udevice *dev;
  144. char status[256];
  145. int ret;
  146. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  147. if (ret) {
  148. debug("%s: No sysreset device found (error: %d)\n",
  149. __func__, ret);
  150. /* Not all boards have sysreset drivers available during early
  151. * boot, so don't fail if one can't be found.
  152. */
  153. return 0;
  154. }
  155. if (!sysreset_get_status(dev, status, sizeof(status)))
  156. printf("%s", status);
  157. return 0;
  158. }
  159. #endif
  160. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  161. static int print_cpuinfo(void)
  162. {
  163. struct udevice *dev;
  164. char desc[512];
  165. int ret;
  166. dev = cpu_get_current_dev();
  167. if (!dev) {
  168. debug("%s: Could not get CPU device\n",
  169. __func__);
  170. return -ENODEV;
  171. }
  172. ret = cpu_get_desc(dev, desc, sizeof(desc));
  173. if (ret) {
  174. debug("%s: Could not get CPU description (err = %d)\n",
  175. dev->name, ret);
  176. return ret;
  177. }
  178. printf("CPU: %s\n", desc);
  179. return 0;
  180. }
  181. #endif
  182. static int announce_dram_init(void)
  183. {
  184. puts("DRAM: ");
  185. return 0;
  186. }
  187. static int show_dram_config(void)
  188. {
  189. unsigned long long size;
  190. #ifdef CONFIG_NR_DRAM_BANKS
  191. int i;
  192. debug("\nRAM Configuration:\n");
  193. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  194. size += gd->bd->bi_dram[i].size;
  195. debug("Bank #%d: %llx ", i,
  196. (unsigned long long)(gd->bd->bi_dram[i].start));
  197. #ifdef DEBUG
  198. print_size(gd->bd->bi_dram[i].size, "\n");
  199. #endif
  200. }
  201. debug("\nDRAM: ");
  202. #else
  203. size = gd->ram_size;
  204. #endif
  205. print_size(size, "");
  206. board_add_ram_info(0);
  207. putc('\n');
  208. return 0;
  209. }
  210. __weak int dram_init_banksize(void)
  211. {
  212. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  213. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  214. gd->bd->bi_dram[0].size = get_effective_memsize();
  215. #endif
  216. return 0;
  217. }
  218. #if defined(CONFIG_SYS_I2C)
  219. static int init_func_i2c(void)
  220. {
  221. puts("I2C: ");
  222. #ifdef CONFIG_SYS_I2C
  223. i2c_init_all();
  224. #else
  225. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  226. #endif
  227. puts("ready\n");
  228. return 0;
  229. }
  230. #endif
  231. #if defined(CONFIG_VID)
  232. __weak int init_func_vid(void)
  233. {
  234. return 0;
  235. }
  236. #endif
  237. static int setup_mon_len(void)
  238. {
  239. #if defined(__ARM__) || defined(__MICROBLAZE__)
  240. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  241. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  242. gd->mon_len = (ulong)&_end - (ulong)_init;
  243. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  244. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  245. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  246. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  247. #elif defined(CONFIG_SYS_MONITOR_BASE)
  248. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  249. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  250. #endif
  251. return 0;
  252. }
  253. static int setup_spl_handoff(void)
  254. {
  255. #if CONFIG_IS_ENABLED(HANDOFF)
  256. gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
  257. sizeof(struct spl_handoff));
  258. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  259. #endif
  260. return 0;
  261. }
  262. __weak int arch_cpu_init(void)
  263. {
  264. return 0;
  265. }
  266. __weak int mach_cpu_init(void)
  267. {
  268. return 0;
  269. }
  270. /* Get the top of usable RAM */
  271. __weak ulong board_get_usable_ram_top(ulong total_size)
  272. {
  273. #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
  274. /*
  275. * Detect whether we have so much RAM that it goes past the end of our
  276. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  277. */
  278. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  279. /*
  280. * Will wrap back to top of 32-bit space when reservations
  281. * are made.
  282. */
  283. return 0;
  284. #endif
  285. return gd->ram_top;
  286. }
  287. static int setup_dest_addr(void)
  288. {
  289. debug("Monitor len: %08lX\n", gd->mon_len);
  290. /*
  291. * Ram is setup, size stored in gd !!
  292. */
  293. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  294. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  295. /*
  296. * Subtract specified amount of memory to hide so that it won't
  297. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  298. * the Linux kernel should now get passed the now "corrected"
  299. * memory size and won't touch it either. This should work
  300. * for arch/ppc and arch/powerpc. Only Linux board ports in
  301. * arch/powerpc with bootwrapper support, that recalculate the
  302. * memory size from the SDRAM controller setup will have to
  303. * get fixed.
  304. */
  305. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  306. #endif
  307. #ifdef CONFIG_SYS_SDRAM_BASE
  308. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  309. #endif
  310. gd->ram_top = gd->ram_base + get_effective_memsize();
  311. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  312. gd->relocaddr = gd->ram_top;
  313. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  314. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  315. /*
  316. * We need to make sure the location we intend to put secondary core
  317. * boot code is reserved and not used by any part of u-boot
  318. */
  319. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  320. gd->relocaddr = determine_mp_bootpg(NULL);
  321. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  322. }
  323. #endif
  324. return 0;
  325. }
  326. #ifdef CONFIG_PRAM
  327. /* reserve protected RAM */
  328. static int reserve_pram(void)
  329. {
  330. ulong reg;
  331. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  332. gd->relocaddr -= (reg << 10); /* size is in kB */
  333. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  334. gd->relocaddr);
  335. return 0;
  336. }
  337. #endif /* CONFIG_PRAM */
  338. /* Round memory pointer down to next 4 kB limit */
  339. static int reserve_round_4k(void)
  340. {
  341. gd->relocaddr &= ~(4096 - 1);
  342. return 0;
  343. }
  344. __weak int arch_reserve_mmu(void)
  345. {
  346. return 0;
  347. }
  348. static int reserve_video(void)
  349. {
  350. #ifdef CONFIG_DM_VIDEO
  351. ulong addr;
  352. int ret;
  353. addr = gd->relocaddr;
  354. ret = video_reserve(&addr);
  355. if (ret)
  356. return ret;
  357. gd->relocaddr = addr;
  358. #elif defined(CONFIG_LCD)
  359. # ifdef CONFIG_FB_ADDR
  360. gd->fb_base = CONFIG_FB_ADDR;
  361. # else
  362. /* reserve memory for LCD display (always full pages) */
  363. gd->relocaddr = lcd_setmem(gd->relocaddr);
  364. gd->fb_base = gd->relocaddr;
  365. # endif /* CONFIG_FB_ADDR */
  366. #endif
  367. return 0;
  368. }
  369. static int reserve_trace(void)
  370. {
  371. #ifdef CONFIG_TRACE
  372. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  373. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  374. debug("Reserving %luk for trace data at: %08lx\n",
  375. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  376. #endif
  377. return 0;
  378. }
  379. static int reserve_uboot(void)
  380. {
  381. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  382. /*
  383. * reserve memory for U-Boot code, data & bss
  384. * round down to next 4 kB limit
  385. */
  386. gd->relocaddr -= gd->mon_len;
  387. gd->relocaddr &= ~(4096 - 1);
  388. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  389. /* round down to next 64 kB limit so that IVPR stays aligned */
  390. gd->relocaddr &= ~(65536 - 1);
  391. #endif
  392. debug("Reserving %ldk for U-Boot at: %08lx\n",
  393. gd->mon_len >> 10, gd->relocaddr);
  394. }
  395. gd->start_addr_sp = gd->relocaddr;
  396. return 0;
  397. }
  398. /*
  399. * reserve after start_addr_sp the requested size and make the stack pointer
  400. * 16-byte aligned, this alignment is needed for cast on the reserved memory
  401. * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
  402. * = ARMv8 Instruction Set Overview: quad word, 16 bytes
  403. */
  404. static unsigned long reserve_stack_aligned(size_t size)
  405. {
  406. return ALIGN_DOWN(gd->start_addr_sp - size, 16);
  407. }
  408. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  409. static int reserve_noncached(void)
  410. {
  411. /*
  412. * The value of gd->start_addr_sp must match the value of malloc_start
  413. * calculated in boatrd_f.c:initr_malloc(), which is passed to
  414. * board_r.c:mem_malloc_init() and then used by
  415. * cache.c:noncached_init()
  416. *
  417. * These calculations must match the code in cache.c:noncached_init()
  418. */
  419. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  420. MMU_SECTION_SIZE;
  421. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  422. MMU_SECTION_SIZE);
  423. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  424. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  425. return 0;
  426. }
  427. #endif
  428. /* reserve memory for malloc() area */
  429. static int reserve_malloc(void)
  430. {
  431. gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
  432. debug("Reserving %dk for malloc() at: %08lx\n",
  433. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  434. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  435. reserve_noncached();
  436. #endif
  437. return 0;
  438. }
  439. /* (permanently) allocate a Board Info struct */
  440. static int reserve_board(void)
  441. {
  442. if (!gd->bd) {
  443. gd->start_addr_sp = reserve_stack_aligned(sizeof(bd_t));
  444. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  445. memset(gd->bd, '\0', sizeof(bd_t));
  446. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  447. sizeof(bd_t), gd->start_addr_sp);
  448. }
  449. return 0;
  450. }
  451. static int setup_machine(void)
  452. {
  453. #ifdef CONFIG_MACH_TYPE
  454. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  455. #endif
  456. return 0;
  457. }
  458. static int reserve_global_data(void)
  459. {
  460. gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
  461. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  462. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  463. sizeof(gd_t), gd->start_addr_sp);
  464. return 0;
  465. }
  466. static int reserve_fdt(void)
  467. {
  468. #ifndef CONFIG_OF_EMBED
  469. /*
  470. * If the device tree is sitting immediately above our image then we
  471. * must relocate it. If it is embedded in the data section, then it
  472. * will be relocated with other data.
  473. */
  474. if (gd->fdt_blob) {
  475. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  476. gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
  477. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  478. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  479. gd->fdt_size, gd->start_addr_sp);
  480. }
  481. #endif
  482. return 0;
  483. }
  484. static int reserve_bootstage(void)
  485. {
  486. #ifdef CONFIG_BOOTSTAGE
  487. int size = bootstage_get_size();
  488. gd->start_addr_sp = reserve_stack_aligned(size);
  489. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  490. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  491. gd->start_addr_sp);
  492. #endif
  493. return 0;
  494. }
  495. __weak int arch_reserve_stacks(void)
  496. {
  497. return 0;
  498. }
  499. static int reserve_stacks(void)
  500. {
  501. /* make stack pointer 16-byte aligned */
  502. gd->start_addr_sp = reserve_stack_aligned(16);
  503. /*
  504. * let the architecture-specific code tailor gd->start_addr_sp and
  505. * gd->irq_sp
  506. */
  507. return arch_reserve_stacks();
  508. }
  509. static int reserve_bloblist(void)
  510. {
  511. #ifdef CONFIG_BLOBLIST
  512. gd->start_addr_sp = reserve_stack_aligned(CONFIG_BLOBLIST_SIZE);
  513. gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
  514. #endif
  515. return 0;
  516. }
  517. static int display_new_sp(void)
  518. {
  519. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  520. return 0;
  521. }
  522. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  523. defined(CONFIG_SH)
  524. static int setup_board_part1(void)
  525. {
  526. bd_t *bd = gd->bd;
  527. /*
  528. * Save local variables to board info struct
  529. */
  530. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  531. bd->bi_memsize = gd->ram_size; /* size in bytes */
  532. #ifdef CONFIG_SYS_SRAM_BASE
  533. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  534. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  535. #endif
  536. #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  537. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  538. #endif
  539. #if defined(CONFIG_M68K)
  540. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  541. #endif
  542. #if defined(CONFIG_MPC83xx)
  543. bd->bi_immrbar = CONFIG_SYS_IMMR;
  544. #endif
  545. return 0;
  546. }
  547. #endif
  548. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  549. static int setup_board_part2(void)
  550. {
  551. bd_t *bd = gd->bd;
  552. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  553. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  554. #if defined(CONFIG_CPM2)
  555. bd->bi_cpmfreq = gd->arch.cpm_clk;
  556. bd->bi_brgfreq = gd->arch.brg_clk;
  557. bd->bi_sccfreq = gd->arch.scc_clk;
  558. bd->bi_vco = gd->arch.vco_out;
  559. #endif /* CONFIG_CPM2 */
  560. #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
  561. bd->bi_pcifreq = gd->pci_clk;
  562. #endif
  563. #if defined(CONFIG_EXTRA_CLOCK)
  564. bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
  565. bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
  566. bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
  567. #endif
  568. return 0;
  569. }
  570. #endif
  571. #ifdef CONFIG_POST
  572. static int init_post(void)
  573. {
  574. post_bootmode_init();
  575. post_run(NULL, POST_ROM | post_bootmode_get(0));
  576. return 0;
  577. }
  578. #endif
  579. static int reloc_fdt(void)
  580. {
  581. #ifndef CONFIG_OF_EMBED
  582. if (gd->flags & GD_FLG_SKIP_RELOC)
  583. return 0;
  584. if (gd->new_fdt) {
  585. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  586. gd->fdt_blob = gd->new_fdt;
  587. }
  588. #endif
  589. return 0;
  590. }
  591. static int reloc_bootstage(void)
  592. {
  593. #ifdef CONFIG_BOOTSTAGE
  594. if (gd->flags & GD_FLG_SKIP_RELOC)
  595. return 0;
  596. if (gd->new_bootstage) {
  597. int size = bootstage_get_size();
  598. debug("Copying bootstage from %p to %p, size %x\n",
  599. gd->bootstage, gd->new_bootstage, size);
  600. memcpy(gd->new_bootstage, gd->bootstage, size);
  601. gd->bootstage = gd->new_bootstage;
  602. bootstage_relocate();
  603. }
  604. #endif
  605. return 0;
  606. }
  607. static int reloc_bloblist(void)
  608. {
  609. #ifdef CONFIG_BLOBLIST
  610. if (gd->flags & GD_FLG_SKIP_RELOC)
  611. return 0;
  612. if (gd->new_bloblist) {
  613. int size = CONFIG_BLOBLIST_SIZE;
  614. debug("Copying bloblist from %p to %p, size %x\n",
  615. gd->bloblist, gd->new_bloblist, size);
  616. memcpy(gd->new_bloblist, gd->bloblist, size);
  617. gd->bloblist = gd->new_bloblist;
  618. }
  619. #endif
  620. return 0;
  621. }
  622. static int setup_reloc(void)
  623. {
  624. if (gd->flags & GD_FLG_SKIP_RELOC) {
  625. debug("Skipping relocation due to flag\n");
  626. return 0;
  627. }
  628. #ifdef CONFIG_SYS_TEXT_BASE
  629. #ifdef ARM
  630. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  631. #elif defined(CONFIG_M68K)
  632. /*
  633. * On all ColdFire arch cpu, monitor code starts always
  634. * just after the default vector table location, so at 0x400
  635. */
  636. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  637. #elif !defined(CONFIG_SANDBOX)
  638. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  639. #endif
  640. #endif
  641. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  642. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  643. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  644. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  645. gd->start_addr_sp);
  646. return 0;
  647. }
  648. #ifdef CONFIG_OF_BOARD_FIXUP
  649. static int fix_fdt(void)
  650. {
  651. return board_fix_fdt((void *)gd->fdt_blob);
  652. }
  653. #endif
  654. /* ARM calls relocate_code from its crt0.S */
  655. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  656. !CONFIG_IS_ENABLED(X86_64)
  657. static int jump_to_copy(void)
  658. {
  659. if (gd->flags & GD_FLG_SKIP_RELOC)
  660. return 0;
  661. /*
  662. * x86 is special, but in a nice way. It uses a trampoline which
  663. * enables the dcache if possible.
  664. *
  665. * For now, other archs use relocate_code(), which is implemented
  666. * similarly for all archs. When we do generic relocation, hopefully
  667. * we can make all archs enable the dcache prior to relocation.
  668. */
  669. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  670. /*
  671. * SDRAM and console are now initialised. The final stack can now
  672. * be setup in SDRAM. Code execution will continue in Flash, but
  673. * with the stack in SDRAM and Global Data in temporary memory
  674. * (CPU cache)
  675. */
  676. arch_setup_gd(gd->new_gd);
  677. board_init_f_r_trampoline(gd->start_addr_sp);
  678. #else
  679. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  680. #endif
  681. return 0;
  682. }
  683. #endif
  684. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  685. static int initf_bootstage(void)
  686. {
  687. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  688. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  689. int ret;
  690. ret = bootstage_init(!from_spl);
  691. if (ret)
  692. return ret;
  693. if (from_spl) {
  694. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  695. CONFIG_BOOTSTAGE_STASH_SIZE);
  696. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  697. if (ret && ret != -ENOENT) {
  698. debug("Failed to unstash bootstage: err=%d\n", ret);
  699. return ret;
  700. }
  701. }
  702. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  703. return 0;
  704. }
  705. static int initf_console_record(void)
  706. {
  707. #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  708. return console_record_init();
  709. #else
  710. return 0;
  711. #endif
  712. }
  713. static int initf_dm(void)
  714. {
  715. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  716. int ret;
  717. bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
  718. ret = dm_init_and_scan(true);
  719. bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
  720. if (ret)
  721. return ret;
  722. #endif
  723. #ifdef CONFIG_TIMER_EARLY
  724. ret = dm_timer_init();
  725. if (ret)
  726. return ret;
  727. #endif
  728. return 0;
  729. }
  730. /* Architecture-specific memory reservation */
  731. __weak int reserve_arch(void)
  732. {
  733. return 0;
  734. }
  735. __weak int arch_cpu_init_dm(void)
  736. {
  737. return 0;
  738. }
  739. __weak int checkcpu(void)
  740. {
  741. return 0;
  742. }
  743. __weak int clear_bss(void)
  744. {
  745. return 0;
  746. }
  747. static const init_fnc_t init_sequence_f[] = {
  748. setup_mon_len,
  749. #ifdef CONFIG_OF_CONTROL
  750. fdtdec_setup,
  751. #endif
  752. #ifdef CONFIG_TRACE_EARLY
  753. trace_early_init,
  754. #endif
  755. initf_malloc,
  756. log_init,
  757. initf_bootstage, /* uses its own timer, so does not need DM */
  758. #ifdef CONFIG_BLOBLIST
  759. bloblist_init,
  760. #endif
  761. setup_spl_handoff,
  762. initf_console_record,
  763. #if defined(CONFIG_HAVE_FSP)
  764. arch_fsp_init,
  765. #endif
  766. arch_cpu_init, /* basic arch cpu dependent setup */
  767. mach_cpu_init, /* SoC/machine dependent CPU setup */
  768. initf_dm,
  769. arch_cpu_init_dm,
  770. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  771. board_early_init_f,
  772. #endif
  773. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  774. /* get CPU and bus clocks according to the environment variable */
  775. get_clocks, /* get CPU and bus clocks (etc.) */
  776. #endif
  777. #if !defined(CONFIG_M68K)
  778. timer_init, /* initialize timer */
  779. #endif
  780. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  781. board_postclk_init,
  782. #endif
  783. env_init, /* initialize environment */
  784. init_baud_rate, /* initialze baudrate settings */
  785. serial_init, /* serial communications setup */
  786. console_init_f, /* stage 1 init of console */
  787. display_options, /* say that we are here */
  788. display_text_info, /* show debugging info if required */
  789. checkcpu,
  790. #if defined(CONFIG_SYSRESET)
  791. print_resetinfo,
  792. #endif
  793. #if defined(CONFIG_DISPLAY_CPUINFO)
  794. print_cpuinfo, /* display cpu info (and speed) */
  795. #endif
  796. #if defined(CONFIG_DTB_RESELECT)
  797. embedded_dtb_select,
  798. #endif
  799. #if defined(CONFIG_DISPLAY_BOARDINFO)
  800. show_board_info,
  801. #endif
  802. INIT_FUNC_WATCHDOG_INIT
  803. #if defined(CONFIG_MISC_INIT_F)
  804. misc_init_f,
  805. #endif
  806. INIT_FUNC_WATCHDOG_RESET
  807. #if defined(CONFIG_SYS_I2C)
  808. init_func_i2c,
  809. #endif
  810. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  811. init_func_vid,
  812. #endif
  813. announce_dram_init,
  814. dram_init, /* configure available RAM banks */
  815. #ifdef CONFIG_POST
  816. post_init_f,
  817. #endif
  818. INIT_FUNC_WATCHDOG_RESET
  819. #if defined(CONFIG_SYS_DRAM_TEST)
  820. testdram,
  821. #endif /* CONFIG_SYS_DRAM_TEST */
  822. INIT_FUNC_WATCHDOG_RESET
  823. #ifdef CONFIG_POST
  824. init_post,
  825. #endif
  826. INIT_FUNC_WATCHDOG_RESET
  827. /*
  828. * Now that we have DRAM mapped and working, we can
  829. * relocate the code and continue running from DRAM.
  830. *
  831. * Reserve memory at end of RAM for (top down in that order):
  832. * - area that won't get touched by U-Boot and Linux (optional)
  833. * - kernel log buffer
  834. * - protected RAM
  835. * - LCD framebuffer
  836. * - monitor code
  837. * - board info struct
  838. */
  839. setup_dest_addr,
  840. #ifdef CONFIG_PRAM
  841. reserve_pram,
  842. #endif
  843. reserve_round_4k,
  844. arch_reserve_mmu,
  845. reserve_video,
  846. reserve_trace,
  847. reserve_uboot,
  848. reserve_malloc,
  849. reserve_board,
  850. setup_machine,
  851. reserve_global_data,
  852. reserve_fdt,
  853. reserve_bootstage,
  854. reserve_bloblist,
  855. reserve_arch,
  856. reserve_stacks,
  857. dram_init_banksize,
  858. show_dram_config,
  859. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  860. defined(CONFIG_SH)
  861. setup_board_part1,
  862. #endif
  863. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  864. INIT_FUNC_WATCHDOG_RESET
  865. setup_board_part2,
  866. #endif
  867. display_new_sp,
  868. #ifdef CONFIG_OF_BOARD_FIXUP
  869. fix_fdt,
  870. #endif
  871. INIT_FUNC_WATCHDOG_RESET
  872. reloc_fdt,
  873. reloc_bootstage,
  874. reloc_bloblist,
  875. setup_reloc,
  876. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  877. copy_uboot_to_ram,
  878. do_elf_reloc_fixups,
  879. #endif
  880. clear_bss,
  881. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  882. !CONFIG_IS_ENABLED(X86_64)
  883. jump_to_copy,
  884. #endif
  885. NULL,
  886. };
  887. void board_init_f(ulong boot_flags)
  888. {
  889. gd->flags = boot_flags;
  890. gd->have_console = 0;
  891. if (initcall_run_list(init_sequence_f))
  892. hang();
  893. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  894. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  895. !defined(CONFIG_ARC)
  896. /* NOTREACHED - jump_to_copy() does not return */
  897. hang();
  898. #endif
  899. }
  900. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  901. /*
  902. * For now this code is only used on x86.
  903. *
  904. * init_sequence_f_r is the list of init functions which are run when
  905. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  906. * The following limitations must be considered when implementing an
  907. * '_f_r' function:
  908. * - 'static' variables are read-only
  909. * - Global Data (gd->xxx) is read/write
  910. *
  911. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  912. * supported). It _should_, if possible, copy global data to RAM and
  913. * initialise the CPU caches (to speed up the relocation process)
  914. *
  915. * NOTE: At present only x86 uses this route, but it is intended that
  916. * all archs will move to this when generic relocation is implemented.
  917. */
  918. static const init_fnc_t init_sequence_f_r[] = {
  919. #if !CONFIG_IS_ENABLED(X86_64)
  920. init_cache_f_r,
  921. #endif
  922. NULL,
  923. };
  924. void board_init_f_r(void)
  925. {
  926. if (initcall_run_list(init_sequence_f_r))
  927. hang();
  928. /*
  929. * The pre-relocation drivers may be using memory that has now gone
  930. * away. Mark serial as unavailable - this will fall back to the debug
  931. * UART if available.
  932. *
  933. * Do the same with log drivers since the memory may not be available.
  934. */
  935. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  936. #ifdef CONFIG_TIMER
  937. gd->timer = NULL;
  938. #endif
  939. /*
  940. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  941. * Transfer execution from Flash to RAM by calculating the address
  942. * of the in-RAM copy of board_init_r() and calling it
  943. */
  944. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  945. /* NOTREACHED - board_init_r() does not return */
  946. hang();
  947. }
  948. #endif /* CONFIG_X86 */