tqma6s.cfg 4.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com>
  4. *
  5. * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
  6. * and create imximage boot image
  7. *
  8. * The syntax is taken as close as possible with the kwbimage
  9. */
  10. /* image version */
  11. IMAGE_VERSION 2
  12. #define __ASSEMBLY__
  13. #include <config.h>
  14. /*
  15. * Boot Device : one of
  16. * spi, sd (the board has no nand neither onenand)
  17. */
  18. #if defined(CONFIG_TQMA6X_MMC_BOOT)
  19. BOOT_FROM sd
  20. #elif defined(CONFIG_TQMA6X_SPI_BOOT)
  21. BOOT_FROM spi
  22. #endif
  23. #include "asm/arch/mx6-ddr.h"
  24. #include "asm/arch/iomux.h"
  25. #include "asm/arch/crm_regs.h"
  26. /* TQMa6S DDR config Rev. 0100B */
  27. /* IOMUX configuration */
  28. DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
  29. DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
  30. DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00008000
  31. DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030
  32. DATA 4, MX6_IOM_DRAM_CAS, 0x00008030
  33. DATA 4, MX6_IOM_DRAM_RAS, 0x00008030
  34. DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
  35. DATA 4, MX6_IOM_DRAM_RESET, 0x000C3030
  36. DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
  37. DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000
  38. DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
  39. DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030
  40. DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030
  41. DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030
  42. DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
  43. DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030
  44. DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030
  45. DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030
  46. DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030
  47. DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000000
  48. DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000000
  49. DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000000
  50. DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000000
  51. DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
  52. DATA 4, MX6_IOM_GRP_B0DS, 0x00000030
  53. DATA 4, MX6_IOM_GRP_B1DS, 0x00000030
  54. DATA 4, MX6_IOM_GRP_B2DS, 0x00000030
  55. DATA 4, MX6_IOM_GRP_B3DS, 0x00000030
  56. DATA 4, MX6_IOM_GRP_B4DS, 0x00000000
  57. DATA 4, MX6_IOM_GRP_B5DS, 0x00000000
  58. DATA 4, MX6_IOM_GRP_B6DS, 0x00000000
  59. DATA 4, MX6_IOM_GRP_B7DS, 0x00000000
  60. DATA 4, MX6_IOM_DRAM_DQM0, 0x00000030
  61. DATA 4, MX6_IOM_DRAM_DQM1, 0x00000030
  62. DATA 4, MX6_IOM_DRAM_DQM2, 0x00000030
  63. DATA 4, MX6_IOM_DRAM_DQM3, 0x00000030
  64. DATA 4, MX6_IOM_DRAM_DQM4, 0x00000000
  65. DATA 4, MX6_IOM_DRAM_DQM5, 0x00000000
  66. DATA 4, MX6_IOM_DRAM_DQM6, 0x00000000
  67. DATA 4, MX6_IOM_DRAM_DQM7, 0x00000000
  68. /* memory interface calibration values */
  69. DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
  70. DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1380000
  71. DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0014000E
  72. DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00120014
  73. DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00000000
  74. DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00000000
  75. DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x0240023C
  76. DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x0228022C
  77. DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x00000000
  78. DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x00000000
  79. DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4A4A4E4A
  80. DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x00000000
  81. DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x36362A32
  82. DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x00000000
  83. DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
  84. DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
  85. DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
  86. DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
  87. DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x00000000
  88. DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x00000000
  89. DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x00000000
  90. DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x00000000
  91. DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
  92. DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000000
  93. /* configure memory interface */
  94. DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
  95. DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
  96. DATA 4, MX6_MMDC_P0_MDCFG0, 0x3F435333
  97. DATA 4, MX6_MMDC_P0_MDCFG1, 0xB68E8B63
  98. DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
  99. DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
  100. DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
  101. DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
  102. DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
  103. DATA 4, MX6_MMDC_P0_MDASP, 0x00000017
  104. DATA 4, MX6_MMDC_P0_MDCTL, 0x83190000
  105. DATA 4, MX6_MMDC_P0_MDSCR, 0x00008032
  106. DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
  107. DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
  108. DATA 4, MX6_MMDC_P0_MDSCR, 0x05208030
  109. DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
  110. DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
  111. DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022222
  112. DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000
  113. DATA 4, MX6_MMDC_P0_MDPDC, 0x0002552D
  114. DATA 4, MX6_MMDC_P0_MAPSR, 0x00001006
  115. DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
  116. #include "clocks.cfg"