imx6_spl.h 3.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2014 Gateworks Corporation
  4. * Author: Tim Harvey <tharvey@gateworks.com>
  5. */
  6. #ifndef __IMX6_SPL_CONFIG_H
  7. #define __IMX6_SPL_CONFIG_H
  8. #ifdef CONFIG_SPL
  9. #ifdef CONFIG_MX6_OCRAM_256KB
  10. /*
  11. * see Figure 8.4.1 in IMX6DQ Reference manuals:
  12. * - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF
  13. * - BOOT ROM stack is at 0x0093FFB8
  14. * - if icache/dcache is enabled (eFuse/strapping controlled) then the
  15. * IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to
  16. * fit between 0x00907000 and 0x00938000.
  17. * - Additionally the BOOT ROM loads what they consider the firmware image
  18. * which consists of a 4K header in front of us that contains the IVT, DCD
  19. * and some padding thus 'our' max size is really 0x00908000 - 0x00938000
  20. * or 192KB
  21. */
  22. #define CONFIG_SPL_MAX_SIZE 0x30000
  23. #define CONFIG_SPL_STACK 0x0093FFB8
  24. /*
  25. * Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the
  26. * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
  27. * boot media (given that boot media specific offset is configured properly).
  28. */
  29. #define CONFIG_SPL_PAD_TO 0x31000
  30. #else
  31. /*
  32. * see Figure 8-3 in IMX6SDL Reference manuals:
  33. * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF
  34. * - BOOT ROM stack is at 0x0091FFB8
  35. * - if icache/dcache is enabled (eFuse/strapping controlled) then the
  36. * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to
  37. * fit between 0x00907000 and 0x00918000.
  38. * - Additionally the BOOT ROM loads what they consider the firmware image
  39. * which consists of a 4K header in front of us that contains the IVT, DCD
  40. * and some padding thus 'our' max size is really 0x00908000 - 0x00918000
  41. * or 64KB
  42. */
  43. #define CONFIG_SPL_MAX_SIZE 0x10000
  44. #define CONFIG_SPL_STACK 0x0091FFB8
  45. /*
  46. * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the
  47. * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
  48. * boot media (given that boot media specific offset is configured properly).
  49. */
  50. #define CONFIG_SPL_PAD_TO 0x11000
  51. #endif
  52. /* MMC support */
  53. #if defined(CONFIG_SPL_MMC_SUPPORT)
  54. #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */
  55. #endif
  56. /* SATA support */
  57. #if defined(CONFIG_SPL_SATA_SUPPORT)
  58. #define CONFIG_SPL_SATA_BOOT_DEVICE 0
  59. #define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1
  60. #endif
  61. /* Define the payload for FAT/EXT support */
  62. #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
  63. # ifdef CONFIG_OF_CONTROL
  64. # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
  65. # else
  66. # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  67. # endif
  68. #endif
  69. #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
  70. defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
  71. #define CONFIG_SPL_BSS_START_ADDR 0x88200000
  72. #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
  73. #define CONFIG_SYS_SPL_MALLOC_START 0x88300000
  74. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
  75. #else
  76. #define CONFIG_SPL_BSS_START_ADDR 0x18200000
  77. #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
  78. #define CONFIG_SYS_SPL_MALLOC_START 0x18300000
  79. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
  80. #endif
  81. #endif
  82. #endif