musb_core.h 15 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * MUSB OTG driver defines
  4. *
  5. * Copyright 2005 Mentor Graphics Corporation
  6. * Copyright (C) 2005-2006 by Texas Instruments
  7. * Copyright (C) 2006-2007 Nokia Corporation
  8. */
  9. #ifndef __MUSB_CORE_H__
  10. #define __MUSB_CORE_H__
  11. #ifndef __UBOOT__
  12. #include <linux/slab.h>
  13. #include <linux/list.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/errno.h>
  16. #include <linux/timer.h>
  17. #include <linux/device.h>
  18. #include <linux/usb.h>
  19. #include <linux/usb/otg.h>
  20. #else
  21. #include <linux/errno.h>
  22. #endif
  23. #include <linux/usb/ch9.h>
  24. #include <linux/usb/gadget.h>
  25. #include <linux/usb/musb.h>
  26. struct musb;
  27. struct musb_hw_ep;
  28. struct musb_ep;
  29. /* Helper defines for struct musb->hwvers */
  30. #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
  31. #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
  32. #define MUSB_HWVERS_RC 0x8000
  33. #define MUSB_HWVERS_1300 0x52C
  34. #define MUSB_HWVERS_1400 0x590
  35. #define MUSB_HWVERS_1800 0x720
  36. #define MUSB_HWVERS_1900 0x784
  37. #define MUSB_HWVERS_2000 0x800
  38. #include "musb_debug.h"
  39. #include "musb_dma.h"
  40. #include "musb_io.h"
  41. #include "musb_regs.h"
  42. #include "musb_gadget.h"
  43. #ifndef __UBOOT__
  44. #include <linux/usb/hcd.h>
  45. #endif
  46. #include "musb_host.h"
  47. #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
  48. #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
  49. #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
  50. /* NOTE: otg and peripheral-only state machines start at B_IDLE.
  51. * OTG or host-only go to A_IDLE when ID is sensed.
  52. */
  53. #define is_peripheral_active(m) (!(m)->is_host)
  54. #define is_host_active(m) ((m)->is_host)
  55. #ifdef CONFIG_PROC_FS
  56. #include <linux/fs.h>
  57. #define MUSB_CONFIG_PROC_FS
  58. #endif
  59. /****************************** PERIPHERAL ROLE *****************************/
  60. #ifndef __UBOOT__
  61. #define is_peripheral_capable() (1)
  62. #else
  63. #ifdef CONFIG_USB_MUSB_GADGET
  64. #define is_peripheral_capable() (1)
  65. #else
  66. #define is_peripheral_capable() (0)
  67. #endif
  68. #endif
  69. extern irqreturn_t musb_g_ep0_irq(struct musb *);
  70. extern void musb_g_tx(struct musb *, u8);
  71. extern void musb_g_rx(struct musb *, u8);
  72. extern void musb_g_reset(struct musb *);
  73. extern void musb_g_suspend(struct musb *);
  74. extern void musb_g_resume(struct musb *);
  75. extern void musb_g_wakeup(struct musb *);
  76. extern void musb_g_disconnect(struct musb *);
  77. /****************************** HOST ROLE ***********************************/
  78. #ifndef __UBOOT__
  79. #define is_host_capable() (1)
  80. #else
  81. #ifdef CONFIG_USB_MUSB_HOST
  82. #define is_host_capable() (1)
  83. #else
  84. #define is_host_capable() (0)
  85. #endif
  86. #endif
  87. extern irqreturn_t musb_h_ep0_irq(struct musb *);
  88. extern void musb_host_tx(struct musb *, u8);
  89. extern void musb_host_rx(struct musb *, u8);
  90. /****************************** CONSTANTS ********************************/
  91. #ifndef MUSB_C_NUM_EPS
  92. #define MUSB_C_NUM_EPS ((u8)16)
  93. #endif
  94. #ifndef MUSB_MAX_END0_PACKET
  95. #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  96. #endif
  97. /* host side ep0 states */
  98. enum musb_h_ep0_state {
  99. MUSB_EP0_IDLE,
  100. MUSB_EP0_START, /* expect ack of setup */
  101. MUSB_EP0_IN, /* expect IN DATA */
  102. MUSB_EP0_OUT, /* expect ack of OUT DATA */
  103. MUSB_EP0_STATUS, /* expect ack of STATUS */
  104. } __attribute__ ((packed));
  105. /* peripheral side ep0 states */
  106. enum musb_g_ep0_state {
  107. MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
  108. MUSB_EP0_STAGE_SETUP, /* received SETUP */
  109. MUSB_EP0_STAGE_TX, /* IN data */
  110. MUSB_EP0_STAGE_RX, /* OUT data */
  111. MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
  112. MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
  113. MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
  114. } __attribute__ ((packed));
  115. /*
  116. * OTG protocol constants. See USB OTG 1.3 spec,
  117. * sections 5.5 "Device Timings" and 6.6.5 "Timers".
  118. */
  119. #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
  120. #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
  121. #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
  122. #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
  123. /*************************** REGISTER ACCESS ********************************/
  124. /* Endpoint registers (other than dynfifo setup) can be accessed either
  125. * directly with the "flat" model, or after setting up an index register.
  126. */
  127. #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
  128. || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_ARCH_OMAP4)
  129. /* REVISIT indexed access seemed to
  130. * misbehave (on DaVinci) for at least peripheral IN ...
  131. */
  132. #define MUSB_FLAT_REG
  133. #endif
  134. /* TUSB mapping: "flat" plus ep0 special cases */
  135. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  136. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  137. #define musb_ep_select(_mbase, _epnum) \
  138. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  139. #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
  140. /* "flat" mapping: each endpoint has its own i/o address */
  141. #elif defined(MUSB_FLAT_REG)
  142. #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
  143. #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
  144. /* "indexed" mapping: INDEX register controls register bank select */
  145. #else
  146. #define musb_ep_select(_mbase, _epnum) \
  147. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  148. #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
  149. #endif
  150. /****************************** FUNCTIONS ********************************/
  151. #define MUSB_HST_MODE(_musb)\
  152. { (_musb)->is_host = true; }
  153. #define MUSB_DEV_MODE(_musb) \
  154. { (_musb)->is_host = false; }
  155. #define test_devctl_hst_mode(_x) \
  156. (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
  157. #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
  158. /******************************** TYPES *************************************/
  159. /**
  160. * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
  161. * @init: turns on clocks, sets up platform-specific registers, etc
  162. * @exit: undoes @init
  163. * @set_mode: forcefully changes operating mode
  164. * @try_ilde: tries to idle the IP
  165. * @vbus_status: returns vbus status if possible
  166. * @set_vbus: forces vbus status
  167. * @adjust_channel_params: pre check for standard dma channel_program func
  168. * @pre_root_reset_end: called before the root usb port reset flag gets cleared
  169. * @post_root_reset_end: called after the root usb port reset flag gets cleared
  170. */
  171. struct musb_platform_ops {
  172. int (*init)(struct musb *musb);
  173. int (*exit)(struct musb *musb);
  174. #ifndef __UBOOT__
  175. void (*enable)(struct musb *musb);
  176. #else
  177. int (*enable)(struct musb *musb);
  178. #endif
  179. void (*disable)(struct musb *musb);
  180. int (*set_mode)(struct musb *musb, u8 mode);
  181. void (*try_idle)(struct musb *musb, unsigned long timeout);
  182. int (*vbus_status)(struct musb *musb);
  183. void (*set_vbus)(struct musb *musb, int on);
  184. int (*adjust_channel_params)(struct dma_channel *channel,
  185. u16 packet_sz, u8 *mode,
  186. dma_addr_t *dma_addr, u32 *len);
  187. void (*pre_root_reset_end)(struct musb *musb);
  188. void (*post_root_reset_end)(struct musb *musb);
  189. };
  190. /*
  191. * struct musb_hw_ep - endpoint hardware (bidirectional)
  192. *
  193. * Ordered slightly for better cacheline locality.
  194. */
  195. struct musb_hw_ep {
  196. struct musb *musb;
  197. void __iomem *fifo;
  198. void __iomem *regs;
  199. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  200. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  201. void __iomem *conf;
  202. #endif
  203. /* index in musb->endpoints[] */
  204. u8 epnum;
  205. /* hardware configuration, possibly dynamic */
  206. bool is_shared_fifo;
  207. bool tx_double_buffered;
  208. bool rx_double_buffered;
  209. u16 max_packet_sz_tx;
  210. u16 max_packet_sz_rx;
  211. struct dma_channel *tx_channel;
  212. struct dma_channel *rx_channel;
  213. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  214. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  215. /* TUSB has "asynchronous" and "synchronous" dma modes */
  216. dma_addr_t fifo_async;
  217. dma_addr_t fifo_sync;
  218. void __iomem *fifo_sync_va;
  219. #endif
  220. void __iomem *target_regs;
  221. /* currently scheduled peripheral endpoint */
  222. struct musb_qh *in_qh;
  223. struct musb_qh *out_qh;
  224. u8 rx_reinit;
  225. u8 tx_reinit;
  226. /* peripheral side */
  227. struct musb_ep ep_in; /* TX */
  228. struct musb_ep ep_out; /* RX */
  229. };
  230. static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
  231. {
  232. return next_request(&hw_ep->ep_in);
  233. }
  234. static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
  235. {
  236. return next_request(&hw_ep->ep_out);
  237. }
  238. struct musb_csr_regs {
  239. /* FIFO registers */
  240. u16 txmaxp, txcsr, rxmaxp, rxcsr;
  241. u16 rxfifoadd, txfifoadd;
  242. u8 txtype, txinterval, rxtype, rxinterval;
  243. u8 rxfifosz, txfifosz;
  244. u8 txfunaddr, txhubaddr, txhubport;
  245. u8 rxfunaddr, rxhubaddr, rxhubport;
  246. };
  247. struct musb_context_registers {
  248. u8 power;
  249. u16 intrtxe, intrrxe;
  250. u8 intrusbe;
  251. u16 frame;
  252. u8 index, testmode;
  253. u8 devctl, busctl, misc;
  254. u32 otg_interfsel;
  255. struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
  256. };
  257. /*
  258. * struct musb - Driver instance data.
  259. */
  260. struct musb {
  261. /* device lock */
  262. spinlock_t lock;
  263. const struct musb_platform_ops *ops;
  264. struct musb_context_registers context;
  265. irqreturn_t (*isr)(int, void *);
  266. struct work_struct irq_work;
  267. u16 hwvers;
  268. /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
  269. #define MUSB_PORT_STAT_RESUME (1 << 31)
  270. u32 port1_status;
  271. unsigned long rh_timer;
  272. enum musb_h_ep0_state ep0_stage;
  273. /* bulk traffic normally dedicates endpoint hardware, and each
  274. * direction has its own ring of host side endpoints.
  275. * we try to progress the transfer at the head of each endpoint's
  276. * queue until it completes or NAKs too much; then we try the next
  277. * endpoint.
  278. */
  279. struct musb_hw_ep *bulk_ep;
  280. struct list_head control; /* of musb_qh */
  281. struct list_head in_bulk; /* of musb_qh */
  282. struct list_head out_bulk; /* of musb_qh */
  283. struct timer_list otg_timer;
  284. struct notifier_block nb;
  285. struct dma_controller *dma_controller;
  286. struct device *controller;
  287. void __iomem *ctrl_base;
  288. void __iomem *mregs;
  289. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  290. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  291. dma_addr_t async;
  292. dma_addr_t sync;
  293. void __iomem *sync_va;
  294. #endif
  295. /* passed down from chip/board specific irq handlers */
  296. u8 int_usb;
  297. u16 int_rx;
  298. u16 int_tx;
  299. struct usb_phy *xceiv;
  300. int nIrq;
  301. unsigned irq_wake:1;
  302. struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
  303. #define control_ep endpoints
  304. #define VBUSERR_RETRY_COUNT 3
  305. u16 vbuserr_retry;
  306. u16 epmask;
  307. u8 nr_endpoints;
  308. u8 board_mode; /* enum musb_mode */
  309. int (*board_set_power)(int state);
  310. u8 min_power; /* vbus for periph, in mA/2 */
  311. bool is_host;
  312. int a_wait_bcon; /* VBUS timeout in msecs */
  313. unsigned long idle_timeout; /* Next timeout in jiffies */
  314. /* active means connected and not suspended */
  315. unsigned is_active:1;
  316. unsigned is_multipoint:1;
  317. unsigned ignore_disconnect:1; /* during bus resets */
  318. unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
  319. unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
  320. unsigned dyn_fifo:1; /* dynamic FIFO supported? */
  321. unsigned bulk_split:1;
  322. #define can_bulk_split(musb,type) \
  323. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
  324. unsigned bulk_combine:1;
  325. #define can_bulk_combine(musb,type) \
  326. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
  327. /* is_suspended means USB B_PERIPHERAL suspend */
  328. unsigned is_suspended:1;
  329. /* may_wakeup means remote wakeup is enabled */
  330. unsigned may_wakeup:1;
  331. /* is_self_powered is reported in device status and the
  332. * config descriptor. is_bus_powered means B_PERIPHERAL
  333. * draws some VBUS current; both can be true.
  334. */
  335. unsigned is_self_powered:1;
  336. unsigned is_bus_powered:1;
  337. unsigned set_address:1;
  338. unsigned test_mode:1;
  339. unsigned softconnect:1;
  340. u8 address;
  341. u8 test_mode_nr;
  342. u16 ackpend; /* ep0 */
  343. enum musb_g_ep0_state ep0_state;
  344. struct usb_gadget g; /* the gadget */
  345. struct usb_gadget_driver *gadget_driver; /* its driver */
  346. /*
  347. * FIXME: Remove this flag.
  348. *
  349. * This is only added to allow Blackfin to work
  350. * with current driver. For some unknown reason
  351. * Blackfin doesn't work with double buffering
  352. * and that's enabled by default.
  353. *
  354. * We added this flag to forcefully disable double
  355. * buffering until we get it working.
  356. */
  357. unsigned double_buffer_not_ok:1;
  358. struct musb_hdrc_config *config;
  359. #ifdef MUSB_CONFIG_PROC_FS
  360. struct proc_dir_entry *proc_entry;
  361. #endif
  362. };
  363. static inline struct musb *gadget_to_musb(struct usb_gadget *g)
  364. {
  365. return container_of(g, struct musb, g);
  366. }
  367. static inline int musb_read_fifosize(struct musb *musb,
  368. struct musb_hw_ep *hw_ep, u8 epnum)
  369. {
  370. void *mbase = musb->mregs;
  371. u8 reg = 0;
  372. /* read from core using indexed model */
  373. reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
  374. /* 0's returned when no more endpoints */
  375. if (!reg)
  376. return -ENODEV;
  377. musb->nr_endpoints++;
  378. musb->epmask |= (1 << epnum);
  379. hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
  380. /* shared TX/RX FIFO? */
  381. if ((reg & 0xf0) == 0xf0) {
  382. hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
  383. hw_ep->is_shared_fifo = true;
  384. return 0;
  385. } else {
  386. hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
  387. hw_ep->is_shared_fifo = false;
  388. }
  389. return 0;
  390. }
  391. static inline void musb_configure_ep0(struct musb *musb)
  392. {
  393. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  394. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  395. musb->endpoints[0].is_shared_fifo = true;
  396. }
  397. /***************************** Glue it together *****************************/
  398. extern const char musb_driver_name[];
  399. #ifndef __UBOOT__
  400. extern void musb_start(struct musb *musb);
  401. #else
  402. extern int musb_start(struct musb *musb);
  403. #endif
  404. extern void musb_stop(struct musb *musb);
  405. extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
  406. extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
  407. extern void musb_load_testpacket(struct musb *);
  408. extern irqreturn_t musb_interrupt(struct musb *);
  409. extern void musb_hnp_stop(struct musb *musb);
  410. static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
  411. {
  412. if (musb->ops->set_vbus)
  413. musb->ops->set_vbus(musb, is_on);
  414. }
  415. #ifndef __UBOOT__
  416. static inline void musb_platform_enable(struct musb *musb)
  417. {
  418. if (musb->ops->enable)
  419. musb->ops->enable(musb);
  420. }
  421. #else
  422. static inline int musb_platform_enable(struct musb *musb)
  423. {
  424. if (!musb->ops->enable)
  425. return 0;
  426. return musb->ops->enable(musb);
  427. }
  428. #endif
  429. static inline void musb_platform_disable(struct musb *musb)
  430. {
  431. if (musb->ops->disable)
  432. musb->ops->disable(musb);
  433. }
  434. static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
  435. {
  436. if (!musb->ops->set_mode)
  437. return 0;
  438. return musb->ops->set_mode(musb, mode);
  439. }
  440. static inline void musb_platform_try_idle(struct musb *musb,
  441. unsigned long timeout)
  442. {
  443. if (musb->ops->try_idle)
  444. musb->ops->try_idle(musb, timeout);
  445. }
  446. static inline int musb_platform_get_vbus_status(struct musb *musb)
  447. {
  448. if (!musb->ops->vbus_status)
  449. return 0;
  450. return musb->ops->vbus_status(musb);
  451. }
  452. static inline int musb_platform_init(struct musb *musb)
  453. {
  454. if (!musb->ops->init)
  455. return -EINVAL;
  456. return musb->ops->init(musb);
  457. }
  458. static inline int musb_platform_exit(struct musb *musb)
  459. {
  460. if (!musb->ops->exit)
  461. return -EINVAL;
  462. return musb->ops->exit(musb);
  463. }
  464. #ifdef __UBOOT__
  465. struct musb *
  466. musb_init_controller(struct musb_hdrc_platform_data *plat, struct device *dev,
  467. void *ctrl);
  468. #endif
  469. #endif /* __MUSB_CORE_H__ */