i2c.c 7.8 KB

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  1. /*
  2. * (C) Copyright 2004, Freescale, Inc
  3. * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. DECLARE_GLOBAL_DATA_PTR;
  25. #ifdef CONFIG_HARD_I2C
  26. #include <mpc8220.h>
  27. #include <i2c.h>
  28. typedef struct mpc8220_i2c {
  29. volatile u32 adr; /* I2Cn + 0x00 */
  30. volatile u32 fdr; /* I2Cn + 0x04 */
  31. volatile u32 cr; /* I2Cn + 0x08 */
  32. volatile u32 sr; /* I2Cn + 0x0C */
  33. volatile u32 dr; /* I2Cn + 0x10 */
  34. } i2c_t;
  35. /* I2Cn control register bits */
  36. #define I2C_EN 0x80
  37. #define I2C_IEN 0x40
  38. #define I2C_STA 0x20
  39. #define I2C_TX 0x10
  40. #define I2C_TXAK 0x08
  41. #define I2C_RSTA 0x04
  42. #define I2C_INIT_MASK (I2C_EN | I2C_STA | I2C_TX | I2C_RSTA)
  43. /* I2Cn status register bits */
  44. #define I2C_CF 0x80
  45. #define I2C_AAS 0x40
  46. #define I2C_BB 0x20
  47. #define I2C_AL 0x10
  48. #define I2C_SRW 0x04
  49. #define I2C_IF 0x02
  50. #define I2C_RXAK 0x01
  51. #define I2C_TIMEOUT 100
  52. #define I2C_RETRIES 1
  53. struct mpc8220_i2c_tap {
  54. int scl2tap;
  55. int tap2tap;
  56. };
  57. static int mpc_reg_in (volatile u32 * reg);
  58. static void mpc_reg_out (volatile u32 * reg, int val, int mask);
  59. static int wait_for_bb (void);
  60. static int wait_for_pin (int *status);
  61. static int do_address (uchar chip, char rdwr_flag);
  62. static int send_bytes (uchar chip, char *buf, int len);
  63. static int receive_bytes (uchar chip, char *buf, int len);
  64. static int mpc_get_fdr (int);
  65. static int mpc_reg_in (volatile u32 * reg)
  66. {
  67. int ret;
  68. ret = *reg >> 24;
  69. __asm__ __volatile__ ("eieio");
  70. return ret;
  71. }
  72. static void mpc_reg_out (volatile u32 * reg, int val, int mask)
  73. {
  74. int tmp;
  75. if (!mask) {
  76. *reg = val << 24;
  77. } else {
  78. tmp = mpc_reg_in (reg);
  79. *reg = ((tmp & ~mask) | (val & mask)) << 24;
  80. }
  81. __asm__ __volatile__ ("eieio");
  82. return;
  83. }
  84. static int wait_for_bb (void)
  85. {
  86. i2c_t *regs = (i2c_t *) MMAP_I2C;
  87. int timeout = I2C_TIMEOUT;
  88. int status;
  89. status = mpc_reg_in (&regs->sr);
  90. while (timeout-- && (status & I2C_BB)) {
  91. #if 1
  92. volatile int temp;
  93. mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
  94. temp = mpc_reg_in (&regs->dr);
  95. mpc_reg_out (&regs->cr, 0, I2C_STA);
  96. mpc_reg_out (&regs->cr, 0, 0);
  97. mpc_reg_out (&regs->cr, I2C_EN, 0);
  98. #endif
  99. udelay (1000);
  100. status = mpc_reg_in (&regs->sr);
  101. }
  102. return (status & I2C_BB);
  103. }
  104. static int wait_for_pin (int *status)
  105. {
  106. i2c_t *regs = (i2c_t *) MMAP_I2C;
  107. int timeout = I2C_TIMEOUT;
  108. *status = mpc_reg_in (&regs->sr);
  109. while (timeout-- && !(*status & I2C_IF)) {
  110. udelay (1000);
  111. *status = mpc_reg_in (&regs->sr);
  112. }
  113. if (!(*status & I2C_IF)) {
  114. return -1;
  115. }
  116. mpc_reg_out (&regs->sr, 0, I2C_IF);
  117. return 0;
  118. }
  119. static int do_address (uchar chip, char rdwr_flag)
  120. {
  121. i2c_t *regs = (i2c_t *) MMAP_I2C;
  122. int status;
  123. chip <<= 1;
  124. if (rdwr_flag)
  125. chip |= 1;
  126. mpc_reg_out (&regs->cr, I2C_TX, I2C_TX);
  127. mpc_reg_out (&regs->dr, chip, 0);
  128. if (wait_for_pin (&status))
  129. return -2;
  130. if (status & I2C_RXAK)
  131. return -3;
  132. return 0;
  133. }
  134. static int send_bytes (uchar chip, char *buf, int len)
  135. {
  136. i2c_t *regs = (i2c_t *) MMAP_I2C;
  137. int wrcount;
  138. int status;
  139. for (wrcount = 0; wrcount < len; ++wrcount) {
  140. mpc_reg_out (&regs->dr, buf[wrcount], 0);
  141. if (wait_for_pin (&status))
  142. break;
  143. if (status & I2C_RXAK)
  144. break;
  145. }
  146. return !(wrcount == len);
  147. return 0;
  148. }
  149. static int receive_bytes (uchar chip, char *buf, int len)
  150. {
  151. i2c_t *regs = (i2c_t *) MMAP_I2C;
  152. int dummy = 1;
  153. int rdcount = 0;
  154. int status;
  155. int i;
  156. mpc_reg_out (&regs->cr, 0, I2C_TX);
  157. for (i = 0; i < len; ++i) {
  158. buf[rdcount] = mpc_reg_in (&regs->dr);
  159. if (dummy)
  160. dummy = 0;
  161. else
  162. rdcount++;
  163. if (wait_for_pin (&status))
  164. return -4;
  165. }
  166. mpc_reg_out (&regs->cr, I2C_TXAK, I2C_TXAK);
  167. buf[rdcount++] = mpc_reg_in (&regs->dr);
  168. if (wait_for_pin (&status))
  169. return -5;
  170. mpc_reg_out (&regs->cr, 0, I2C_TXAK);
  171. return 0;
  172. }
  173. /**************** I2C API ****************/
  174. void i2c_init (int speed, int saddr)
  175. {
  176. i2c_t *regs = (i2c_t *) MMAP_I2C;
  177. mpc_reg_out (&regs->cr, 0, 0);
  178. mpc_reg_out (&regs->adr, saddr << 1, 0);
  179. /* Set clock
  180. */
  181. mpc_reg_out (&regs->fdr, mpc_get_fdr (speed), 0);
  182. /* Enable module
  183. */
  184. mpc_reg_out (&regs->cr, I2C_EN, I2C_INIT_MASK);
  185. mpc_reg_out (&regs->sr, 0, I2C_IF);
  186. return;
  187. }
  188. static int mpc_get_fdr (int speed)
  189. {
  190. static int fdr = -1;
  191. if (fdr == -1) {
  192. ulong best_speed = 0;
  193. ulong divider;
  194. ulong ipb, scl;
  195. ulong bestmatch = 0xffffffffUL;
  196. int best_i = 0, best_j = 0, i, j;
  197. int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8 };
  198. struct mpc8220_i2c_tap scltap[] = {
  199. {4, 1},
  200. {4, 2},
  201. {6, 4},
  202. {6, 8},
  203. {14, 16},
  204. {30, 32},
  205. {62, 64},
  206. {126, 128}
  207. };
  208. ipb = gd->bus_clk;
  209. for (i = 7; i >= 0; i--) {
  210. for (j = 7; j >= 0; j--) {
  211. scl = 2 * (scltap[j].scl2tap +
  212. (SCL_Tap[i] -
  213. 1) * scltap[j].tap2tap + 2);
  214. if (ipb <= speed * scl) {
  215. if ((speed * scl - ipb) < bestmatch) {
  216. bestmatch = speed * scl - ipb;
  217. best_i = i;
  218. best_j = j;
  219. best_speed = ipb / scl;
  220. }
  221. }
  222. }
  223. }
  224. divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
  225. if (gd->flags & GD_FLG_RELOC) {
  226. fdr = divider;
  227. } else {
  228. printf ("%ld kHz, ", best_speed / 1000);
  229. return divider;
  230. }
  231. }
  232. return fdr;
  233. }
  234. int i2c_probe (uchar chip)
  235. {
  236. i2c_t *regs = (i2c_t *) MMAP_I2C;
  237. int i;
  238. for (i = 0; i < I2C_RETRIES; i++) {
  239. mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
  240. if (!do_address (chip, 0)) {
  241. mpc_reg_out (&regs->cr, 0, I2C_STA);
  242. break;
  243. }
  244. mpc_reg_out (&regs->cr, 0, I2C_STA);
  245. udelay (50);
  246. }
  247. return (i == I2C_RETRIES);
  248. }
  249. int i2c_read (uchar chip, uint addr, int alen, uchar * buf, int len)
  250. {
  251. uchar xaddr[4];
  252. i2c_t *regs = (i2c_t *) MMAP_I2C;
  253. int ret = -1;
  254. xaddr[0] = (addr >> 24) & 0xFF;
  255. xaddr[1] = (addr >> 16) & 0xFF;
  256. xaddr[2] = (addr >> 8) & 0xFF;
  257. xaddr[3] = addr & 0xFF;
  258. if (wait_for_bb ()) {
  259. printf ("i2c_read: bus is busy\n");
  260. goto Done;
  261. }
  262. mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
  263. if (do_address (chip, 0)) {
  264. printf ("i2c_read: failed to address chip\n");
  265. goto Done;
  266. }
  267. if (send_bytes (chip, (char *)&xaddr[4 - alen], alen)) {
  268. printf ("i2c_read: send_bytes failed\n");
  269. goto Done;
  270. }
  271. mpc_reg_out (&regs->cr, I2C_RSTA, I2C_RSTA);
  272. if (do_address (chip, 1)) {
  273. printf ("i2c_read: failed to address chip\n");
  274. goto Done;
  275. }
  276. if (receive_bytes (chip, (char *)buf, len)) {
  277. printf ("i2c_read: receive_bytes failed\n");
  278. goto Done;
  279. }
  280. ret = 0;
  281. Done:
  282. mpc_reg_out (&regs->cr, 0, I2C_STA);
  283. return ret;
  284. }
  285. int i2c_write (uchar chip, uint addr, int alen, uchar * buf, int len)
  286. {
  287. uchar xaddr[4];
  288. i2c_t *regs = (i2c_t *) MMAP_I2C;
  289. int ret = -1;
  290. xaddr[0] = (addr >> 24) & 0xFF;
  291. xaddr[1] = (addr >> 16) & 0xFF;
  292. xaddr[2] = (addr >> 8) & 0xFF;
  293. xaddr[3] = addr & 0xFF;
  294. if (wait_for_bb ()) {
  295. printf ("i2c_write: bus is busy\n");
  296. goto Done;
  297. }
  298. mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
  299. if (do_address (chip, 0)) {
  300. printf ("i2c_write: failed to address chip\n");
  301. goto Done;
  302. }
  303. if (send_bytes (chip, (char *)&xaddr[4 - alen], alen)) {
  304. printf ("i2c_write: send_bytes failed\n");
  305. goto Done;
  306. }
  307. if (send_bytes (chip, (char *)buf, len)) {
  308. printf ("i2c_write: send_bytes failed\n");
  309. goto Done;
  310. }
  311. ret = 0;
  312. Done:
  313. mpc_reg_out (&regs->cr, 0, I2C_STA);
  314. return ret;
  315. }
  316. #endif /* CONFIG_HARD_I2C */