fec_dma_tasks.S 15 KB

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  1. /*
  2. * Copyright (C) 2004, Freescale Semiconductor, Inc.
  3. *
  4. * This file contains microcode for the FEC controller of the MPC8220.
  5. */
  6. #include <config.h>
  7. #if defined(CONFIG_MPC8220)
  8. /* sas/sccg, gas target */
  9. .section smartdmaInitData,"aw",@progbits /* Initialized data for task variables */
  10. .section smartdmaTaskTable,"aw",@progbits /* Task tables */
  11. .align 9
  12. .globl taskTable
  13. taskTable:
  14. .globl scEthernetRecv_Entry
  15. scEthernetRecv_Entry: /* Task 0 */
  16. .long scEthernetRecv_TDT - taskTable /* Task 0 Descriptor Table */
  17. .long scEthernetRecv_TDT - taskTable + 0x00000094
  18. .long scEthernetRecv_VarTab - taskTable /* Task 0 Variable Table */
  19. .long scEthernetRecv_FDT - taskTable + 0x03 /* Task 0 Function Descriptor Table & Flags */
  20. .long 0x00000000
  21. .long 0x00000000
  22. .long scEthernetRecv_CSave - taskTable /* Task 0 context save space */
  23. .long 0xf0000000
  24. .globl scEthernetXmit_Entry
  25. scEthernetXmit_Entry: /* Task 1 */
  26. .long scEthernetXmit_TDT - taskTable /* Task 1 Descriptor Table */
  27. .long scEthernetXmit_TDT - taskTable + 0x000000e0
  28. .long scEthernetXmit_VarTab - taskTable /* Task 1 Variable Table */
  29. .long scEthernetXmit_FDT - taskTable + 0x03 /* Task 1 Function Descriptor Table & Flags */
  30. .long 0x00000000
  31. .long 0x00000000
  32. .long scEthernetXmit_CSave - taskTable /* Task 1 context save space */
  33. .long 0xf0000000
  34. .globl scEthernetRecv_TDT
  35. scEthernetRecv_TDT: /* Task 0 Descriptor Table */
  36. .long 0xc4c50000 /* 0000(153): LCDEXT: idx0 = var9 + var10; idx0 once var0; idx0 += inc0 */
  37. .long 0x84c5e000 /* 0004(153): LCD: idx1 = var9 + var11; ; idx1 += inc0 */
  38. .long 0x10001f08 /* 0008(156): DRD1A: var7 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
  39. .long 0x10000380 /* 000C(157): DRD1A: var0 = *idx0; FN=0 MORE init=0 WS=0 RS=0 */
  40. .long 0x00000f88 /* 0010(158): DRD1A: var3 = *idx1; FN=0 init=0 WS=0 RS=0 */
  41. .long 0x81980000 /* 0014(162): LCD: idx0 = var3; idx0 once var0; idx0 += inc0 */
  42. .long 0x10000780 /* 0018(164): DRD1A: var1 = *idx0; FN=0 MORE init=0 WS=0 RS=0 */
  43. .long 0x60000000 /* 001C(165): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
  44. .long 0x010cf04c /* 0020(165): DRD2B1: var4 = EU3(); EU3(var1,var12) */
  45. .long 0x82180349 /* 0024(169): LCD: idx0 = var4; idx0 != var13; idx0 += inc1 */
  46. .long 0x81c68004 /* 0028(172): LCD: idx1 = var3 + var13 + 4; idx1 once var0; idx1 += inc0 */
  47. .long 0x70000000 /* 002C(174): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
  48. .long 0x018cf04e /* 0030(174): DRD2B1: var6 = EU3(); EU3(var1,var14) */
  49. .long 0x70000000 /* 0034(175): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
  50. .long 0x020cf04f /* 0038(175): DRD2B1: var8 = EU3(); EU3(var1,var15) */
  51. .long 0x00000b88 /* 003C(176): DRD1A: var2 = *idx1; FN=0 init=0 WS=0 RS=0 */
  52. .long 0x80025184 /* 0040(205): LCDEXT: idx1 = 0xf0009184; ; */
  53. .long 0x86810412 /* 0044(205): LCD: idx2 = var13, idx3 = var2; idx2 < var16; idx2 += inc2, idx3 += inc2 */
  54. .long 0x0200cf88 /* 0048(209): DRD1A: *idx3 = *idx1; FN=0 init=16 WS=0 RS=0 */
  55. .long 0x80025184 /* 004C(217): LCDEXT: idx1 = 0xf0009184; ; */
  56. .long 0x8681845b /* 0050(217): LCD: idx2 = var13, idx3 = var3; idx2 < var17; idx2 += inc3, idx3 += inc3 */
  57. .long 0x0000cf88 /* 0054(221): DRD1A: *idx3 = *idx1; FN=0 init=0 WS=0 RS=0 */
  58. .long 0xc31883a4 /* 0058(225): LCDEXT: idx1 = var6; idx1 == var14; idx1 += inc4 */
  59. .long 0x80190000 /* 005C(225): LCD: idx2 = var0; idx2 once var0; idx2 += inc0 */
  60. .long 0x04008468 /* 0060(227): DRD1A: idx1 = var13; FN=0 INT init=0 WS=0 RS=0 */
  61. .long 0xc4038360 /* 0064(232): LCDEXT: idx1 = var8, idx2 = var7; idx1 == var13; idx1 += inc4, idx2 += inc0 */
  62. .long 0x81c50000 /* 0068(233): LCD: idx3 = var3 + var10; idx3 once var0; idx3 += inc0 */
  63. .long 0x1000cb18 /* 006C(235): DRD1A: *idx2 = idx3; FN=0 MORE init=0 WS=0 RS=0 */
  64. .long 0x00000f18 /* 0070(236): DRD1A: var3 = idx3; FN=0 init=0 WS=0 RS=0 */
  65. .long 0xc418836d /* 0074(238): LCDEXT: idx1 = var8; idx1 > var13; idx1 += inc5 */
  66. .long 0x83990000 /* 0078(238): LCD: idx2 = var7; idx2 once var0; idx2 += inc0 */
  67. .long 0x10000c00 /* 007C(240): DRD1A: var3 = var0; FN=0 MORE init=0 WS=0 RS=0 */
  68. .long 0x0000c800 /* 0080(241): DRD1A: *idx2 = var0; FN=0 init=0 WS=0 RS=0 */
  69. .long 0x81988000 /* 0084(245): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
  70. .long 0x10000788 /* 0088(247): DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */
  71. .long 0x60000000 /* 008C(248): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
  72. .long 0x080cf04c /* 0090(248): DRD2B1: idx0 = EU3(); EU3(var1,var12) */
  73. .long 0x000001f8 /* 0094(:0): NOP */
  74. .globl scEthernetXmit_TDT
  75. scEthernetXmit_TDT: /* Task 1 Descriptor Table */
  76. .long 0x80095b00 /* 0000(280): LCDEXT: idx0 = 0xf0025b00; ; */
  77. .long 0x85c60004 /* 0004(280): LCD: idx1 = var11 + var12 + 4; idx1 once var0; idx1 += inc0 */
  78. .long 0x10002308 /* 0008(283): DRD1A: var8 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
  79. .long 0x10000f88 /* 000C(284): DRD1A: var3 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */
  80. .long 0x00000380 /* 0010(285): DRD1A: var0 = *idx0; FN=0 init=0 WS=0 RS=0 */
  81. .long 0x81980000 /* 0014(288): LCD: idx0 = var3; idx0 once var0; idx0 += inc0 */
  82. .long 0x10000780 /* 0018(290): DRD1A: var1 = *idx0; FN=0 MORE init=0 WS=0 RS=0 */
  83. .long 0x60000000 /* 001C(291): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
  84. .long 0x024cf04d /* 0020(291): DRD2B1: var9 = EU3(); EU3(var1,var13) */
  85. .long 0x84980309 /* 0024(294): LCD: idx0 = var9; idx0 != var12; idx0 += inc1 */
  86. .long 0xc0004003 /* 0028(297): LCDEXT: idx1 = 0x00000003; ; */
  87. .long 0x81c60004 /* 002C(297): LCD: idx2 = var3 + var12 + 4; idx2 once var0; idx2 += inc0 */
  88. .long 0x70000000 /* 0030(299): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
  89. .long 0x010cf04e /* 0034(299): DRD2B1: var4 = EU3(); EU3(var1,var14) */
  90. .long 0x70000000 /* 0038(300): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
  91. .long 0x014cf04f /* 003C(300): DRD2B1: var5 = EU3(); EU3(var1,var15) */
  92. .long 0x70000000 /* 0040(301): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
  93. .long 0x028cf050 /* 0044(301): DRD2B1: var10 = EU3(); EU3(var1,var16) */
  94. .long 0x70000000 /* 0048(302): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
  95. .long 0x018cf051 /* 004C(302): DRD2B1: var6 = EU3(); EU3(var1,var17) */
  96. .long 0x10000b90 /* 0050(303): DRD1A: var2 = *idx2; FN=0 MORE init=0 WS=0 RS=0 */
  97. .long 0x60000000 /* 0054(304): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
  98. .long 0x01ccf0a1 /* 0058(304): DRD2B1: var7 = EU3(); EU3(var2,idx1) */
  99. .long 0xc2988312 /* 005C(308): LCDEXT: idx1 = var5; idx1 > var12; idx1 += inc2 */
  100. .long 0x83490000 /* 0060(308): LCD: idx2 = var6 + var18; idx2 once var0; idx2 += inc0 */
  101. .long 0x00001b10 /* 0064(310): DRD1A: var6 = idx2; FN=0 init=0 WS=0 RS=0 */
  102. .long 0x800251a4 /* 0068(315): LCDEXT: idx1 = 0xf00091a4; ; */
  103. .long 0xc30104dc /* 006C(315): LCDEXT: idx2 = var6, idx3 = var2; idx2 >= var19; idx2 += inc3, idx3 += inc4 */
  104. .long 0x839a032d /* 0070(316): LCD: idx4 = var7; idx4 == var12; idx4 += inc5 */
  105. .long 0x0220c798 /* 0074(321): DRD1A: *idx1 = *idx3; FN=0 init=17 WS=0 RS=0 */
  106. .long 0x800251a4 /* 0078(329): LCDEXT: idx1 = 0xf00091a4; ; */
  107. .long 0x99198337 /* 007C(329): LCD: idx2 = idx2, idx3 = idx3; idx2 > var12; idx2 += inc6, idx3 += inc7 */
  108. .long 0x022ac798 /* 0080(333): DRD1A: *idx1 = *idx3; FN=0 init=17 WS=1 RS=1 */
  109. .long 0x800251a4 /* 0084(350): LCDEXT: idx1 = 0xf00091a4; ; */
  110. .long 0xc1430000 /* 0088(350): LCDEXT: idx2 = var2 + var6; idx2 once var0; idx2 += inc0 */
  111. .long 0x82998312 /* 008C(351): LCD: idx3 = var5; idx3 > var12; idx3 += inc2 */
  112. .long 0x0a2ac790 /* 0090(354): DRD1A: *idx1 = *idx2; FN=0 TFD init=17 WS=1 RS=1 */
  113. .long 0x81988000 /* 0094(359): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
  114. .long 0x60000002 /* 0098(361): DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=0 RS=0 */
  115. .long 0x0c4cfc4d /* 009C(361): DRD2B1: *idx1 = EU3(); EU3(*idx1,var13) */
  116. .long 0xc21883ad /* 00A0(365): LCDEXT: idx1 = var4; idx1 == var14; idx1 += inc5 */
  117. .long 0x80190000 /* 00A4(365): LCD: idx2 = var0; idx2 once var0; idx2 += inc0 */
  118. .long 0x04008460 /* 00A8(367): DRD1A: idx1 = var12; FN=0 INT init=0 WS=0 RS=0 */
  119. .long 0xc4052305 /* 00AC(371): LCDEXT: idx1 = var8, idx2 = var10; idx2 == var12; idx1 += inc0, idx2 += inc5 */
  120. .long 0x81ca0000 /* 00B0(372): LCD: idx3 = var3 + var20; idx3 once var0; idx3 += inc0 */
  121. .long 0x1000c718 /* 00B4(374): DRD1A: *idx1 = idx3; FN=0 MORE init=0 WS=0 RS=0 */
  122. .long 0x00000f18 /* 00B8(375): DRD1A: var3 = idx3; FN=0 init=0 WS=0 RS=0 */
  123. .long 0xc4188000 /* 00BC(378): LCDEXT: idx1 = var8; idx1 once var0; idx1 += inc0 */
  124. .long 0x85190312 /* 00C0(378): LCD: idx2 = var10; idx2 > var12; idx2 += inc2 */
  125. .long 0x10000c00 /* 00C4(380): DRD1A: var3 = var0; FN=0 MORE init=0 WS=0 RS=0 */
  126. .long 0x1000c400 /* 00C8(381): DRD1A: *idx1 = var0; FN=0 MORE init=0 WS=0 RS=0 */
  127. .long 0x00008860 /* 00CC(382): DRD1A: idx2 = var12; FN=0 init=0 WS=0 RS=0 */
  128. .long 0x81988000 /* 00D0(386): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
  129. .long 0x10000788 /* 00D4(388): DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */
  130. .long 0x60000000 /* 00D8(389): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
  131. .long 0x080cf04d /* 00DC(389): DRD2B1: idx0 = EU3(); EU3(var1,var13) */
  132. .long 0x000001f8 /* 00E0(:0): NOP */
  133. .align 8
  134. .globl scEthernetRecv_VarTab
  135. scEthernetRecv_VarTab: /* Task 0 Variable Table */
  136. .long 0x00000000 /* var[0] */
  137. .long 0x00000000 /* var[1] */
  138. .long 0x00000000 /* var[2] */
  139. .long 0x00000000 /* var[3] */
  140. .long 0x00000000 /* var[4] */
  141. .long 0x00000000 /* var[5] */
  142. .long 0x00000000 /* var[6] */
  143. .long 0x00000000 /* var[7] */
  144. .long 0x00000000 /* var[8] */
  145. .long 0xf0025b00 /* var[9] */
  146. .long 0x00000008 /* var[10] */
  147. .long 0x0000000c /* var[11] */
  148. .long 0x80000000 /* var[12] */
  149. .long 0x00000000 /* var[13] */
  150. .long 0x10000000 /* var[14] */
  151. .long 0x20000000 /* var[15] */
  152. .long 0x00000800 /* var[16] */
  153. .long 0x00000001 /* var[17] */
  154. .long 0x00000000 /* var[18] */
  155. .long 0x00000000 /* var[19] */
  156. .long 0x00000000 /* var[20] */
  157. .long 0x00000000 /* var[21] */
  158. .long 0x00000000 /* var[22] */
  159. .long 0x00000000 /* var[23] */
  160. .long 0x00000000 /* inc[0] */
  161. .long 0x60000000 /* inc[1] */
  162. .long 0x20000004 /* inc[2] */
  163. .long 0x20000001 /* inc[3] */
  164. .long 0x80000000 /* inc[4] */
  165. .long 0x40000000 /* inc[5] */
  166. .long 0x00000000 /* inc[6] */
  167. .long 0x00000000 /* inc[7] */
  168. .align 8
  169. .globl scEthernetXmit_VarTab
  170. scEthernetXmit_VarTab: /* Task 1 Variable Table */
  171. .long 0x00000000 /* var[0] */
  172. .long 0x00000000 /* var[1] */
  173. .long 0x00000000 /* var[2] */
  174. .long 0x00000000 /* var[3] */
  175. .long 0x00000000 /* var[4] */
  176. .long 0x00000000 /* var[5] */
  177. .long 0x00000000 /* var[6] */
  178. .long 0x00000000 /* var[7] */
  179. .long 0x00000000 /* var[8] */
  180. .long 0x00000000 /* var[9] */
  181. .long 0x00000000 /* var[10] */
  182. .long 0xf0025b00 /* var[11] */
  183. .long 0x00000000 /* var[12] */
  184. .long 0x80000000 /* var[13] */
  185. .long 0x10000000 /* var[14] */
  186. .long 0x08000000 /* var[15] */
  187. .long 0x20000000 /* var[16] */
  188. .long 0x0000ffff /* var[17] */
  189. .long 0xffffffff /* var[18] */
  190. .long 0x00000004 /* var[19] */
  191. .long 0x00000008 /* var[20] */
  192. .long 0x00000000 /* var[21] */
  193. .long 0x00000000 /* var[22] */
  194. .long 0x00000000 /* var[23] */
  195. .long 0x00000000 /* inc[0] */
  196. .long 0x60000000 /* inc[1] */
  197. .long 0x40000000 /* inc[2] */
  198. .long 0xc000fffc /* inc[3] */
  199. .long 0xe0000004 /* inc[4] */
  200. .long 0x80000000 /* inc[5] */
  201. .long 0x4000ffff /* inc[6] */
  202. .long 0xe0000001 /* inc[7] */
  203. .align 8
  204. .globl scEthernetRecv_FDT
  205. scEthernetRecv_FDT: /* Task 0 Function Descriptor Table */
  206. .long 0x00000000
  207. .long 0x00000000
  208. .long 0x00000000
  209. .long 0x00000000
  210. .long 0x00000000
  211. .long 0x00000000
  212. .long 0x00000000
  213. .long 0x00000000
  214. .long 0x00000000
  215. .long 0x00000000
  216. .long 0x00000000
  217. .long 0x00000000
  218. .long 0x00000000
  219. .long 0x00000000
  220. .long 0x00000000
  221. .long 0x00000000
  222. .long 0x00000000
  223. .long 0x00000000
  224. .long 0x00000000
  225. .long 0x00000000
  226. .long 0x00000000
  227. .long 0x00000000
  228. .long 0x00000000
  229. .long 0x00000000
  230. .long 0x00000000
  231. .long 0x00000000
  232. .long 0x00000000
  233. .long 0x00000000
  234. .long 0x00000000
  235. .long 0x00000000
  236. .long 0x00000000
  237. .long 0x00000000
  238. .long 0x00000000
  239. .long 0x00000000
  240. .long 0x00000000
  241. .long 0x00000000
  242. .long 0x00000000
  243. .long 0x00000000
  244. .long 0x00000000
  245. .long 0x00000000
  246. .long 0x00000000
  247. .long 0x00000000
  248. .long 0x00000000
  249. .long 0x00000000
  250. .long 0x00000000
  251. .long 0x00000000
  252. .long 0x00000000
  253. .long 0x00000000
  254. .long 0x21800000 /* and(), EU# 3 */
  255. .long 0x21e00000 /* or(), EU# 3 */
  256. .long 0x21400000 /* andn(), EU# 3 */
  257. .long 0x00000000
  258. .long 0x00000000
  259. .long 0x00000000
  260. .long 0x00000000
  261. .long 0x00000000
  262. .long 0x00000000
  263. .long 0x00000000
  264. .long 0x00000000
  265. .long 0x00000000
  266. .long 0x00000000
  267. .long 0x00000000
  268. .long 0x00000000
  269. .long 0x00000000
  270. .align 8
  271. .globl scEthernetXmit_FDT
  272. scEthernetXmit_FDT: /* Task 1 Function Descriptor Table */
  273. .long 0x00000000
  274. .long 0x00000000
  275. .long 0x00000000
  276. .long 0x00000000
  277. .long 0x00000000
  278. .long 0x00000000
  279. .long 0x00000000
  280. .long 0x00000000
  281. .long 0x00000000
  282. .long 0x00000000
  283. .long 0x00000000
  284. .long 0x00000000
  285. .long 0x00000000
  286. .long 0x00000000
  287. .long 0x00000000
  288. .long 0x00000000
  289. .long 0x00000000
  290. .long 0x00000000
  291. .long 0x00000000
  292. .long 0x00000000
  293. .long 0x00000000
  294. .long 0x00000000
  295. .long 0x00000000
  296. .long 0x00000000
  297. .long 0x00000000
  298. .long 0x00000000
  299. .long 0x00000000
  300. .long 0x00000000
  301. .long 0x00000000
  302. .long 0x00000000
  303. .long 0x00000000
  304. .long 0x00000000
  305. .long 0x00000000
  306. .long 0x00000000
  307. .long 0x00000000
  308. .long 0x00000000
  309. .long 0x00000000
  310. .long 0x00000000
  311. .long 0x00000000
  312. .long 0x00000000
  313. .long 0x00000000
  314. .long 0x00000000
  315. .long 0x00000000
  316. .long 0x00000000
  317. .long 0x00000000
  318. .long 0x00000000
  319. .long 0x00000000
  320. .long 0x00000000
  321. .long 0x21800000 /* and(), EU# 3 */
  322. .long 0x21e00000 /* or(), EU# 3 */
  323. .long 0x21400000 /* andn(), EU# 3 */
  324. .long 0x00000000
  325. .long 0x00000000
  326. .long 0x00000000
  327. .long 0x00000000
  328. .long 0x00000000
  329. .long 0x00000000
  330. .long 0x00000000
  331. .long 0x00000000
  332. .long 0x00000000
  333. .long 0x00000000
  334. .long 0x00000000
  335. .long 0x00000000
  336. .long 0x00000000
  337. .globl scEthernetRecv_CSave
  338. scEthernetRecv_CSave: /* Task 0 context save space */
  339. .space 128, 0x0
  340. .globl scEthernetXmit_CSave
  341. scEthernetXmit_CSave: /* Task 1 context save space */
  342. .space 128, 0x0
  343. #endif