i2c.c 8.2 KB

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  1. /*
  2. * (C) Copyright 2003 - 2009
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * Based on the MPC5xxx code.
  24. */
  25. #include <common.h>
  26. #include <asm/io.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. #ifdef CONFIG_HARD_I2C
  29. #include <i2c.h>
  30. /* by default set I2C bus 0 active */
  31. static unsigned int bus_num __attribute__ ((section (".data"))) = 0;
  32. #define I2C_TIMEOUT 100
  33. #define I2C_RETRIES 3
  34. struct mpc512x_i2c_tap {
  35. int scl2tap;
  36. int tap2tap;
  37. };
  38. static int mpc_reg_in(volatile u32 *reg);
  39. static void mpc_reg_out(volatile u32 *reg, int val, int mask);
  40. static int wait_for_bb(void);
  41. static int wait_for_pin(int *status);
  42. static int do_address(uchar chip, char rdwr_flag);
  43. static int send_bytes(uchar chip, char *buf, int len);
  44. static int receive_bytes(uchar chip, char *buf, int len);
  45. static int mpc_get_fdr(int);
  46. static int mpc_reg_in (volatile u32 *reg)
  47. {
  48. int ret = in_be32(reg) >> 24;
  49. return ret;
  50. }
  51. static void mpc_reg_out (volatile u32 *reg, int val, int mask)
  52. {
  53. if (!mask) {
  54. out_be32(reg, val << 24);
  55. } else {
  56. clrsetbits_be32(reg, mask << 24, (val & mask) << 24);
  57. }
  58. }
  59. static int wait_for_bb (void)
  60. {
  61. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  62. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  63. int timeout = I2C_TIMEOUT;
  64. int status;
  65. status = mpc_reg_in (&regs->msr);
  66. while (timeout-- && (status & I2C_BB)) {
  67. volatile int temp;
  68. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  69. temp = mpc_reg_in (&regs->mdr);
  70. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  71. mpc_reg_out (&regs->mcr, 0, 0);
  72. mpc_reg_out (&regs->mcr, I2C_EN, 0);
  73. udelay (1000);
  74. status = mpc_reg_in (&regs->msr);
  75. }
  76. return (status & I2C_BB);
  77. }
  78. static int wait_for_pin (int *status)
  79. {
  80. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  81. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  82. int timeout = I2C_TIMEOUT;
  83. *status = mpc_reg_in (&regs->msr);
  84. while (timeout-- && !(*status & I2C_IF)) {
  85. udelay (1000);
  86. *status = mpc_reg_in (&regs->msr);
  87. }
  88. if (!(*status & I2C_IF)) {
  89. return -1;
  90. }
  91. mpc_reg_out (&regs->msr, 0, I2C_IF);
  92. return 0;
  93. }
  94. static int do_address (uchar chip, char rdwr_flag)
  95. {
  96. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  97. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  98. int status;
  99. chip <<= 1;
  100. if (rdwr_flag) {
  101. chip |= 1;
  102. }
  103. mpc_reg_out (&regs->mcr, I2C_TX, I2C_TX);
  104. mpc_reg_out (&regs->mdr, chip, 0);
  105. if (wait_for_pin (&status)) {
  106. return -2;
  107. }
  108. if (status & I2C_RXAK) {
  109. return -3;
  110. }
  111. return 0;
  112. }
  113. static int send_bytes (uchar chip, char *buf, int len)
  114. {
  115. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  116. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  117. int wrcount;
  118. int status;
  119. for (wrcount = 0; wrcount < len; ++wrcount) {
  120. mpc_reg_out (&regs->mdr, buf[wrcount], 0);
  121. if (wait_for_pin (&status)) {
  122. break;
  123. }
  124. if (status & I2C_RXAK) {
  125. break;
  126. }
  127. }
  128. return !(wrcount == len);
  129. }
  130. static int receive_bytes (uchar chip, char *buf, int len)
  131. {
  132. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  133. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  134. int dummy = 1;
  135. int rdcount = 0;
  136. int status;
  137. int i;
  138. mpc_reg_out (&regs->mcr, 0, I2C_TX);
  139. for (i = 0; i < len; ++i) {
  140. buf[rdcount] = mpc_reg_in (&regs->mdr);
  141. if (dummy) {
  142. dummy = 0;
  143. } else {
  144. rdcount++;
  145. }
  146. if (wait_for_pin (&status)) {
  147. return -4;
  148. }
  149. }
  150. mpc_reg_out (&regs->mcr, I2C_TXAK, I2C_TXAK);
  151. buf[rdcount++] = mpc_reg_in (&regs->mdr);
  152. if (wait_for_pin (&status)) {
  153. return -5;
  154. }
  155. mpc_reg_out (&regs->mcr, 0, I2C_TXAK);
  156. return 0;
  157. }
  158. /**************** I2C API ****************/
  159. void i2c_init (int speed, int saddr)
  160. {
  161. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  162. int i;
  163. for (i = 0; i < I2C_BUS_CNT; i++){
  164. volatile i2c512x_dev_t *regs = &im->i2c.dev[i];
  165. mpc_reg_out (&regs->mcr, 0, 0);
  166. /* Set clock */
  167. mpc_reg_out (&regs->mfdr, mpc_get_fdr (speed), 0);
  168. mpc_reg_out (&regs->madr, saddr << 1, 0);
  169. /* Enable module */
  170. mpc_reg_out (&regs->mcr, I2C_EN, I2C_INIT_MASK);
  171. mpc_reg_out (&regs->msr, 0, I2C_IF);
  172. }
  173. /* Disable interrupts */
  174. out_be32(&im->i2c.icr, 0);
  175. /* Turn off filters */
  176. out_be32(&im->i2c.mifr, 0);
  177. }
  178. static int mpc_get_fdr (int speed)
  179. {
  180. static int fdr = -1;
  181. if (fdr == -1) {
  182. ulong best_speed = 0;
  183. ulong divider;
  184. ulong ips, scl;
  185. ulong bestmatch = 0xffffffffUL;
  186. int best_i = 0, best_j = 0, i, j;
  187. int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
  188. struct mpc512x_i2c_tap scltap[] = {
  189. {4, 1},
  190. {4, 2},
  191. {6, 4},
  192. {6, 8},
  193. {14, 16},
  194. {30, 32},
  195. {62, 64},
  196. {126, 128}
  197. };
  198. ips = gd->ips_clk;
  199. for (i = 7; i >= 0; i--) {
  200. for (j = 7; j >= 0; j--) {
  201. scl = 2 * (scltap[j].scl2tap +
  202. (SCL_Tap[i] - 1) * scltap[j].tap2tap
  203. + 2);
  204. if (ips <= speed*scl) {
  205. if ((speed*scl - ips) < bestmatch) {
  206. bestmatch = speed*scl - ips;
  207. best_i = i;
  208. best_j = j;
  209. best_speed = ips/scl;
  210. }
  211. }
  212. }
  213. }
  214. divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
  215. if (gd->flags & GD_FLG_RELOC) {
  216. fdr = divider;
  217. } else {
  218. debug("%ld kHz, \n", best_speed / 1000);
  219. return divider;
  220. }
  221. }
  222. return fdr;
  223. }
  224. int i2c_probe (uchar chip)
  225. {
  226. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  227. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  228. int i;
  229. for (i = 0; i < I2C_RETRIES; i++) {
  230. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  231. if (! do_address (chip, 0)) {
  232. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  233. udelay (500);
  234. break;
  235. }
  236. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  237. udelay (500);
  238. }
  239. return (i == I2C_RETRIES);
  240. }
  241. int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)
  242. {
  243. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  244. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  245. char xaddr[4];
  246. int ret = -1;
  247. xaddr[0] = (addr >> 24) & 0xFF;
  248. xaddr[1] = (addr >> 16) & 0xFF;
  249. xaddr[2] = (addr >> 8) & 0xFF;
  250. xaddr[3] = addr & 0xFF;
  251. if (wait_for_bb ()) {
  252. printf ("i2c_read: bus is busy\n");
  253. goto Done;
  254. }
  255. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  256. if (do_address (chip, 0)) {
  257. printf ("i2c_read: failed to address chip\n");
  258. goto Done;
  259. }
  260. if (send_bytes (chip, &xaddr[4-alen], alen)) {
  261. printf ("i2c_read: send_bytes failed\n");
  262. goto Done;
  263. }
  264. mpc_reg_out (&regs->mcr, I2C_RSTA, I2C_RSTA);
  265. if (do_address (chip, 1)) {
  266. printf ("i2c_read: failed to address chip\n");
  267. goto Done;
  268. }
  269. if (receive_bytes (chip, (char *)buf, len)) {
  270. printf ("i2c_read: receive_bytes failed\n");
  271. goto Done;
  272. }
  273. ret = 0;
  274. Done:
  275. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  276. return ret;
  277. }
  278. int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)
  279. {
  280. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  281. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  282. char xaddr[4];
  283. int ret = -1;
  284. xaddr[0] = (addr >> 24) & 0xFF;
  285. xaddr[1] = (addr >> 16) & 0xFF;
  286. xaddr[2] = (addr >> 8) & 0xFF;
  287. xaddr[3] = addr & 0xFF;
  288. if (wait_for_bb ()) {
  289. printf ("i2c_write: bus is busy\n");
  290. goto Done;
  291. }
  292. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  293. if (do_address (chip, 0)) {
  294. printf ("i2c_write: failed to address chip\n");
  295. goto Done;
  296. }
  297. if (send_bytes (chip, &xaddr[4-alen], alen)) {
  298. printf ("i2c_write: send_bytes failed\n");
  299. goto Done;
  300. }
  301. if (send_bytes (chip, (char *)buf, len)) {
  302. printf ("i2c_write: send_bytes failed\n");
  303. goto Done;
  304. }
  305. ret = 0;
  306. Done:
  307. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  308. return ret;
  309. }
  310. int i2c_set_bus_num (unsigned int bus)
  311. {
  312. if (bus >= I2C_BUS_CNT) {
  313. return -1;
  314. }
  315. bus_num = bus;
  316. return 0;
  317. }
  318. unsigned int i2c_get_bus_num (void)
  319. {
  320. return bus_num;
  321. }
  322. #endif /* CONFIG_HARD_I2C */