stm32prog_serial.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <common.h>
  6. #include <console.h>
  7. #include <dm.h>
  8. #include <dfu.h>
  9. #include <malloc.h>
  10. #include <serial.h>
  11. #include <watchdog.h>
  12. #include <dm/lists.h>
  13. #include <dm/device-internal.h>
  14. #include <linux/delay.h>
  15. #include "stm32prog.h"
  16. /* - configuration part -----------------------------*/
  17. #define USART_BL_VERSION 0x40 /* USART bootloader version V4.0*/
  18. #define UBOOT_BL_VERSION 0x03 /* bootloader version V0.3*/
  19. #define DEVICE_ID_BYTE1 0x05 /* MSB byte of device ID*/
  20. #define DEVICE_ID_BYTE2 0x00 /* LSB byte of device ID*/
  21. #define USART_RAM_BUFFER_SIZE 256 /* Size of USART_RAM_Buf buffer*/
  22. /* - Commands -----------------------------*/
  23. #define GET_CMD_COMMAND 0x00 /* Get CMD command*/
  24. #define GET_VER_COMMAND 0x01 /* Get Version command*/
  25. #define GET_ID_COMMAND 0x02 /* Get ID command*/
  26. #define GET_PHASE_COMMAND 0x03 /* Get Phase command*/
  27. #define RM_COMMAND 0x11 /* Read Memory command*/
  28. #define READ_PART_COMMAND 0x12 /* Read Partition command*/
  29. #define START_COMMAND 0x21 /* START command (Go)*/
  30. #define DOWNLOAD_COMMAND 0x31 /* Download command*/
  31. /* existing command for other STM32 but not used */
  32. /* ERASE 0x43 */
  33. /* EXTENDED_ERASE 0x44 */
  34. /* WRITE_UNPROTECTED 0x73 */
  35. /* READOUT_PROTECT 0x82 */
  36. /* READOUT_UNPROTECT 0x92 */
  37. /* - miscellaneous defines ----------------------------------------*/
  38. #define INIT_BYTE 0x7F /*Init Byte ID*/
  39. #define ACK_BYTE 0x79 /*Acknowlede Byte ID*/
  40. #define NACK_BYTE 0x1F /*No Acknowlede Byte ID*/
  41. #define ABORT_BYTE 0x5F /*ABORT*/
  42. struct udevice *down_serial_dev;
  43. const u8 cmd_id[] = {
  44. GET_CMD_COMMAND,
  45. GET_VER_COMMAND,
  46. GET_ID_COMMAND,
  47. GET_PHASE_COMMAND,
  48. RM_COMMAND,
  49. READ_PART_COMMAND,
  50. START_COMMAND,
  51. DOWNLOAD_COMMAND
  52. };
  53. #define NB_CMD sizeof(cmd_id)
  54. /* DFU support for serial *********************************************/
  55. static struct dfu_entity *stm32prog_get_entity(struct stm32prog_data *data)
  56. {
  57. int alt_id;
  58. if (!data->cur_part)
  59. if (data->phase == PHASE_FLASHLAYOUT)
  60. alt_id = 0;
  61. else
  62. return NULL;
  63. else
  64. alt_id = data->cur_part->alt_id;
  65. return dfu_get_entity(alt_id);
  66. }
  67. static int stm32prog_write(struct stm32prog_data *data, u8 *buffer,
  68. u32 buffer_size)
  69. {
  70. struct dfu_entity *dfu_entity;
  71. u8 ret = 0;
  72. dfu_entity = stm32prog_get_entity(data);
  73. if (!dfu_entity)
  74. return -ENODEV;
  75. ret = dfu_write(dfu_entity,
  76. buffer,
  77. buffer_size,
  78. data->dfu_seq);
  79. if (ret) {
  80. stm32prog_err("DFU write failed [%d] cnt: %d",
  81. ret, data->dfu_seq);
  82. }
  83. data->dfu_seq++;
  84. /* handle rollover as in driver/dfu/dfu.c */
  85. data->dfu_seq &= 0xffff;
  86. if (buffer_size == 0)
  87. data->dfu_seq = 0; /* flush done */
  88. return ret;
  89. }
  90. static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
  91. u8 *buffer, u32 buffer_size)
  92. {
  93. struct dfu_entity *dfu_entity;
  94. struct stm32prog_part_t *part;
  95. u32 size;
  96. int ret, i;
  97. if (data->dfu_seq) {
  98. stm32prog_err("DFU write pending for phase %d, seq %d",
  99. data->phase, data->dfu_seq);
  100. return -EINVAL;
  101. }
  102. if (phase == PHASE_FLASHLAYOUT || phase > PHASE_LAST_USER) {
  103. stm32prog_err("read failed : phase %d is invalid", phase);
  104. return -EINVAL;
  105. }
  106. if (data->read_phase <= PHASE_LAST_USER &&
  107. phase != data->read_phase) {
  108. /* clear previous read session */
  109. dfu_entity = dfu_get_entity(data->read_phase - 1);
  110. if (dfu_entity)
  111. dfu_transaction_cleanup(dfu_entity);
  112. }
  113. dfu_entity = NULL;
  114. /* found partition for the expected phase */
  115. for (i = 0; i < data->part_nb; i++) {
  116. part = &data->part_array[i];
  117. if (part->id == phase)
  118. dfu_entity = dfu_get_entity(part->alt_id);
  119. }
  120. if (!dfu_entity) {
  121. stm32prog_err("read failed : phase %d is unknown", phase);
  122. return -ENODEV;
  123. }
  124. /* clear pending read before to force offset */
  125. if (dfu_entity->inited &&
  126. (data->read_phase != phase || data->offset != offset))
  127. dfu_transaction_cleanup(dfu_entity);
  128. /* initiate before to force offset */
  129. if (!dfu_entity->inited) {
  130. ret = dfu_transaction_initiate(dfu_entity, true);
  131. if (ret < 0) {
  132. stm32prog_err("DFU read init failed [%d] phase = %d offset = 0x%08x",
  133. ret, phase, offset);
  134. return ret;
  135. }
  136. }
  137. /* force new offset */
  138. if (dfu_entity->offset != offset)
  139. dfu_entity->offset = offset;
  140. data->offset = offset;
  141. data->read_phase = phase;
  142. pr_debug("\nSTM32 download read %s offset=0x%x\n",
  143. dfu_entity->name, offset);
  144. ret = dfu_read(dfu_entity, buffer, buffer_size,
  145. dfu_entity->i_blk_seq_num);
  146. if (ret < 0) {
  147. stm32prog_err("DFU read failed [%d] phase = %d offset = 0x%08x",
  148. ret, phase, offset);
  149. return ret;
  150. }
  151. size = ret;
  152. if (size < buffer_size) {
  153. data->offset = 0;
  154. data->read_phase = PHASE_END;
  155. memset(buffer + size, 0, buffer_size - size);
  156. } else {
  157. data->offset += size;
  158. }
  159. return ret;
  160. }
  161. /* UART access ***************************************************/
  162. int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
  163. {
  164. struct udevice *dev = NULL;
  165. int node;
  166. char alias[10];
  167. const char *path;
  168. struct dm_serial_ops *ops;
  169. /* no parity, 8 bits, 1 stop */
  170. u32 serial_config = SERIAL_DEFAULT_CONFIG;
  171. down_serial_dev = NULL;
  172. sprintf(alias, "serial%d", link_dev);
  173. path = fdt_get_alias(gd->fdt_blob, alias);
  174. if (!path) {
  175. pr_err("%s alias not found", alias);
  176. return -ENODEV;
  177. }
  178. node = fdt_path_offset(gd->fdt_blob, path);
  179. if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node,
  180. &dev)) {
  181. down_serial_dev = dev;
  182. } else if (node > 0 &&
  183. !lists_bind_fdt(gd->dm_root, offset_to_ofnode(node),
  184. &dev, false)) {
  185. if (!device_probe(dev))
  186. down_serial_dev = dev;
  187. }
  188. if (!down_serial_dev) {
  189. pr_err("%s = %s device not found", alias, path);
  190. return -ENODEV;
  191. }
  192. /* force silent console on uart only when used */
  193. if (gd->cur_serial_dev == down_serial_dev)
  194. gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
  195. else
  196. gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
  197. ops = serial_get_ops(down_serial_dev);
  198. if (!ops) {
  199. pr_err("%s = %s missing ops", alias, path);
  200. return -ENODEV;
  201. }
  202. if (!ops->setconfig) {
  203. pr_err("%s = %s missing setconfig", alias, path);
  204. return -ENODEV;
  205. }
  206. clrsetbits_le32(&serial_config, SERIAL_PAR_MASK, SERIAL_PAR_EVEN);
  207. data->buffer = memalign(CONFIG_SYS_CACHELINE_SIZE,
  208. USART_RAM_BUFFER_SIZE);
  209. return ops->setconfig(down_serial_dev, serial_config);
  210. }
  211. static void stm32prog_serial_flush(void)
  212. {
  213. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  214. int err;
  215. do {
  216. err = ops->getc(down_serial_dev);
  217. } while (err != -EAGAIN);
  218. }
  219. static int stm32prog_serial_getc_err(void)
  220. {
  221. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  222. int err;
  223. do {
  224. err = ops->getc(down_serial_dev);
  225. if (err == -EAGAIN) {
  226. ctrlc();
  227. WATCHDOG_RESET();
  228. }
  229. } while ((err == -EAGAIN) && (!had_ctrlc()));
  230. return err;
  231. }
  232. static u8 stm32prog_serial_getc(void)
  233. {
  234. int err;
  235. err = stm32prog_serial_getc_err();
  236. return err >= 0 ? err : 0;
  237. }
  238. static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count)
  239. {
  240. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  241. int err;
  242. do {
  243. err = ops->getc(down_serial_dev);
  244. if (err >= 0) {
  245. *buffer++ = err;
  246. *count -= 1;
  247. } else if (err == -EAGAIN) {
  248. ctrlc();
  249. WATCHDOG_RESET();
  250. } else {
  251. break;
  252. }
  253. } while (*count && !had_ctrlc());
  254. return !!(err < 0);
  255. }
  256. static void stm32prog_serial_putc(u8 w_byte)
  257. {
  258. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  259. int err;
  260. do {
  261. err = ops->putc(down_serial_dev, w_byte);
  262. } while (err == -EAGAIN);
  263. }
  264. /* Helper function ************************************************/
  265. static u8 stm32prog_header(struct stm32prog_data *data)
  266. {
  267. u8 ret;
  268. u8 boot = 0;
  269. struct dfu_entity *dfu_entity;
  270. u64 size = 0;
  271. dfu_entity = stm32prog_get_entity(data);
  272. if (!dfu_entity)
  273. return -ENODEV;
  274. printf("\nSTM32 download write %s\n", dfu_entity->name);
  275. /* force cleanup to avoid issue with previous read */
  276. dfu_transaction_cleanup(dfu_entity);
  277. ret = stm32prog_header_check(data->header_data,
  278. &data->header);
  279. /* no header : max size is partition size */
  280. if (ret) {
  281. dfu_entity->get_medium_size(dfu_entity, &size);
  282. data->header.image_length = size;
  283. }
  284. /**** Flash the header if necessary for boot partition */
  285. if (data->phase < PHASE_FIRST_USER)
  286. boot = 1;
  287. /* write header if boot partition */
  288. if (boot) {
  289. if (ret) {
  290. stm32prog_err("invalid header (error %d)", ret);
  291. } else {
  292. ret = stm32prog_write(data,
  293. (u8 *)data->header_data,
  294. BL_HEADER_SIZE);
  295. }
  296. } else {
  297. if (ret)
  298. printf(" partition without checksum\n");
  299. ret = 0;
  300. }
  301. free(data->header_data);
  302. data->header_data = NULL;
  303. return ret;
  304. }
  305. static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
  306. {
  307. u8 ret = 0;
  308. struct dfu_entity *dfu_entity;
  309. if (address < 0x100) {
  310. if (address == PHASE_OTP)
  311. return stm32prog_otp_start(data);
  312. if (address == PHASE_PMIC)
  313. return stm32prog_pmic_start(data);
  314. if (address == PHASE_RESET || address == PHASE_END) {
  315. data->cur_part = NULL;
  316. data->dfu_seq = 0;
  317. data->phase = address;
  318. return 0;
  319. }
  320. if (address != data->phase) {
  321. stm32prog_err("invalid received phase id %d, current phase is %d",
  322. (u8)address, (u8)data->phase);
  323. return -EINVAL;
  324. }
  325. }
  326. /* check the last loaded partition */
  327. if (address == DEFAULT_ADDRESS || address == data->phase) {
  328. switch (data->phase) {
  329. case PHASE_END:
  330. case PHASE_RESET:
  331. case PHASE_DO_RESET:
  332. data->cur_part = NULL;
  333. data->phase = PHASE_DO_RESET;
  334. return 0;
  335. }
  336. dfu_entity = stm32prog_get_entity(data);
  337. if (!dfu_entity)
  338. return -ENODEV;
  339. if (data->dfu_seq) {
  340. ret = dfu_flush(dfu_entity, NULL, 0, data->dfu_seq);
  341. data->dfu_seq = 0;
  342. if (ret) {
  343. stm32prog_err("DFU flush failed [%d]", ret);
  344. return ret;
  345. }
  346. }
  347. printf("\n received length = 0x%x\n", data->cursor);
  348. if (data->header.present) {
  349. if (data->cursor !=
  350. (data->header.image_length + BL_HEADER_SIZE)) {
  351. stm32prog_err("transmission interrupted (length=0x%x expected=0x%x)",
  352. data->cursor,
  353. data->header.image_length +
  354. BL_HEADER_SIZE);
  355. return -EIO;
  356. }
  357. if (data->header.image_checksum != data->checksum) {
  358. stm32prog_err("invalid checksum received (0x%x expected 0x%x)",
  359. data->checksum,
  360. data->header.image_checksum);
  361. return -EIO;
  362. }
  363. printf("\n checksum OK (0x%x)\n", data->checksum);
  364. }
  365. /* update DFU with received flashlayout */
  366. if (data->phase == PHASE_FLASHLAYOUT)
  367. stm32prog_dfu_init(data);
  368. } else {
  369. void (*entry)(void) = (void *)address;
  370. printf("## Starting application at 0x%x ...\n", address);
  371. (*entry)();
  372. printf("## Application terminated\n");
  373. ret = -ENOEXEC;
  374. }
  375. return ret;
  376. }
  377. /**
  378. * get_address() - Get address if it is valid
  379. *
  380. * @tmp_xor: Current xor value to update
  381. * @return The address area
  382. */
  383. static u32 get_address(u8 *tmp_xor)
  384. {
  385. u32 address = 0x0;
  386. u8 data;
  387. data = stm32prog_serial_getc();
  388. *tmp_xor ^= data;
  389. address |= ((u32)data) << 24;
  390. data = stm32prog_serial_getc();
  391. address |= ((u32)data) << 16;
  392. *tmp_xor ^= data;
  393. data = stm32prog_serial_getc();
  394. address |= ((u32)data) << 8;
  395. *tmp_xor ^= data;
  396. data = stm32prog_serial_getc();
  397. address |= ((u32)data);
  398. *tmp_xor ^= data;
  399. return address;
  400. }
  401. static void stm32prog_serial_result(u8 result)
  402. {
  403. /* always flush fifo before to send result */
  404. stm32prog_serial_flush();
  405. stm32prog_serial_putc(result);
  406. }
  407. /* Command -----------------------------------------------*/
  408. /**
  409. * get_cmd_command() - Respond to Get command
  410. *
  411. * @data: Current command context
  412. */
  413. static void get_cmd_command(struct stm32prog_data *data)
  414. {
  415. u32 counter = 0x0;
  416. stm32prog_serial_putc(NB_CMD);
  417. stm32prog_serial_putc(USART_BL_VERSION);
  418. for (counter = 0; counter < NB_CMD; counter++)
  419. stm32prog_serial_putc(cmd_id[counter]);
  420. stm32prog_serial_result(ACK_BYTE);
  421. }
  422. /**
  423. * get_version_command() - Respond to Get Version command
  424. *
  425. * @data: Current command context
  426. */
  427. static void get_version_command(struct stm32prog_data *data)
  428. {
  429. stm32prog_serial_putc(UBOOT_BL_VERSION);
  430. stm32prog_serial_result(ACK_BYTE);
  431. }
  432. /**
  433. * get_id_command() - Respond to Get ID command
  434. *
  435. * @data: Current command context
  436. */
  437. static void get_id_command(struct stm32prog_data *data)
  438. {
  439. /* Send Device IDCode */
  440. stm32prog_serial_putc(0x1);
  441. stm32prog_serial_putc(DEVICE_ID_BYTE1);
  442. stm32prog_serial_putc(DEVICE_ID_BYTE2);
  443. stm32prog_serial_result(ACK_BYTE);
  444. }
  445. /**
  446. * get_phase_command() - Respond to Get phase
  447. *
  448. * @data: Current command context
  449. */
  450. static void get_phase_command(struct stm32prog_data *data)
  451. {
  452. char *err_msg = NULL;
  453. u8 i, length = 0;
  454. u32 destination = DEFAULT_ADDRESS; /* destination address */
  455. int phase = data->phase;
  456. if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
  457. err_msg = stm32prog_get_error(data);
  458. length = strlen(err_msg);
  459. }
  460. if (phase == PHASE_FLASHLAYOUT)
  461. destination = STM32_DDR_BASE;
  462. stm32prog_serial_putc(length + 5); /* Total length */
  463. stm32prog_serial_putc(phase & 0xFF); /* partition ID */
  464. stm32prog_serial_putc(destination); /* byte 1 of address */
  465. stm32prog_serial_putc(destination >> 8); /* byte 2 of address */
  466. stm32prog_serial_putc(destination >> 16); /* byte 3 of address */
  467. stm32prog_serial_putc(destination >> 24); /* byte 4 of address */
  468. stm32prog_serial_putc(length); /* Information length */
  469. for (i = 0; i < length; i++)
  470. stm32prog_serial_putc(err_msg[i]);
  471. stm32prog_serial_result(ACK_BYTE);
  472. if (phase == PHASE_RESET)
  473. stm32prog_do_reset(data);
  474. }
  475. /**
  476. * read_memory_command() - Read data from memory
  477. *
  478. * @data: Current command context
  479. */
  480. static void read_memory_command(struct stm32prog_data *data)
  481. {
  482. u32 address = 0x0;
  483. u8 rcv_data = 0x0, tmp_xor = 0x0;
  484. u32 counter = 0x0;
  485. /* Read memory address */
  486. address = get_address(&tmp_xor);
  487. /* If address memory is not received correctly */
  488. rcv_data = stm32prog_serial_getc();
  489. if (rcv_data != tmp_xor) {
  490. stm32prog_serial_result(NACK_BYTE);
  491. return;
  492. }
  493. stm32prog_serial_result(ACK_BYTE);
  494. /* Read the number of bytes to be received:
  495. * Max NbrOfData = Data + 1 = 256
  496. */
  497. rcv_data = stm32prog_serial_getc();
  498. tmp_xor = ~rcv_data;
  499. if (stm32prog_serial_getc() != tmp_xor) {
  500. stm32prog_serial_result(NACK_BYTE);
  501. return;
  502. }
  503. /* If checksum is correct send ACK */
  504. stm32prog_serial_result(ACK_BYTE);
  505. /* Send data to the host:
  506. * Number of data to read = data + 1
  507. */
  508. for (counter = (rcv_data + 1); counter != 0; counter--)
  509. stm32prog_serial_putc(*(u8 *)(address++));
  510. }
  511. /**
  512. * start_command() - Respond to start command
  513. *
  514. * Jump to user application in RAM or partition check
  515. *
  516. * @data: Current command context
  517. */
  518. static void start_command(struct stm32prog_data *data)
  519. {
  520. u32 address = 0;
  521. u8 tmp_xor = 0x0;
  522. u8 ret, rcv_data;
  523. /* Read memory address */
  524. address = get_address(&tmp_xor);
  525. /* If address memory is not received correctly */
  526. rcv_data = stm32prog_serial_getc();
  527. if (rcv_data != tmp_xor) {
  528. stm32prog_serial_result(NACK_BYTE);
  529. return;
  530. }
  531. /* validate partition */
  532. ret = stm32prog_start(data,
  533. address);
  534. if (ret)
  535. stm32prog_serial_result(ABORT_BYTE);
  536. else
  537. stm32prog_serial_result(ACK_BYTE);
  538. }
  539. /**
  540. * download_command() - Respond to download command
  541. *
  542. * Write data to not volatile memory, Flash
  543. *
  544. * @data: Current command context
  545. */
  546. static void download_command(struct stm32prog_data *data)
  547. {
  548. u32 address = 0x0;
  549. u8 my_xor = 0x0;
  550. u8 rcv_xor;
  551. u32 counter = 0x0, codesize = 0x0;
  552. u8 *ramaddress = 0;
  553. u8 rcv_data = 0x0;
  554. struct image_header_s *image_header = &data->header;
  555. u32 cursor = data->cursor;
  556. long size = 0;
  557. u8 operation;
  558. u32 packet_number;
  559. u32 result = ACK_BYTE;
  560. u8 ret;
  561. unsigned int i;
  562. bool error;
  563. int rcv;
  564. address = get_address(&my_xor);
  565. /* If address memory is not received correctly */
  566. rcv_xor = stm32prog_serial_getc();
  567. if (rcv_xor != my_xor) {
  568. result = NACK_BYTE;
  569. goto end;
  570. }
  571. /* If address valid send ACK */
  572. stm32prog_serial_result(ACK_BYTE);
  573. /* get packet number and operation type */
  574. operation = (u8)((u32)address >> 24);
  575. packet_number = ((u32)(((u32)address << 8))) >> 8;
  576. switch (operation) {
  577. /* supported operation */
  578. case PHASE_FLASHLAYOUT:
  579. case PHASE_OTP:
  580. case PHASE_PMIC:
  581. break;
  582. default:
  583. result = NACK_BYTE;
  584. goto end;
  585. }
  586. /* check the packet number */
  587. if (packet_number == 0) {
  588. /* erase: re-initialize the image_header struct */
  589. data->packet_number = 0;
  590. if (data->header_data)
  591. memset(data->header_data, 0, BL_HEADER_SIZE);
  592. else
  593. data->header_data = calloc(1, BL_HEADER_SIZE);
  594. cursor = 0;
  595. data->cursor = 0;
  596. data->checksum = 0;
  597. /*idx = cursor;*/
  598. } else {
  599. data->packet_number++;
  600. }
  601. /* Check with the number of current packet if the device receive
  602. * the true packet
  603. */
  604. if (packet_number != data->packet_number) {
  605. data->packet_number--;
  606. result = NACK_BYTE;
  607. goto end;
  608. }
  609. /*-- Read number of bytes to be written and data -----------*/
  610. /* Read the number of bytes to be written:
  611. * Max NbrOfData = data + 1 <= 256
  612. */
  613. rcv_data = stm32prog_serial_getc();
  614. /* NbrOfData to write = data + 1 */
  615. codesize = rcv_data + 0x01;
  616. if (codesize > USART_RAM_BUFFER_SIZE) {
  617. result = NACK_BYTE;
  618. goto end;
  619. }
  620. /* Checksum Initialization */
  621. my_xor = rcv_data;
  622. /* UART receive data and send to Buffer */
  623. counter = codesize;
  624. error = stm32prog_serial_get_buffer(data->buffer, &counter);
  625. /* read checksum */
  626. if (!error) {
  627. rcv = stm32prog_serial_getc_err();
  628. error = !!(rcv < 0);
  629. rcv_xor = rcv;
  630. }
  631. if (error) {
  632. printf("transmission error on packet %d, byte %d\n",
  633. packet_number, codesize - counter);
  634. /* waiting end of packet before flush & NACK */
  635. mdelay(30);
  636. data->packet_number--;
  637. result = NACK_BYTE;
  638. goto end;
  639. }
  640. /* Compute Checksum */
  641. ramaddress = data->buffer;
  642. for (counter = codesize; counter != 0; counter--)
  643. my_xor ^= *(ramaddress++);
  644. /* If Checksum is incorrect */
  645. if (rcv_xor != my_xor) {
  646. printf("checksum error on packet %d\n",
  647. packet_number);
  648. /* wait to be sure that all data are received
  649. * in the FIFO before flush
  650. */
  651. mdelay(30);
  652. data->packet_number--;
  653. result = NACK_BYTE;
  654. goto end;
  655. }
  656. /* Update current position in buffer */
  657. data->cursor += codesize;
  658. if (operation == PHASE_OTP) {
  659. size = data->cursor - cursor;
  660. /* no header for OTP */
  661. if (stm32prog_otp_write(data, cursor,
  662. data->buffer, &size))
  663. result = ABORT_BYTE;
  664. goto end;
  665. }
  666. if (operation == PHASE_PMIC) {
  667. size = data->cursor - cursor;
  668. /* no header for PMIC */
  669. if (stm32prog_pmic_write(data, cursor,
  670. data->buffer, &size))
  671. result = ABORT_BYTE;
  672. goto end;
  673. }
  674. if (cursor < BL_HEADER_SIZE) {
  675. /* size = portion of header in this chunck */
  676. if (data->cursor >= BL_HEADER_SIZE)
  677. size = BL_HEADER_SIZE - cursor;
  678. else
  679. size = data->cursor - cursor;
  680. memcpy((void *)((u32)(data->header_data) + cursor),
  681. data->buffer, size);
  682. cursor += size;
  683. if (cursor == BL_HEADER_SIZE) {
  684. /* Check and Write the header */
  685. if (stm32prog_header(data)) {
  686. result = ABORT_BYTE;
  687. goto end;
  688. }
  689. } else {
  690. goto end;
  691. }
  692. }
  693. if (image_header->present) {
  694. if (data->cursor <= BL_HEADER_SIZE)
  695. goto end;
  696. /* compute checksum on payload */
  697. for (i = (unsigned long)size; i < codesize; i++)
  698. data->checksum += data->buffer[i];
  699. if (data->cursor >
  700. image_header->image_length + BL_HEADER_SIZE) {
  701. pr_err("expected size exceeded\n");
  702. result = ABORT_BYTE;
  703. goto end;
  704. }
  705. /* write data (payload) */
  706. ret = stm32prog_write(data,
  707. &data->buffer[size],
  708. codesize - size);
  709. } else {
  710. /* write all */
  711. ret = stm32prog_write(data,
  712. data->buffer,
  713. codesize);
  714. }
  715. if (ret)
  716. result = ABORT_BYTE;
  717. end:
  718. stm32prog_serial_result(result);
  719. }
  720. /**
  721. * read_partition() - Respond to read command
  722. *
  723. * Read data from not volatile memory, Flash
  724. *
  725. * @data: Current command context
  726. */
  727. static void read_partition_command(struct stm32prog_data *data)
  728. {
  729. u32 i, part_id, codesize, offset = 0, rcv_data;
  730. long size;
  731. u8 tmp_xor;
  732. int res;
  733. u8 buffer[256];
  734. part_id = stm32prog_serial_getc();
  735. tmp_xor = part_id;
  736. offset = get_address(&tmp_xor);
  737. rcv_data = stm32prog_serial_getc();
  738. if (rcv_data != tmp_xor) {
  739. pr_debug("1st checksum received = %x, computed %x\n",
  740. rcv_data, tmp_xor);
  741. goto error;
  742. }
  743. stm32prog_serial_putc(ACK_BYTE);
  744. /* NbrOfData to read = data + 1 */
  745. rcv_data = stm32prog_serial_getc();
  746. codesize = rcv_data + 0x01;
  747. tmp_xor = rcv_data;
  748. rcv_data = stm32prog_serial_getc();
  749. if ((rcv_data ^ tmp_xor) != 0xFF) {
  750. pr_debug("2nd checksum received = %x, computed %x\n",
  751. rcv_data, tmp_xor);
  752. goto error;
  753. }
  754. pr_debug("%s : %x\n", __func__, part_id);
  755. rcv_data = 0;
  756. switch (part_id) {
  757. case PHASE_OTP:
  758. size = codesize;
  759. if (!stm32prog_otp_read(data, offset, buffer, &size))
  760. rcv_data = size;
  761. break;
  762. case PHASE_PMIC:
  763. size = codesize;
  764. if (!stm32prog_pmic_read(data, offset, buffer, &size))
  765. rcv_data = size;
  766. break;
  767. default:
  768. res = stm32prog_read(data, part_id, offset,
  769. buffer, codesize);
  770. if (res > 0)
  771. rcv_data = res;
  772. break;
  773. }
  774. if (rcv_data > 0) {
  775. stm32prog_serial_putc(ACK_BYTE);
  776. /*----------- Send data to the host -----------*/
  777. for (i = 0; i < rcv_data; i++)
  778. stm32prog_serial_putc(buffer[i]);
  779. /*----------- Send filler to the host -----------*/
  780. for (; i < codesize; i++)
  781. stm32prog_serial_putc(0x0);
  782. return;
  783. }
  784. stm32prog_serial_result(ABORT_BYTE);
  785. return;
  786. error:
  787. stm32prog_serial_result(NACK_BYTE);
  788. }
  789. /* MAIN function = SERIAL LOOP ***********************************************/
  790. /**
  791. * stm32prog_serial_loop() - USART bootloader Loop routine
  792. *
  793. * @data: Current command context
  794. * @return true if reset is needed after loop
  795. */
  796. bool stm32prog_serial_loop(struct stm32prog_data *data)
  797. {
  798. u32 counter = 0x0;
  799. u8 command = 0x0;
  800. u8 found;
  801. int phase = data->phase;
  802. /* element of cmd_func need to aligned with cmd_id[]*/
  803. void (*cmd_func[NB_CMD])(struct stm32prog_data *) = {
  804. /* GET_CMD_COMMAND */ get_cmd_command,
  805. /* GET_VER_COMMAND */ get_version_command,
  806. /* GET_ID_COMMAND */ get_id_command,
  807. /* GET_PHASE_COMMAND */ get_phase_command,
  808. /* RM_COMMAND */ read_memory_command,
  809. /* READ_PART_COMMAND */ read_partition_command,
  810. /* START_COMMAND */ start_command,
  811. /* DOWNLOAD_COMMAND */ download_command
  812. };
  813. /* flush and NACK pending command received during u-boot init
  814. * request command reemit
  815. */
  816. stm32prog_serial_result(NACK_BYTE);
  817. clear_ctrlc(); /* forget any previous Control C */
  818. while (!had_ctrlc()) {
  819. phase = data->phase;
  820. if (phase == PHASE_DO_RESET)
  821. return true;
  822. /* Get the user command: read first byte */
  823. command = stm32prog_serial_getc();
  824. if (command == INIT_BYTE) {
  825. puts("\nConnected\n");
  826. stm32prog_serial_result(ACK_BYTE);
  827. continue;
  828. }
  829. found = 0;
  830. for (counter = 0; counter < NB_CMD; counter++)
  831. if (cmd_id[counter] == command) {
  832. found = 1;
  833. break;
  834. }
  835. if (found)
  836. if ((command ^ stm32prog_serial_getc()) != 0xFF)
  837. found = 0;
  838. if (!found) {
  839. /* wait to be sure that all data are received
  840. * in the FIFO before flush (CMD and XOR)
  841. */
  842. mdelay(3);
  843. stm32prog_serial_result(NACK_BYTE);
  844. } else {
  845. stm32prog_serial_result(ACK_BYTE);
  846. cmd_func[counter](data);
  847. }
  848. WATCHDOG_RESET();
  849. }
  850. /* clean device */
  851. if (gd->cur_serial_dev == down_serial_dev) {
  852. /* restore console on uart */
  853. gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
  854. }
  855. down_serial_dev = NULL;
  856. return false; /* no reset after ctrlc */
  857. }