memory.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #include <common.h>
  7. #include <log.h>
  8. /* Memory test
  9. *
  10. * General observations:
  11. * o The recommended test sequence is to test the data lines: if they are
  12. * broken, nothing else will work properly. Then test the address
  13. * lines. Finally, test the cells in the memory now that the test
  14. * program knows that the address and data lines work properly.
  15. * This sequence also helps isolate and identify what is faulty.
  16. *
  17. * o For the address line test, it is a good idea to use the base
  18. * address of the lowest memory location, which causes a '1' bit to
  19. * walk through a field of zeros on the address lines and the highest
  20. * memory location, which causes a '0' bit to walk through a field of
  21. * '1's on the address line.
  22. *
  23. * o Floating buses can fool memory tests if the test routine writes
  24. * a value and then reads it back immediately. The problem is, the
  25. * write will charge the residual capacitance on the data bus so the
  26. * bus retains its state briefely. When the test program reads the
  27. * value back immediately, the capacitance of the bus can allow it
  28. * to read back what was written, even though the memory circuitry
  29. * is broken. To avoid this, the test program should write a test
  30. * pattern to the target location, write a different pattern elsewhere
  31. * to charge the residual capacitance in a differnt manner, then read
  32. * the target location back.
  33. *
  34. * o Always read the target location EXACTLY ONCE and save it in a local
  35. * variable. The problem with reading the target location more than
  36. * once is that the second and subsequent reads may work properly,
  37. * resulting in a failed test that tells the poor technician that
  38. * "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
  39. * doesn't help him one bit and causes puzzled phone calls. Been there,
  40. * done that.
  41. *
  42. * Data line test:
  43. * ---------------
  44. * This tests data lines for shorts and opens by forcing adjacent data
  45. * to opposite states. Because the data lines could be routed in an
  46. * arbitrary manner the must ensure test patterns ensure that every case
  47. * is tested. By using the following series of binary patterns every
  48. * combination of adjacent bits is test regardless of routing.
  49. *
  50. * ...101010101010101010101010
  51. * ...110011001100110011001100
  52. * ...111100001111000011110000
  53. * ...111111110000000011111111
  54. *
  55. * Carrying this out, gives us six hex patterns as follows:
  56. *
  57. * 0xaaaaaaaaaaaaaaaa
  58. * 0xcccccccccccccccc
  59. * 0xf0f0f0f0f0f0f0f0
  60. * 0xff00ff00ff00ff00
  61. * 0xffff0000ffff0000
  62. * 0xffffffff00000000
  63. *
  64. * To test for short and opens to other signals on our boards, we
  65. * simply test with the 1's complemnt of the paterns as well, resulting
  66. * in twelve patterns total.
  67. *
  68. * After writing a test pattern. a special pattern 0x0123456789ABCDEF is
  69. * written to a different address in case the data lines are floating.
  70. * Thus, if a byte lane fails, you will see part of the special
  71. * pattern in that byte lane when the test runs. For example, if the
  72. * xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
  73. * (for the 'a' test pattern).
  74. *
  75. * Address line test:
  76. * ------------------
  77. * This function performs a test to verify that all the address lines
  78. * hooked up to the RAM work properly. If there is an address line
  79. * fault, it usually shows up as two different locations in the address
  80. * map (related by the faulty address line) mapping to one physical
  81. * memory storage location. The artifact that shows up is writing to
  82. * the first location "changes" the second location.
  83. *
  84. * To test all address lines, we start with the given base address and
  85. * xor the address with a '1' bit to flip one address line. For each
  86. * test, we shift the '1' bit left to test the next address line.
  87. *
  88. * In the actual code, we start with address sizeof(ulong) since our
  89. * test pattern we use is a ulong and thus, if we tried to test lower
  90. * order address bits, it wouldn't work because our pattern would
  91. * overwrite itself.
  92. *
  93. * Example for a 4 bit address space with the base at 0000:
  94. * 0000 <- base
  95. * 0001 <- test 1
  96. * 0010 <- test 2
  97. * 0100 <- test 3
  98. * 1000 <- test 4
  99. * Example for a 4 bit address space with the base at 0010:
  100. * 0010 <- base
  101. * 0011 <- test 1
  102. * 0000 <- (below the base address, skipped)
  103. * 0110 <- test 2
  104. * 1010 <- test 3
  105. *
  106. * The test locations are successively tested to make sure that they are
  107. * not "mirrored" onto the base address due to a faulty address line.
  108. * Note that the base and each test location are related by one address
  109. * line flipped. Note that the base address need not be all zeros.
  110. *
  111. * Memory tests 1-4:
  112. * -----------------
  113. * These tests verify RAM using sequential writes and reads
  114. * to/from RAM. There are several test cases that use different patterns to
  115. * verify RAM. Each test case fills a region of RAM with one pattern and
  116. * then reads the region back and compares its contents with the pattern.
  117. * The following patterns are used:
  118. *
  119. * 1a) zero pattern (0x00000000)
  120. * 1b) negative pattern (0xffffffff)
  121. * 1c) checkerboard pattern (0x55555555)
  122. * 1d) checkerboard pattern (0xaaaaaaaa)
  123. * 2) bit-flip pattern ((1 << (offset % 32))
  124. * 3) address pattern (offset)
  125. * 4) address pattern (~offset)
  126. *
  127. * Being run in normal mode, the test verifies only small 4Kb
  128. * regions of RAM around each 1Mb boundary. For example, for 64Mb
  129. * RAM the following areas are verified: 0x00000000-0x00000800,
  130. * 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
  131. * 0x04000000. If the test is run in slow-test mode, it verifies
  132. * the whole RAM.
  133. */
  134. #include <post.h>
  135. #include <watchdog.h>
  136. #if CONFIG_POST & (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_MEM_REGIONS)
  137. DECLARE_GLOBAL_DATA_PTR;
  138. /*
  139. * Define INJECT_*_ERRORS for testing error detection in the presence of
  140. * _good_ hardware.
  141. */
  142. #undef INJECT_DATA_ERRORS
  143. #undef INJECT_ADDRESS_ERRORS
  144. #ifdef INJECT_DATA_ERRORS
  145. #warning "Injecting data line errors for testing purposes"
  146. #endif
  147. #ifdef INJECT_ADDRESS_ERRORS
  148. #warning "Injecting address line errors for testing purposes"
  149. #endif
  150. /*
  151. * This function performs a double word move from the data at
  152. * the source pointer to the location at the destination pointer.
  153. * This is helpful for testing memory on processors which have a 64 bit
  154. * wide data bus.
  155. *
  156. * On those PowerPC with FPU, use assembly and a floating point move:
  157. * this does a 64 bit move.
  158. *
  159. * For other processors, let the compiler generate the best code it can.
  160. */
  161. static void move64(const unsigned long long *src, unsigned long long *dest)
  162. {
  163. *dest = *src;
  164. }
  165. /*
  166. * This is 64 bit wide test patterns. Note that they reside in ROM
  167. * (which presumably works) and the tests write them to RAM which may
  168. * not work.
  169. *
  170. * The "otherpattern" is written to drive the data bus to values other
  171. * than the test pattern. This is for detecting floating bus lines.
  172. *
  173. */
  174. const static unsigned long long pattern[] = {
  175. 0xaaaaaaaaaaaaaaaaULL,
  176. 0xccccccccccccccccULL,
  177. 0xf0f0f0f0f0f0f0f0ULL,
  178. 0xff00ff00ff00ff00ULL,
  179. 0xffff0000ffff0000ULL,
  180. 0xffffffff00000000ULL,
  181. 0x00000000ffffffffULL,
  182. 0x0000ffff0000ffffULL,
  183. 0x00ff00ff00ff00ffULL,
  184. 0x0f0f0f0f0f0f0f0fULL,
  185. 0x3333333333333333ULL,
  186. 0x5555555555555555ULL
  187. };
  188. const unsigned long long otherpattern = 0x0123456789abcdefULL;
  189. static int memory_post_dataline(unsigned long long * pmem)
  190. {
  191. unsigned long long temp64 = 0;
  192. int num_patterns = ARRAY_SIZE(pattern);
  193. int i;
  194. unsigned int hi, lo, pathi, patlo;
  195. int ret = 0;
  196. for ( i = 0; i < num_patterns; i++) {
  197. move64(&(pattern[i]), pmem++);
  198. /*
  199. * Put a different pattern on the data lines: otherwise they
  200. * may float long enough to read back what we wrote.
  201. */
  202. move64(&otherpattern, pmem--);
  203. move64(pmem, &temp64);
  204. #ifdef INJECT_DATA_ERRORS
  205. temp64 ^= 0x00008000;
  206. #endif
  207. if (temp64 != pattern[i]){
  208. pathi = (pattern[i]>>32) & 0xffffffff;
  209. patlo = pattern[i] & 0xffffffff;
  210. hi = (temp64>>32) & 0xffffffff;
  211. lo = temp64 & 0xffffffff;
  212. post_log("Memory (data line) error at %08x, "
  213. "wrote %08x%08x, read %08x%08x !\n",
  214. pmem, pathi, patlo, hi, lo);
  215. ret = -1;
  216. }
  217. }
  218. return ret;
  219. }
  220. static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
  221. {
  222. ulong *target;
  223. ulong *end;
  224. ulong readback;
  225. ulong xor;
  226. int ret = 0;
  227. end = (ulong *)((ulong)base + size); /* pointer arith! */
  228. xor = 0;
  229. for(xor = sizeof(ulong); xor > 0; xor <<= 1) {
  230. target = (ulong *)((ulong)testaddr ^ xor);
  231. if((target >= base) && (target < end)) {
  232. *testaddr = ~*target;
  233. readback = *target;
  234. #ifdef INJECT_ADDRESS_ERRORS
  235. if(xor == 0x00008000) {
  236. readback = *testaddr;
  237. }
  238. #endif
  239. if(readback == *testaddr) {
  240. post_log("Memory (address line) error at %08x<->%08x, "
  241. "XOR value %08x !\n",
  242. testaddr, target, xor);
  243. ret = -1;
  244. }
  245. }
  246. }
  247. return ret;
  248. }
  249. static int memory_post_test1(unsigned long start,
  250. unsigned long size,
  251. unsigned long val)
  252. {
  253. unsigned long i;
  254. ulong *mem = (ulong *) start;
  255. ulong readback;
  256. int ret = 0;
  257. for (i = 0; i < size / sizeof (ulong); i++) {
  258. mem[i] = val;
  259. if (i % 1024 == 0)
  260. WATCHDOG_RESET();
  261. }
  262. for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
  263. readback = mem[i];
  264. if (readback != val) {
  265. post_log("Memory error at %08x, "
  266. "wrote %08x, read %08x !\n",
  267. mem + i, val, readback);
  268. ret = -1;
  269. break;
  270. }
  271. if (i % 1024 == 0)
  272. WATCHDOG_RESET();
  273. }
  274. return ret;
  275. }
  276. static int memory_post_test2(unsigned long start, unsigned long size)
  277. {
  278. unsigned long i;
  279. ulong *mem = (ulong *) start;
  280. ulong readback;
  281. int ret = 0;
  282. for (i = 0; i < size / sizeof (ulong); i++) {
  283. mem[i] = 1 << (i % 32);
  284. if (i % 1024 == 0)
  285. WATCHDOG_RESET();
  286. }
  287. for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
  288. readback = mem[i];
  289. if (readback != (1 << (i % 32))) {
  290. post_log("Memory error at %08x, "
  291. "wrote %08x, read %08x !\n",
  292. mem + i, 1 << (i % 32), readback);
  293. ret = -1;
  294. break;
  295. }
  296. if (i % 1024 == 0)
  297. WATCHDOG_RESET();
  298. }
  299. return ret;
  300. }
  301. static int memory_post_test3(unsigned long start, unsigned long size)
  302. {
  303. unsigned long i;
  304. ulong *mem = (ulong *) start;
  305. ulong readback;
  306. int ret = 0;
  307. for (i = 0; i < size / sizeof (ulong); i++) {
  308. mem[i] = i;
  309. if (i % 1024 == 0)
  310. WATCHDOG_RESET();
  311. }
  312. for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
  313. readback = mem[i];
  314. if (readback != i) {
  315. post_log("Memory error at %08x, "
  316. "wrote %08x, read %08x !\n",
  317. mem + i, i, readback);
  318. ret = -1;
  319. break;
  320. }
  321. if (i % 1024 == 0)
  322. WATCHDOG_RESET();
  323. }
  324. return ret;
  325. }
  326. static int memory_post_test4(unsigned long start, unsigned long size)
  327. {
  328. unsigned long i;
  329. ulong *mem = (ulong *) start;
  330. ulong readback;
  331. int ret = 0;
  332. for (i = 0; i < size / sizeof (ulong); i++) {
  333. mem[i] = ~i;
  334. if (i % 1024 == 0)
  335. WATCHDOG_RESET();
  336. }
  337. for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
  338. readback = mem[i];
  339. if (readback != ~i) {
  340. post_log("Memory error at %08x, "
  341. "wrote %08x, read %08x !\n",
  342. mem + i, ~i, readback);
  343. ret = -1;
  344. break;
  345. }
  346. if (i % 1024 == 0)
  347. WATCHDOG_RESET();
  348. }
  349. return ret;
  350. }
  351. static int memory_post_test_lines(unsigned long start, unsigned long size)
  352. {
  353. int ret = 0;
  354. ret = memory_post_dataline((unsigned long long *)start);
  355. WATCHDOG_RESET();
  356. if (!ret)
  357. ret = memory_post_addrline((ulong *)start, (ulong *)start,
  358. size);
  359. WATCHDOG_RESET();
  360. if (!ret)
  361. ret = memory_post_addrline((ulong *)(start+size-8),
  362. (ulong *)start, size);
  363. WATCHDOG_RESET();
  364. return ret;
  365. }
  366. static int memory_post_test_patterns(unsigned long start, unsigned long size)
  367. {
  368. int ret = 0;
  369. ret = memory_post_test1(start, size, 0x00000000);
  370. WATCHDOG_RESET();
  371. if (!ret)
  372. ret = memory_post_test1(start, size, 0xffffffff);
  373. WATCHDOG_RESET();
  374. if (!ret)
  375. ret = memory_post_test1(start, size, 0x55555555);
  376. WATCHDOG_RESET();
  377. if (!ret)
  378. ret = memory_post_test1(start, size, 0xaaaaaaaa);
  379. WATCHDOG_RESET();
  380. if (!ret)
  381. ret = memory_post_test2(start, size);
  382. WATCHDOG_RESET();
  383. if (!ret)
  384. ret = memory_post_test3(start, size);
  385. WATCHDOG_RESET();
  386. if (!ret)
  387. ret = memory_post_test4(start, size);
  388. WATCHDOG_RESET();
  389. return ret;
  390. }
  391. static int memory_post_test_regions(unsigned long start, unsigned long size)
  392. {
  393. unsigned long i;
  394. int ret = 0;
  395. for (i = 0; i < (size >> 20) && (!ret); i++) {
  396. if (!ret)
  397. ret = memory_post_test_patterns(start + (i << 20),
  398. 0x800);
  399. if (!ret)
  400. ret = memory_post_test_patterns(start + (i << 20) +
  401. 0xff800, 0x800);
  402. }
  403. return ret;
  404. }
  405. static int memory_post_tests(unsigned long start, unsigned long size)
  406. {
  407. int ret = 0;
  408. ret = memory_post_test_lines(start, size);
  409. if (!ret)
  410. ret = memory_post_test_patterns(start, size);
  411. return ret;
  412. }
  413. /*
  414. * !! this is only valid, if you have contiguous memory banks !!
  415. */
  416. __attribute__((weak))
  417. int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
  418. {
  419. struct bd_info *bd = gd->bd;
  420. *vstart = CONFIG_SYS_SDRAM_BASE;
  421. *size = (gd->ram_size >= 256 << 20 ?
  422. 256 << 20 : gd->ram_size) - (1 << 20);
  423. /* Limit area to be tested with the board info struct */
  424. if ((*vstart) + (*size) > (ulong)bd)
  425. *size = (ulong)bd - *vstart;
  426. return 0;
  427. }
  428. __attribute__((weak))
  429. int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
  430. {
  431. return 1;
  432. }
  433. __attribute__((weak))
  434. int arch_memory_test_cleanup(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
  435. {
  436. return 0;
  437. }
  438. __attribute__((weak))
  439. void arch_memory_failure_handle(void)
  440. {
  441. return;
  442. }
  443. int memory_regions_post_test(int flags)
  444. {
  445. int ret = 0;
  446. phys_addr_t phys_offset = 0;
  447. u32 memsize, vstart;
  448. arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
  449. ret = memory_post_test_lines(vstart, memsize);
  450. if (!ret)
  451. ret = memory_post_test_regions(vstart, memsize);
  452. return ret;
  453. }
  454. int memory_post_test(int flags)
  455. {
  456. int ret = 0;
  457. phys_addr_t phys_offset = 0;
  458. u32 memsize, vstart;
  459. arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
  460. do {
  461. if (flags & POST_SLOWTEST) {
  462. ret = memory_post_tests(vstart, memsize);
  463. } else { /* POST_NORMAL */
  464. ret = memory_post_test_regions(vstart, memsize);
  465. }
  466. } while (!ret &&
  467. !arch_memory_test_advance(&vstart, &memsize, &phys_offset));
  468. arch_memory_test_cleanup(&vstart, &memsize, &phys_offset);
  469. if (ret)
  470. arch_memory_failure_handle();
  471. return ret;
  472. }
  473. #endif /* CONFIG_POST&(CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) */