fdtdec.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <hang.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <malloc.h>
  13. #include <net.h>
  14. #include <dm/of_extra.h>
  15. #include <env.h>
  16. #include <errno.h>
  17. #include <fdtdec.h>
  18. #include <fdt_support.h>
  19. #include <gzip.h>
  20. #include <mapmem.h>
  21. #include <linux/libfdt.h>
  22. #include <serial.h>
  23. #include <asm/sections.h>
  24. #include <linux/ctype.h>
  25. #include <linux/lzo.h>
  26. #include <linux/ioport.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. /*
  29. * Here are the type we know about. One day we might allow drivers to
  30. * register. For now we just put them here. The COMPAT macro allows us to
  31. * turn this into a sparse list later, and keeps the ID with the name.
  32. *
  33. * NOTE: This list is basically a TODO list for things that need to be
  34. * converted to driver model. So don't add new things here unless there is a
  35. * good reason why driver-model conversion is infeasible. Examples include
  36. * things which are used before driver model is available.
  37. */
  38. #define COMPAT(id, name) name
  39. static const char * const compat_names[COMPAT_COUNT] = {
  40. COMPAT(UNKNOWN, "<none>"),
  41. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  42. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  43. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  44. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  45. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  46. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  47. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  48. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  49. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  50. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  51. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  52. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  53. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  54. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  55. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  56. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  57. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  58. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  59. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  60. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  61. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  62. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  63. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  64. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  65. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  66. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  72. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  73. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  74. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  75. };
  76. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  77. {
  78. /* We allow reading of the 'unknown' ID for testing purposes */
  79. assert(id >= 0 && id < COMPAT_COUNT);
  80. return compat_names[id];
  81. }
  82. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  83. const char *prop_name, int index, int na,
  84. int ns, fdt_size_t *sizep,
  85. bool translate)
  86. {
  87. const fdt32_t *prop, *prop_end;
  88. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  89. int len;
  90. fdt_addr_t addr;
  91. debug("%s: %s: ", __func__, prop_name);
  92. prop = fdt_getprop(blob, node, prop_name, &len);
  93. if (!prop) {
  94. debug("(not found)\n");
  95. return FDT_ADDR_T_NONE;
  96. }
  97. prop_end = prop + (len / sizeof(*prop));
  98. prop_addr = prop + (index * (na + ns));
  99. prop_size = prop_addr + na;
  100. prop_after_size = prop_size + ns;
  101. if (prop_after_size > prop_end) {
  102. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  103. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  104. return FDT_ADDR_T_NONE;
  105. }
  106. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  107. if (translate)
  108. addr = fdt_translate_address(blob, node, prop_addr);
  109. else
  110. #endif
  111. addr = fdtdec_get_number(prop_addr, na);
  112. if (sizep) {
  113. *sizep = fdtdec_get_number(prop_size, ns);
  114. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  115. (unsigned long long)*sizep);
  116. } else {
  117. debug("addr=%08llx\n", (unsigned long long)addr);
  118. }
  119. return addr;
  120. }
  121. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  122. int node, const char *prop_name,
  123. int index, fdt_size_t *sizep,
  124. bool translate)
  125. {
  126. int na, ns;
  127. debug("%s: ", __func__);
  128. na = fdt_address_cells(blob, parent);
  129. if (na < 1) {
  130. debug("(bad #address-cells)\n");
  131. return FDT_ADDR_T_NONE;
  132. }
  133. ns = fdt_size_cells(blob, parent);
  134. if (ns < 0) {
  135. debug("(bad #size-cells)\n");
  136. return FDT_ADDR_T_NONE;
  137. }
  138. debug("na=%d, ns=%d, ", na, ns);
  139. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  140. ns, sizep, translate);
  141. }
  142. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  143. const char *prop_name, int index,
  144. fdt_size_t *sizep,
  145. bool translate)
  146. {
  147. int parent;
  148. debug("%s: ", __func__);
  149. parent = fdt_parent_offset(blob, node);
  150. if (parent < 0) {
  151. debug("(no parent found)\n");
  152. return FDT_ADDR_T_NONE;
  153. }
  154. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  155. index, sizep, translate);
  156. }
  157. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  158. const char *prop_name, fdt_size_t *sizep)
  159. {
  160. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  161. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  162. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  163. ns, sizep, false);
  164. }
  165. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  166. {
  167. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  168. }
  169. #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
  170. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  171. {
  172. const char *list, *end;
  173. int len;
  174. list = fdt_getprop(blob, node, "compatible", &len);
  175. if (!list)
  176. return -ENOENT;
  177. end = list + len;
  178. while (list < end) {
  179. len = strlen(list);
  180. if (len >= strlen("pciVVVV,DDDD")) {
  181. char *s = strstr(list, "pci");
  182. /*
  183. * check if the string is something like pciVVVV,DDDD.RR
  184. * or just pciVVVV,DDDD
  185. */
  186. if (s && s[7] == ',' &&
  187. (s[12] == '.' || s[12] == 0)) {
  188. s += 3;
  189. *vendor = simple_strtol(s, NULL, 16);
  190. s += 5;
  191. *device = simple_strtol(s, NULL, 16);
  192. return 0;
  193. }
  194. }
  195. list += (len + 1);
  196. }
  197. return -ENOENT;
  198. }
  199. int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
  200. u32 *bar)
  201. {
  202. int barnum;
  203. /* extract the bar number from fdt_pci_addr */
  204. barnum = addr->phys_hi & 0xff;
  205. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  206. return -EINVAL;
  207. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  208. *bar = dm_pci_read_bar32(dev, barnum);
  209. return 0;
  210. }
  211. int fdtdec_get_pci_bus_range(const void *blob, int node,
  212. struct fdt_resource *res)
  213. {
  214. const u32 *values;
  215. int len;
  216. values = fdt_getprop(blob, node, "bus-range", &len);
  217. if (!values || len < sizeof(*values) * 2)
  218. return -EINVAL;
  219. res->start = fdt32_to_cpu(*values++);
  220. res->end = fdt32_to_cpu(*values);
  221. return 0;
  222. }
  223. #endif
  224. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  225. uint64_t default_val)
  226. {
  227. const unaligned_fdt64_t *cell64;
  228. int length;
  229. cell64 = fdt_getprop(blob, node, prop_name, &length);
  230. if (!cell64 || length < sizeof(*cell64))
  231. return default_val;
  232. return fdt64_to_cpu(*cell64);
  233. }
  234. int fdtdec_get_is_enabled(const void *blob, int node)
  235. {
  236. const char *cell;
  237. /*
  238. * It should say "okay", so only allow that. Some fdts use "ok" but
  239. * this is a bug. Please fix your device tree source file. See here
  240. * for discussion:
  241. *
  242. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  243. */
  244. cell = fdt_getprop(blob, node, "status", NULL);
  245. if (cell)
  246. return strcmp(cell, "okay") == 0;
  247. return 1;
  248. }
  249. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  250. {
  251. enum fdt_compat_id id;
  252. /* Search our drivers */
  253. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  254. if (fdt_node_check_compatible(blob, node,
  255. compat_names[id]) == 0)
  256. return id;
  257. return COMPAT_UNKNOWN;
  258. }
  259. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  260. {
  261. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  262. }
  263. int fdtdec_next_compatible_subnode(const void *blob, int node,
  264. enum fdt_compat_id id, int *depthp)
  265. {
  266. do {
  267. node = fdt_next_node(blob, node, depthp);
  268. } while (*depthp > 1);
  269. /* If this is a direct subnode, and compatible, return it */
  270. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  271. blob, node, compat_names[id]))
  272. return node;
  273. return -FDT_ERR_NOTFOUND;
  274. }
  275. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  276. int *upto)
  277. {
  278. #define MAX_STR_LEN 20
  279. char str[MAX_STR_LEN + 20];
  280. int node, err;
  281. /* snprintf() is not available */
  282. assert(strlen(name) < MAX_STR_LEN);
  283. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  284. node = fdt_path_offset(blob, str);
  285. if (node < 0)
  286. return node;
  287. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  288. if (err < 0)
  289. return err;
  290. if (err)
  291. return -FDT_ERR_NOTFOUND;
  292. (*upto)++;
  293. return node;
  294. }
  295. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  296. enum fdt_compat_id id, int *node_list,
  297. int maxcount)
  298. {
  299. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  300. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  301. }
  302. /* TODO: Can we tighten this code up a little? */
  303. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  304. enum fdt_compat_id id, int *node_list,
  305. int maxcount)
  306. {
  307. int name_len = strlen(name);
  308. int nodes[maxcount];
  309. int num_found = 0;
  310. int offset, node;
  311. int alias_node;
  312. int count;
  313. int i, j;
  314. /* find the alias node if present */
  315. alias_node = fdt_path_offset(blob, "/aliases");
  316. /*
  317. * start with nothing, and we can assume that the root node can't
  318. * match
  319. */
  320. memset(nodes, '\0', sizeof(nodes));
  321. /* First find all the compatible nodes */
  322. for (node = count = 0; node >= 0 && count < maxcount;) {
  323. node = fdtdec_next_compatible(blob, node, id);
  324. if (node >= 0)
  325. nodes[count++] = node;
  326. }
  327. if (node >= 0)
  328. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  329. __func__, name);
  330. /* Now find all the aliases */
  331. for (offset = fdt_first_property_offset(blob, alias_node);
  332. offset > 0;
  333. offset = fdt_next_property_offset(blob, offset)) {
  334. const struct fdt_property *prop;
  335. const char *path;
  336. int number;
  337. int found;
  338. node = 0;
  339. prop = fdt_get_property_by_offset(blob, offset, NULL);
  340. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  341. if (prop->len && 0 == strncmp(path, name, name_len))
  342. node = fdt_path_offset(blob, prop->data);
  343. if (node <= 0)
  344. continue;
  345. /* Get the alias number */
  346. number = simple_strtoul(path + name_len, NULL, 10);
  347. if (number < 0 || number >= maxcount) {
  348. debug("%s: warning: alias '%s' is out of range\n",
  349. __func__, path);
  350. continue;
  351. }
  352. /* Make sure the node we found is actually in our list! */
  353. found = -1;
  354. for (j = 0; j < count; j++)
  355. if (nodes[j] == node) {
  356. found = j;
  357. break;
  358. }
  359. if (found == -1) {
  360. debug("%s: warning: alias '%s' points to a node "
  361. "'%s' that is missing or is not compatible "
  362. " with '%s'\n", __func__, path,
  363. fdt_get_name(blob, node, NULL),
  364. compat_names[id]);
  365. continue;
  366. }
  367. /*
  368. * Add this node to our list in the right place, and mark
  369. * it as done.
  370. */
  371. if (fdtdec_get_is_enabled(blob, node)) {
  372. if (node_list[number]) {
  373. debug("%s: warning: alias '%s' requires that "
  374. "a node be placed in the list in a "
  375. "position which is already filled by "
  376. "node '%s'\n", __func__, path,
  377. fdt_get_name(blob, node, NULL));
  378. continue;
  379. }
  380. node_list[number] = node;
  381. if (number >= num_found)
  382. num_found = number + 1;
  383. }
  384. nodes[found] = 0;
  385. }
  386. /* Add any nodes not mentioned by an alias */
  387. for (i = j = 0; i < maxcount; i++) {
  388. if (!node_list[i]) {
  389. for (; j < maxcount; j++)
  390. if (nodes[j] &&
  391. fdtdec_get_is_enabled(blob, nodes[j]))
  392. break;
  393. /* Have we run out of nodes to add? */
  394. if (j == maxcount)
  395. break;
  396. assert(!node_list[i]);
  397. node_list[i] = nodes[j++];
  398. if (i >= num_found)
  399. num_found = i + 1;
  400. }
  401. }
  402. return num_found;
  403. }
  404. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  405. int *seqp)
  406. {
  407. int base_len = strlen(base);
  408. const char *find_name;
  409. int find_namelen;
  410. int prop_offset;
  411. int aliases;
  412. find_name = fdt_get_name(blob, offset, &find_namelen);
  413. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  414. aliases = fdt_path_offset(blob, "/aliases");
  415. for (prop_offset = fdt_first_property_offset(blob, aliases);
  416. prop_offset > 0;
  417. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  418. const char *prop;
  419. const char *name;
  420. const char *slash;
  421. int len, val;
  422. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  423. debug(" - %s, %s\n", name, prop);
  424. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  425. strncmp(name, base, base_len))
  426. continue;
  427. slash = strrchr(prop, '/');
  428. if (strcmp(slash + 1, find_name))
  429. continue;
  430. val = trailing_strtol(name);
  431. if (val != -1) {
  432. *seqp = val;
  433. debug("Found seq %d\n", *seqp);
  434. return 0;
  435. }
  436. }
  437. debug("Not found\n");
  438. return -ENOENT;
  439. }
  440. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  441. {
  442. int base_len = strlen(base);
  443. int prop_offset;
  444. int aliases;
  445. int max = -1;
  446. debug("Looking for highest alias id for '%s'\n", base);
  447. aliases = fdt_path_offset(blob, "/aliases");
  448. for (prop_offset = fdt_first_property_offset(blob, aliases);
  449. prop_offset > 0;
  450. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  451. const char *prop;
  452. const char *name;
  453. int len, val;
  454. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  455. debug(" - %s, %s\n", name, prop);
  456. if (*prop != '/' || prop[len - 1] ||
  457. strncmp(name, base, base_len))
  458. continue;
  459. val = trailing_strtol(name);
  460. if (val > max) {
  461. debug("Found seq %d\n", val);
  462. max = val;
  463. }
  464. }
  465. return max;
  466. }
  467. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  468. {
  469. int chosen_node;
  470. if (!blob)
  471. return NULL;
  472. chosen_node = fdt_path_offset(blob, "/chosen");
  473. return fdt_getprop(blob, chosen_node, name, NULL);
  474. }
  475. int fdtdec_get_chosen_node(const void *blob, const char *name)
  476. {
  477. const char *prop;
  478. prop = fdtdec_get_chosen_prop(blob, name);
  479. if (!prop)
  480. return -FDT_ERR_NOTFOUND;
  481. return fdt_path_offset(blob, prop);
  482. }
  483. int fdtdec_check_fdt(void)
  484. {
  485. /*
  486. * We must have an FDT, but we cannot panic() yet since the console
  487. * is not ready. So for now, just assert(). Boards which need an early
  488. * FDT (prior to console ready) will need to make their own
  489. * arrangements and do their own checks.
  490. */
  491. assert(!fdtdec_prepare_fdt());
  492. return 0;
  493. }
  494. /*
  495. * This function is a little odd in that it accesses global data. At some
  496. * point if the architecture board.c files merge this will make more sense.
  497. * Even now, it is common code.
  498. */
  499. int fdtdec_prepare_fdt(void)
  500. {
  501. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  502. fdt_check_header(gd->fdt_blob)) {
  503. #ifdef CONFIG_SPL_BUILD
  504. puts("Missing DTB\n");
  505. #else
  506. puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
  507. # ifdef DEBUG
  508. if (gd->fdt_blob) {
  509. printf("fdt_blob=%p\n", gd->fdt_blob);
  510. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  511. 32, 0);
  512. }
  513. # endif
  514. #endif
  515. return -1;
  516. }
  517. return 0;
  518. }
  519. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  520. {
  521. const u32 *phandle;
  522. int lookup;
  523. debug("%s: %s\n", __func__, prop_name);
  524. phandle = fdt_getprop(blob, node, prop_name, NULL);
  525. if (!phandle)
  526. return -FDT_ERR_NOTFOUND;
  527. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  528. return lookup;
  529. }
  530. /**
  531. * Look up a property in a node and check that it has a minimum length.
  532. *
  533. * @param blob FDT blob
  534. * @param node node to examine
  535. * @param prop_name name of property to find
  536. * @param min_len minimum property length in bytes
  537. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  538. found, or -FDT_ERR_BADLAYOUT if not enough data
  539. * @return pointer to cell, which is only valid if err == 0
  540. */
  541. static const void *get_prop_check_min_len(const void *blob, int node,
  542. const char *prop_name, int min_len,
  543. int *err)
  544. {
  545. const void *cell;
  546. int len;
  547. debug("%s: %s\n", __func__, prop_name);
  548. cell = fdt_getprop(blob, node, prop_name, &len);
  549. if (!cell)
  550. *err = -FDT_ERR_NOTFOUND;
  551. else if (len < min_len)
  552. *err = -FDT_ERR_BADLAYOUT;
  553. else
  554. *err = 0;
  555. return cell;
  556. }
  557. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  558. u32 *array, int count)
  559. {
  560. const u32 *cell;
  561. int err = 0;
  562. debug("%s: %s\n", __func__, prop_name);
  563. cell = get_prop_check_min_len(blob, node, prop_name,
  564. sizeof(u32) * count, &err);
  565. if (!err) {
  566. int i;
  567. for (i = 0; i < count; i++)
  568. array[i] = fdt32_to_cpu(cell[i]);
  569. }
  570. return err;
  571. }
  572. int fdtdec_get_int_array_count(const void *blob, int node,
  573. const char *prop_name, u32 *array, int count)
  574. {
  575. const u32 *cell;
  576. int len, elems;
  577. int i;
  578. debug("%s: %s\n", __func__, prop_name);
  579. cell = fdt_getprop(blob, node, prop_name, &len);
  580. if (!cell)
  581. return -FDT_ERR_NOTFOUND;
  582. elems = len / sizeof(u32);
  583. if (count > elems)
  584. count = elems;
  585. for (i = 0; i < count; i++)
  586. array[i] = fdt32_to_cpu(cell[i]);
  587. return count;
  588. }
  589. const u32 *fdtdec_locate_array(const void *blob, int node,
  590. const char *prop_name, int count)
  591. {
  592. const u32 *cell;
  593. int err;
  594. cell = get_prop_check_min_len(blob, node, prop_name,
  595. sizeof(u32) * count, &err);
  596. return err ? NULL : cell;
  597. }
  598. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  599. {
  600. const s32 *cell;
  601. int len;
  602. debug("%s: %s\n", __func__, prop_name);
  603. cell = fdt_getprop(blob, node, prop_name, &len);
  604. return cell != NULL;
  605. }
  606. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  607. const char *list_name,
  608. const char *cells_name,
  609. int cell_count, int index,
  610. struct fdtdec_phandle_args *out_args)
  611. {
  612. const __be32 *list, *list_end;
  613. int rc = 0, size, cur_index = 0;
  614. uint32_t count = 0;
  615. int node = -1;
  616. int phandle;
  617. /* Retrieve the phandle list property */
  618. list = fdt_getprop(blob, src_node, list_name, &size);
  619. if (!list)
  620. return -ENOENT;
  621. list_end = list + size / sizeof(*list);
  622. /* Loop over the phandles until all the requested entry is found */
  623. while (list < list_end) {
  624. rc = -EINVAL;
  625. count = 0;
  626. /*
  627. * If phandle is 0, then it is an empty entry with no
  628. * arguments. Skip forward to the next entry.
  629. */
  630. phandle = be32_to_cpup(list++);
  631. if (phandle) {
  632. /*
  633. * Find the provider node and parse the #*-cells
  634. * property to determine the argument length.
  635. *
  636. * This is not needed if the cell count is hard-coded
  637. * (i.e. cells_name not set, but cell_count is set),
  638. * except when we're going to return the found node
  639. * below.
  640. */
  641. if (cells_name || cur_index == index) {
  642. node = fdt_node_offset_by_phandle(blob,
  643. phandle);
  644. if (!node) {
  645. debug("%s: could not find phandle\n",
  646. fdt_get_name(blob, src_node,
  647. NULL));
  648. goto err;
  649. }
  650. }
  651. if (cells_name) {
  652. count = fdtdec_get_int(blob, node, cells_name,
  653. -1);
  654. if (count == -1) {
  655. debug("%s: could not get %s for %s\n",
  656. fdt_get_name(blob, src_node,
  657. NULL),
  658. cells_name,
  659. fdt_get_name(blob, node,
  660. NULL));
  661. goto err;
  662. }
  663. } else {
  664. count = cell_count;
  665. }
  666. /*
  667. * Make sure that the arguments actually fit in the
  668. * remaining property data length
  669. */
  670. if (list + count > list_end) {
  671. debug("%s: arguments longer than property\n",
  672. fdt_get_name(blob, src_node, NULL));
  673. goto err;
  674. }
  675. }
  676. /*
  677. * All of the error cases above bail out of the loop, so at
  678. * this point, the parsing is successful. If the requested
  679. * index matches, then fill the out_args structure and return,
  680. * or return -ENOENT for an empty entry.
  681. */
  682. rc = -ENOENT;
  683. if (cur_index == index) {
  684. if (!phandle)
  685. goto err;
  686. if (out_args) {
  687. int i;
  688. if (count > MAX_PHANDLE_ARGS) {
  689. debug("%s: too many arguments %d\n",
  690. fdt_get_name(blob, src_node,
  691. NULL), count);
  692. count = MAX_PHANDLE_ARGS;
  693. }
  694. out_args->node = node;
  695. out_args->args_count = count;
  696. for (i = 0; i < count; i++) {
  697. out_args->args[i] =
  698. be32_to_cpup(list++);
  699. }
  700. }
  701. /* Found it! return success */
  702. return 0;
  703. }
  704. node = -1;
  705. list += count;
  706. cur_index++;
  707. }
  708. /*
  709. * Result will be one of:
  710. * -ENOENT : index is for empty phandle
  711. * -EINVAL : parsing error on data
  712. * [1..n] : Number of phandle (count mode; when index = -1)
  713. */
  714. rc = index < 0 ? cur_index : -ENOENT;
  715. err:
  716. return rc;
  717. }
  718. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  719. u8 *array, int count)
  720. {
  721. const u8 *cell;
  722. int err;
  723. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  724. if (!err)
  725. memcpy(array, cell, count);
  726. return err;
  727. }
  728. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  729. const char *prop_name, int count)
  730. {
  731. const u8 *cell;
  732. int err;
  733. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  734. if (err)
  735. return NULL;
  736. return cell;
  737. }
  738. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  739. int default_val)
  740. {
  741. int config_node;
  742. debug("%s: %s\n", __func__, prop_name);
  743. config_node = fdt_path_offset(blob, "/config");
  744. if (config_node < 0)
  745. return default_val;
  746. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  747. }
  748. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  749. {
  750. int config_node;
  751. const void *prop;
  752. debug("%s: %s\n", __func__, prop_name);
  753. config_node = fdt_path_offset(blob, "/config");
  754. if (config_node < 0)
  755. return 0;
  756. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  757. return prop != NULL;
  758. }
  759. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  760. {
  761. const char *nodep;
  762. int nodeoffset;
  763. int len;
  764. debug("%s: %s\n", __func__, prop_name);
  765. nodeoffset = fdt_path_offset(blob, "/config");
  766. if (nodeoffset < 0)
  767. return NULL;
  768. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  769. if (!nodep)
  770. return NULL;
  771. return (char *)nodep;
  772. }
  773. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  774. {
  775. u64 number = 0;
  776. while (cells--)
  777. number = (number << 32) | fdt32_to_cpu(*ptr++);
  778. return number;
  779. }
  780. int fdt_get_resource(const void *fdt, int node, const char *property,
  781. unsigned int index, struct fdt_resource *res)
  782. {
  783. const fdt32_t *ptr, *end;
  784. int na, ns, len, parent;
  785. unsigned int i = 0;
  786. parent = fdt_parent_offset(fdt, node);
  787. if (parent < 0)
  788. return parent;
  789. na = fdt_address_cells(fdt, parent);
  790. ns = fdt_size_cells(fdt, parent);
  791. ptr = fdt_getprop(fdt, node, property, &len);
  792. if (!ptr)
  793. return len;
  794. end = ptr + len / sizeof(*ptr);
  795. while (ptr + na + ns <= end) {
  796. if (i == index) {
  797. res->start = fdtdec_get_number(ptr, na);
  798. res->end = res->start;
  799. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  800. return 0;
  801. }
  802. ptr += na + ns;
  803. i++;
  804. }
  805. return -FDT_ERR_NOTFOUND;
  806. }
  807. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  808. const char *prop_names, const char *name,
  809. struct fdt_resource *res)
  810. {
  811. int index;
  812. index = fdt_stringlist_search(fdt, node, prop_names, name);
  813. if (index < 0)
  814. return index;
  815. return fdt_get_resource(fdt, node, property, index, res);
  816. }
  817. static int decode_timing_property(const void *blob, int node, const char *name,
  818. struct timing_entry *result)
  819. {
  820. int length, ret = 0;
  821. const u32 *prop;
  822. prop = fdt_getprop(blob, node, name, &length);
  823. if (!prop) {
  824. debug("%s: could not find property %s\n",
  825. fdt_get_name(blob, node, NULL), name);
  826. return length;
  827. }
  828. if (length == sizeof(u32)) {
  829. result->typ = fdtdec_get_int(blob, node, name, 0);
  830. result->min = result->typ;
  831. result->max = result->typ;
  832. } else {
  833. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  834. }
  835. return ret;
  836. }
  837. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  838. struct display_timing *dt)
  839. {
  840. int i, node, timings_node;
  841. u32 val = 0;
  842. int ret = 0;
  843. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  844. if (timings_node < 0)
  845. return timings_node;
  846. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  847. node > 0 && i != index;
  848. node = fdt_next_subnode(blob, node))
  849. i++;
  850. if (node < 0)
  851. return node;
  852. memset(dt, 0, sizeof(*dt));
  853. ret |= decode_timing_property(blob, node, "hback-porch",
  854. &dt->hback_porch);
  855. ret |= decode_timing_property(blob, node, "hfront-porch",
  856. &dt->hfront_porch);
  857. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  858. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  859. ret |= decode_timing_property(blob, node, "vback-porch",
  860. &dt->vback_porch);
  861. ret |= decode_timing_property(blob, node, "vfront-porch",
  862. &dt->vfront_porch);
  863. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  864. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  865. ret |= decode_timing_property(blob, node, "clock-frequency",
  866. &dt->pixelclock);
  867. dt->flags = 0;
  868. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  869. if (val != -1) {
  870. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  871. DISPLAY_FLAGS_VSYNC_LOW;
  872. }
  873. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  874. if (val != -1) {
  875. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  876. DISPLAY_FLAGS_HSYNC_LOW;
  877. }
  878. val = fdtdec_get_int(blob, node, "de-active", -1);
  879. if (val != -1) {
  880. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  881. DISPLAY_FLAGS_DE_LOW;
  882. }
  883. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  884. if (val != -1) {
  885. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  886. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  887. }
  888. if (fdtdec_get_bool(blob, node, "interlaced"))
  889. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  890. if (fdtdec_get_bool(blob, node, "doublescan"))
  891. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  892. if (fdtdec_get_bool(blob, node, "doubleclk"))
  893. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  894. return ret;
  895. }
  896. int fdtdec_setup_mem_size_base(void)
  897. {
  898. int ret;
  899. ofnode mem;
  900. struct resource res;
  901. mem = ofnode_path("/memory");
  902. if (!ofnode_valid(mem)) {
  903. debug("%s: Missing /memory node\n", __func__);
  904. return -EINVAL;
  905. }
  906. ret = ofnode_read_resource(mem, 0, &res);
  907. if (ret != 0) {
  908. debug("%s: Unable to decode first memory bank\n", __func__);
  909. return -EINVAL;
  910. }
  911. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  912. gd->ram_base = (unsigned long)res.start;
  913. debug("%s: Initial DRAM size %llx\n", __func__,
  914. (unsigned long long)gd->ram_size);
  915. return 0;
  916. }
  917. ofnode get_next_memory_node(ofnode mem)
  918. {
  919. do {
  920. mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
  921. } while (!ofnode_is_available(mem));
  922. return mem;
  923. }
  924. int fdtdec_setup_memory_banksize(void)
  925. {
  926. int bank, ret, reg = 0;
  927. struct resource res;
  928. ofnode mem = ofnode_null();
  929. mem = get_next_memory_node(mem);
  930. if (!ofnode_valid(mem)) {
  931. debug("%s: Missing /memory node\n", __func__);
  932. return -EINVAL;
  933. }
  934. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  935. ret = ofnode_read_resource(mem, reg++, &res);
  936. if (ret < 0) {
  937. reg = 0;
  938. mem = get_next_memory_node(mem);
  939. if (!ofnode_valid(mem))
  940. break;
  941. ret = ofnode_read_resource(mem, reg++, &res);
  942. if (ret < 0)
  943. break;
  944. }
  945. if (ret != 0)
  946. return -EINVAL;
  947. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  948. gd->bd->bi_dram[bank].size =
  949. (phys_size_t)(res.end - res.start + 1);
  950. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  951. __func__, bank,
  952. (unsigned long long)gd->bd->bi_dram[bank].start,
  953. (unsigned long long)gd->bd->bi_dram[bank].size);
  954. }
  955. return 0;
  956. }
  957. int fdtdec_setup_mem_size_base_lowest(void)
  958. {
  959. int bank, ret, reg = 0;
  960. struct resource res;
  961. unsigned long base;
  962. phys_size_t size;
  963. ofnode mem = ofnode_null();
  964. gd->ram_base = (unsigned long)~0;
  965. mem = get_next_memory_node(mem);
  966. if (!ofnode_valid(mem)) {
  967. debug("%s: Missing /memory node\n", __func__);
  968. return -EINVAL;
  969. }
  970. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  971. ret = ofnode_read_resource(mem, reg++, &res);
  972. if (ret < 0) {
  973. reg = 0;
  974. mem = get_next_memory_node(mem);
  975. if (!ofnode_valid(mem))
  976. break;
  977. ret = ofnode_read_resource(mem, reg++, &res);
  978. if (ret < 0)
  979. break;
  980. }
  981. if (ret != 0)
  982. return -EINVAL;
  983. base = (unsigned long)res.start;
  984. size = (phys_size_t)(res.end - res.start + 1);
  985. if (gd->ram_base > base && size) {
  986. gd->ram_base = base;
  987. gd->ram_size = size;
  988. debug("%s: Initial DRAM base %lx size %lx\n",
  989. __func__, base, (unsigned long)size);
  990. }
  991. }
  992. return 0;
  993. }
  994. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  995. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  996. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  997. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  998. {
  999. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  1000. bool gzip = 0, lzo = 0;
  1001. ulong sz_in = sz_src;
  1002. void *dst;
  1003. int rc;
  1004. if (CONFIG_IS_ENABLED(GZIP))
  1005. if (gzip_parse_header(src, sz_in) >= 0)
  1006. gzip = 1;
  1007. if (CONFIG_IS_ENABLED(LZO))
  1008. if (!gzip && lzop_is_valid_header(src))
  1009. lzo = 1;
  1010. if (!gzip && !lzo)
  1011. return -EBADMSG;
  1012. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1013. dst = malloc(sz_out);
  1014. if (!dst) {
  1015. puts("uncompress_blob: Unable to allocate memory\n");
  1016. return -ENOMEM;
  1017. }
  1018. } else {
  1019. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1020. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1021. # else
  1022. return -ENOTSUPP;
  1023. # endif
  1024. }
  1025. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1026. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1027. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1028. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1029. else
  1030. hang();
  1031. if (rc < 0) {
  1032. /* not a valid compressed blob */
  1033. puts("uncompress_blob: Unable to uncompress\n");
  1034. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1035. free(dst);
  1036. return -EBADMSG;
  1037. }
  1038. *dstp = dst;
  1039. return 0;
  1040. }
  1041. # else
  1042. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1043. {
  1044. *dstp = (void *)src;
  1045. return 0;
  1046. }
  1047. # endif
  1048. #endif
  1049. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1050. /*
  1051. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1052. * provide and/or fixup the fdt.
  1053. */
  1054. __weak void *board_fdt_blob_setup(void)
  1055. {
  1056. void *fdt_blob = NULL;
  1057. #ifdef CONFIG_SPL_BUILD
  1058. /* FDT is at end of BSS unless it is in a different memory region */
  1059. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1060. fdt_blob = (ulong *)&_image_binary_end;
  1061. else
  1062. fdt_blob = (ulong *)&__bss_end;
  1063. #else
  1064. /* FDT is at end of image */
  1065. fdt_blob = (ulong *)&_end;
  1066. #endif
  1067. return fdt_blob;
  1068. }
  1069. #endif
  1070. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1071. {
  1072. const char *path;
  1073. int offset, err;
  1074. if (!is_valid_ethaddr(mac))
  1075. return -EINVAL;
  1076. path = fdt_get_alias(fdt, "ethernet");
  1077. if (!path)
  1078. return 0;
  1079. debug("ethernet alias found: %s\n", path);
  1080. offset = fdt_path_offset(fdt, path);
  1081. if (offset < 0) {
  1082. debug("ethernet alias points to absent node %s\n", path);
  1083. return -ENOENT;
  1084. }
  1085. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1086. if (err < 0)
  1087. return err;
  1088. debug("MAC address: %pM\n", mac);
  1089. return 0;
  1090. }
  1091. static int fdtdec_init_reserved_memory(void *blob)
  1092. {
  1093. int na, ns, node, err;
  1094. fdt32_t value;
  1095. /* inherit #address-cells and #size-cells from the root node */
  1096. na = fdt_address_cells(blob, 0);
  1097. ns = fdt_size_cells(blob, 0);
  1098. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1099. if (node < 0)
  1100. return node;
  1101. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1102. if (err < 0)
  1103. return err;
  1104. value = cpu_to_fdt32(ns);
  1105. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1106. if (err < 0)
  1107. return err;
  1108. value = cpu_to_fdt32(na);
  1109. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1110. if (err < 0)
  1111. return err;
  1112. return node;
  1113. }
  1114. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1115. const struct fdt_memory *carveout,
  1116. uint32_t *phandlep, bool no_map)
  1117. {
  1118. fdt32_t cells[4] = {}, *ptr = cells;
  1119. uint32_t upper, lower, phandle;
  1120. int parent, node, na, ns, err;
  1121. fdt_size_t size;
  1122. char name[64];
  1123. /* create an empty /reserved-memory node if one doesn't exist */
  1124. parent = fdt_path_offset(blob, "/reserved-memory");
  1125. if (parent < 0) {
  1126. parent = fdtdec_init_reserved_memory(blob);
  1127. if (parent < 0)
  1128. return parent;
  1129. }
  1130. /* only 1 or 2 #address-cells and #size-cells are supported */
  1131. na = fdt_address_cells(blob, parent);
  1132. if (na < 1 || na > 2)
  1133. return -FDT_ERR_BADNCELLS;
  1134. ns = fdt_size_cells(blob, parent);
  1135. if (ns < 1 || ns > 2)
  1136. return -FDT_ERR_BADNCELLS;
  1137. /* find a matching node and return the phandle to that */
  1138. fdt_for_each_subnode(node, blob, parent) {
  1139. const char *name = fdt_get_name(blob, node, NULL);
  1140. fdt_addr_t addr;
  1141. fdt_size_t size;
  1142. addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
  1143. &size, false);
  1144. if (addr == FDT_ADDR_T_NONE) {
  1145. debug("failed to read address/size for %s\n", name);
  1146. continue;
  1147. }
  1148. if (addr == carveout->start && (addr + size - 1) ==
  1149. carveout->end) {
  1150. if (phandlep)
  1151. *phandlep = fdt_get_phandle(blob, node);
  1152. return 0;
  1153. }
  1154. }
  1155. /*
  1156. * Unpack the start address and generate the name of the new node
  1157. * base on the basename and the unit-address.
  1158. */
  1159. upper = upper_32_bits(carveout->start);
  1160. lower = lower_32_bits(carveout->start);
  1161. if (na > 1 && upper > 0)
  1162. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1163. lower);
  1164. else {
  1165. if (upper > 0) {
  1166. debug("address %08x:%08x exceeds addressable space\n",
  1167. upper, lower);
  1168. return -FDT_ERR_BADVALUE;
  1169. }
  1170. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1171. }
  1172. node = fdt_add_subnode(blob, parent, name);
  1173. if (node < 0)
  1174. return node;
  1175. if (phandlep) {
  1176. err = fdt_generate_phandle(blob, &phandle);
  1177. if (err < 0)
  1178. return err;
  1179. err = fdtdec_set_phandle(blob, node, phandle);
  1180. if (err < 0)
  1181. return err;
  1182. }
  1183. /* store one or two address cells */
  1184. if (na > 1)
  1185. *ptr++ = cpu_to_fdt32(upper);
  1186. *ptr++ = cpu_to_fdt32(lower);
  1187. /* store one or two size cells */
  1188. size = carveout->end - carveout->start + 1;
  1189. upper = upper_32_bits(size);
  1190. lower = lower_32_bits(size);
  1191. if (ns > 1)
  1192. *ptr++ = cpu_to_fdt32(upper);
  1193. *ptr++ = cpu_to_fdt32(lower);
  1194. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1195. if (err < 0)
  1196. return err;
  1197. if (no_map) {
  1198. err = fdt_setprop(blob, node, "no-map", NULL, 0);
  1199. if (err < 0)
  1200. return err;
  1201. }
  1202. /* return the phandle for the new node for the caller to use */
  1203. if (phandlep)
  1204. *phandlep = phandle;
  1205. return 0;
  1206. }
  1207. int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
  1208. unsigned int index, struct fdt_memory *carveout)
  1209. {
  1210. const fdt32_t *prop;
  1211. uint32_t phandle;
  1212. int offset, len;
  1213. fdt_size_t size;
  1214. offset = fdt_path_offset(blob, node);
  1215. if (offset < 0)
  1216. return offset;
  1217. prop = fdt_getprop(blob, offset, name, &len);
  1218. if (!prop) {
  1219. debug("failed to get %s for %s\n", name, node);
  1220. return -FDT_ERR_NOTFOUND;
  1221. }
  1222. if ((len % sizeof(phandle)) != 0) {
  1223. debug("invalid phandle property\n");
  1224. return -FDT_ERR_BADPHANDLE;
  1225. }
  1226. if (len < (sizeof(phandle) * (index + 1))) {
  1227. debug("invalid phandle index\n");
  1228. return -FDT_ERR_BADPHANDLE;
  1229. }
  1230. phandle = fdt32_to_cpu(prop[index]);
  1231. offset = fdt_node_offset_by_phandle(blob, phandle);
  1232. if (offset < 0) {
  1233. debug("failed to find node for phandle %u\n", phandle);
  1234. return offset;
  1235. }
  1236. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1237. "reg", 0, &size,
  1238. true);
  1239. if (carveout->start == FDT_ADDR_T_NONE) {
  1240. debug("failed to read address/size from \"reg\" property\n");
  1241. return -FDT_ERR_NOTFOUND;
  1242. }
  1243. carveout->end = carveout->start + size - 1;
  1244. return 0;
  1245. }
  1246. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1247. unsigned int index, const char *name,
  1248. const struct fdt_memory *carveout)
  1249. {
  1250. uint32_t phandle;
  1251. int err, offset, len;
  1252. fdt32_t value;
  1253. void *prop;
  1254. err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle, false);
  1255. if (err < 0) {
  1256. debug("failed to add reserved memory: %d\n", err);
  1257. return err;
  1258. }
  1259. offset = fdt_path_offset(blob, node);
  1260. if (offset < 0) {
  1261. debug("failed to find offset for node %s: %d\n", node, offset);
  1262. return offset;
  1263. }
  1264. value = cpu_to_fdt32(phandle);
  1265. if (!fdt_getprop(blob, offset, prop_name, &len)) {
  1266. if (len == -FDT_ERR_NOTFOUND)
  1267. len = 0;
  1268. else
  1269. return len;
  1270. }
  1271. if ((index + 1) * sizeof(value) > len) {
  1272. err = fdt_setprop_placeholder(blob, offset, prop_name,
  1273. (index + 1) * sizeof(value),
  1274. &prop);
  1275. if (err < 0) {
  1276. debug("failed to resize reserved memory property: %s\n",
  1277. fdt_strerror(err));
  1278. return err;
  1279. }
  1280. }
  1281. err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
  1282. strlen(prop_name),
  1283. index * sizeof(value),
  1284. &value, sizeof(value));
  1285. if (err < 0) {
  1286. debug("failed to update %s property for node %s: %s\n",
  1287. prop_name, node, fdt_strerror(err));
  1288. return err;
  1289. }
  1290. return 0;
  1291. }
  1292. __weak int fdtdec_board_setup(const void *fdt_blob)
  1293. {
  1294. return 0;
  1295. }
  1296. int fdtdec_setup(void)
  1297. {
  1298. int ret;
  1299. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1300. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1301. void *fdt_blob;
  1302. # endif
  1303. # ifdef CONFIG_OF_EMBED
  1304. /* Get a pointer to the FDT */
  1305. # ifdef CONFIG_SPL_BUILD
  1306. gd->fdt_blob = __dtb_dt_spl_begin;
  1307. # else
  1308. gd->fdt_blob = __dtb_dt_begin;
  1309. # endif
  1310. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1311. /* Allow the board to override the fdt address. */
  1312. gd->fdt_blob = board_fdt_blob_setup();
  1313. # elif defined(CONFIG_OF_HOSTFILE)
  1314. if (sandbox_read_fdt_from_file()) {
  1315. puts("Failed to read control FDT\n");
  1316. return -1;
  1317. }
  1318. # elif defined(CONFIG_OF_PRIOR_STAGE)
  1319. gd->fdt_blob = (void *)prior_stage_fdt_address;
  1320. # endif
  1321. # ifndef CONFIG_SPL_BUILD
  1322. /* Allow the early environment to override the fdt address */
  1323. gd->fdt_blob = map_sysmem
  1324. (env_get_ulong("fdtcontroladdr", 16,
  1325. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1326. # endif
  1327. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1328. /*
  1329. * Try and uncompress the blob.
  1330. * Unfortunately there is no way to know how big the input blob really
  1331. * is. So let us set the maximum input size arbitrarily high. 16MB
  1332. * ought to be more than enough for packed DTBs.
  1333. */
  1334. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1335. gd->fdt_blob = fdt_blob;
  1336. /*
  1337. * Check if blob is a FIT images containings DTBs.
  1338. * If so, pick the most relevant
  1339. */
  1340. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1341. if (fdt_blob) {
  1342. gd->multi_dtb_fit = gd->fdt_blob;
  1343. gd->fdt_blob = fdt_blob;
  1344. }
  1345. # endif
  1346. #endif
  1347. ret = fdtdec_prepare_fdt();
  1348. if (!ret)
  1349. ret = fdtdec_board_setup(gd->fdt_blob);
  1350. return ret;
  1351. }
  1352. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1353. int fdtdec_resetup(int *rescan)
  1354. {
  1355. void *fdt_blob;
  1356. /*
  1357. * If the current DTB is part of a compressed FIT image,
  1358. * try to locate the best match from the uncompressed
  1359. * FIT image stillpresent there. Save the time and space
  1360. * required to uncompress it again.
  1361. */
  1362. if (gd->multi_dtb_fit) {
  1363. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1364. if (fdt_blob == gd->fdt_blob) {
  1365. /*
  1366. * The best match did not change. no need to tear down
  1367. * the DM and rescan the fdt.
  1368. */
  1369. *rescan = 0;
  1370. return 0;
  1371. }
  1372. *rescan = 1;
  1373. gd->fdt_blob = fdt_blob;
  1374. return fdtdec_prepare_fdt();
  1375. }
  1376. /*
  1377. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1378. * not a FIT image containings DTB, but a single DTB. There is no need
  1379. * to teard down DM and rescan the DT in this case.
  1380. */
  1381. *rescan = 0;
  1382. return 0;
  1383. }
  1384. #endif
  1385. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1386. phys_addr_t *basep, phys_size_t *sizep,
  1387. struct bd_info *bd)
  1388. {
  1389. int addr_cells, size_cells;
  1390. const u32 *cell, *end;
  1391. u64 total_size, size, addr;
  1392. int node, child;
  1393. bool auto_size;
  1394. int bank;
  1395. int len;
  1396. debug("%s: board_id=%d\n", __func__, board_id);
  1397. if (!area)
  1398. area = "/memory";
  1399. node = fdt_path_offset(blob, area);
  1400. if (node < 0) {
  1401. debug("No %s node found\n", area);
  1402. return -ENOENT;
  1403. }
  1404. cell = fdt_getprop(blob, node, "reg", &len);
  1405. if (!cell) {
  1406. debug("No reg property found\n");
  1407. return -ENOENT;
  1408. }
  1409. addr_cells = fdt_address_cells(blob, node);
  1410. size_cells = fdt_size_cells(blob, node);
  1411. /* Check the board id and mask */
  1412. for (child = fdt_first_subnode(blob, node);
  1413. child >= 0;
  1414. child = fdt_next_subnode(blob, child)) {
  1415. int match_mask, match_value;
  1416. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1417. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1418. if (match_value >= 0 &&
  1419. ((board_id & match_mask) == match_value)) {
  1420. /* Found matching mask */
  1421. debug("Found matching mask %d\n", match_mask);
  1422. node = child;
  1423. cell = fdt_getprop(blob, node, "reg", &len);
  1424. if (!cell) {
  1425. debug("No memory-banks property found\n");
  1426. return -EINVAL;
  1427. }
  1428. break;
  1429. }
  1430. }
  1431. /* Note: if no matching subnode was found we use the parent node */
  1432. if (bd) {
  1433. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1434. CONFIG_NR_DRAM_BANKS);
  1435. }
  1436. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1437. total_size = 0;
  1438. end = cell + len / 4 - addr_cells - size_cells;
  1439. debug("cell at %p, end %p\n", cell, end);
  1440. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1441. if (cell > end)
  1442. break;
  1443. addr = 0;
  1444. if (addr_cells == 2)
  1445. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1446. addr += fdt32_to_cpu(*cell++);
  1447. if (bd)
  1448. bd->bi_dram[bank].start = addr;
  1449. if (basep && !bank)
  1450. *basep = (phys_addr_t)addr;
  1451. size = 0;
  1452. if (size_cells == 2)
  1453. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1454. size += fdt32_to_cpu(*cell++);
  1455. if (auto_size) {
  1456. u64 new_size;
  1457. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1458. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1459. if (new_size == size) {
  1460. debug("OK\n");
  1461. } else {
  1462. debug("sized to %llx\n", new_size);
  1463. size = new_size;
  1464. }
  1465. }
  1466. if (bd)
  1467. bd->bi_dram[bank].size = size;
  1468. total_size += size;
  1469. }
  1470. debug("Memory size %llu\n", total_size);
  1471. if (sizep)
  1472. *sizep = (phys_size_t)total_size;
  1473. return 0;
  1474. }
  1475. #endif /* !USE_HOSTCC */