cfi_flash.h 5.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2009
  4. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  5. */
  6. #ifndef __CFI_FLASH_H__
  7. #define __CFI_FLASH_H__
  8. #define FLASH_CMD_CFI 0x98
  9. #define FLASH_CMD_READ_ID 0x90
  10. #define FLASH_CMD_RESET 0xff
  11. #define FLASH_CMD_BLOCK_ERASE 0x20
  12. #define FLASH_CMD_ERASE_CONFIRM 0xD0
  13. #define FLASH_CMD_WRITE 0x40
  14. #define FLASH_CMD_PROTECT 0x60
  15. #define FLASH_CMD_SETUP 0x60
  16. #define FLASH_CMD_SET_CR_CONFIRM 0x03
  17. #define FLASH_CMD_PROTECT_SET 0x01
  18. #define FLASH_CMD_PROTECT_CLEAR 0xD0
  19. #define FLASH_CMD_CLEAR_STATUS 0x50
  20. #define FLASH_CMD_READ_STATUS 0x70
  21. #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
  22. #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
  23. #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
  24. #define FLASH_STATUS_DONE 0x80
  25. #define FLASH_STATUS_ESS 0x40
  26. #define FLASH_STATUS_ECLBS 0x20
  27. #define FLASH_STATUS_PSLBS 0x10
  28. #define FLASH_STATUS_VPENS 0x08
  29. #define FLASH_STATUS_PSS 0x04
  30. #define FLASH_STATUS_DPS 0x02
  31. #define FLASH_STATUS_R 0x01
  32. #define FLASH_STATUS_PROTECT 0x01
  33. #define AMD_CMD_RESET 0xF0
  34. #define AMD_CMD_WRITE 0xA0
  35. #define AMD_CMD_ERASE_START 0x80
  36. #define AMD_CMD_ERASE_SECTOR 0x30
  37. #define AMD_CMD_UNLOCK_START 0xAA
  38. #define AMD_CMD_UNLOCK_ACK 0x55
  39. #define AMD_CMD_WRITE_TO_BUFFER 0x25
  40. #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
  41. #define AMD_CMD_SET_PPB_ENTRY 0xC0
  42. #define AMD_CMD_SET_PPB_EXIT_BC1 0x90
  43. #define AMD_CMD_SET_PPB_EXIT_BC2 0x00
  44. #define AMD_CMD_PPB_UNLOCK_BC1 0x80
  45. #define AMD_CMD_PPB_UNLOCK_BC2 0x30
  46. #define AMD_CMD_PPB_LOCK_BC1 0xA0
  47. #define AMD_CMD_PPB_LOCK_BC2 0x00
  48. #define AMD_STATUS_TOGGLE 0x40
  49. #define AMD_STATUS_ERROR 0x20
  50. #define ATM_CMD_UNLOCK_SECT 0x70
  51. #define ATM_CMD_SOFTLOCK_START 0x80
  52. #define ATM_CMD_LOCK_SECT 0x40
  53. #define FLASH_CONTINUATION_CODE 0x7F
  54. #define FLASH_OFFSET_MANUFACTURER_ID 0x00
  55. #define FLASH_OFFSET_DEVICE_ID 0x01
  56. #define FLASH_OFFSET_LOWER_SW_BITS 0x0C
  57. #define FLASH_OFFSET_DEVICE_ID2 0x0E
  58. #define FLASH_OFFSET_DEVICE_ID3 0x0F
  59. #define FLASH_OFFSET_CFI 0x55
  60. #define FLASH_OFFSET_CFI_ALT 0x555
  61. #define FLASH_OFFSET_CFI_RESP 0x10
  62. #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
  63. /* extended query table primary address */
  64. #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
  65. #define FLASH_OFFSET_WTOUT 0x1F
  66. #define FLASH_OFFSET_WBTOUT 0x20
  67. #define FLASH_OFFSET_ETOUT 0x21
  68. #define FLASH_OFFSET_CETOUT 0x22
  69. #define FLASH_OFFSET_WMAX_TOUT 0x23
  70. #define FLASH_OFFSET_WBMAX_TOUT 0x24
  71. #define FLASH_OFFSET_EMAX_TOUT 0x25
  72. #define FLASH_OFFSET_CEMAX_TOUT 0x26
  73. #define FLASH_OFFSET_SIZE 0x27
  74. #define FLASH_OFFSET_INTERFACE 0x28
  75. #define FLASH_OFFSET_BUFFER_SIZE 0x2A
  76. #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
  77. #define FLASH_OFFSET_ERASE_REGIONS 0x2D
  78. #define FLASH_OFFSET_PROTECT 0x02
  79. #define FLASH_OFFSET_USER_PROTECTION 0x85
  80. #define FLASH_OFFSET_INTEL_PROTECTION 0x81
  81. #define CFI_CMDSET_NONE 0
  82. #define CFI_CMDSET_INTEL_EXTENDED 1
  83. #define CFI_CMDSET_AMD_STANDARD 2
  84. #define CFI_CMDSET_INTEL_STANDARD 3
  85. #define CFI_CMDSET_AMD_EXTENDED 4
  86. #define CFI_CMDSET_MITSU_STANDARD 256
  87. #define CFI_CMDSET_MITSU_EXTENDED 257
  88. #define CFI_CMDSET_SST 258
  89. #define CFI_CMDSET_INTEL_PROG_REGIONS 512
  90. #ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
  91. # undef FLASH_CMD_RESET
  92. # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
  93. #endif
  94. #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
  95. typedef union {
  96. u8 w8;
  97. u16 w16;
  98. u32 w32;
  99. u64 w64;
  100. } cfiword_t;
  101. /* CFI standard query structure */
  102. /* The offsets and sizes of this packed structure members correspond
  103. * to the actual layout in CFI Flash chips. Some 16- and 32-bit members
  104. * are unaligned and must be accessed with explicit unaligned access macros.
  105. */
  106. struct cfi_qry {
  107. u8 qry[3];
  108. u16 p_id; /* unaligned */
  109. u16 p_adr; /* unaligned */
  110. u16 a_id; /* unaligned */
  111. u16 a_adr; /* unaligned */
  112. u8 vcc_min;
  113. u8 vcc_max;
  114. u8 vpp_min;
  115. u8 vpp_max;
  116. u8 word_write_timeout_typ;
  117. u8 buf_write_timeout_typ;
  118. u8 block_erase_timeout_typ;
  119. u8 chip_erase_timeout_typ;
  120. u8 word_write_timeout_max;
  121. u8 buf_write_timeout_max;
  122. u8 block_erase_timeout_max;
  123. u8 chip_erase_timeout_max;
  124. u8 dev_size;
  125. u16 interface_desc; /* aligned */
  126. u16 max_buf_write_size; /* aligned */
  127. u8 num_erase_regions;
  128. u32 erase_region_info[NUM_ERASE_REGIONS]; /* unaligned */
  129. } __attribute__((packed));
  130. struct cfi_pri_hdr {
  131. u8 pri[3];
  132. u8 major_version;
  133. u8 minor_version;
  134. } __attribute__((packed));
  135. #ifndef CONFIG_SYS_FLASH_BANKS_LIST
  136. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  137. #endif
  138. /*
  139. * CFI_MAX_FLASH_BANKS only used for flash_info struct declaration.
  140. *
  141. * Use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined
  142. */
  143. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  144. #define CONFIG_SYS_MAX_FLASH_BANKS (cfi_flash_num_flash_banks)
  145. #define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
  146. /* board code can update this variable before CFI detection */
  147. extern int cfi_flash_num_flash_banks;
  148. #else
  149. #define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
  150. #endif
  151. phys_addr_t cfi_flash_bank_addr(int i);
  152. unsigned long cfi_flash_bank_size(int i);
  153. void flash_cmd_reset(flash_info_t *info);
  154. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  155. void flash_write8(u8 value, void *addr);
  156. void flash_write16(u16 value, void *addr);
  157. void flash_write32(u32 value, void *addr);
  158. void flash_write64(u64 value, void *addr);
  159. u8 flash_read8(void *addr);
  160. u16 flash_read16(void *addr);
  161. u32 flash_read32(void *addr);
  162. u64 flash_read64(void *addr);
  163. #endif
  164. #endif /* __CFI_FLASH_H__ */