zynq_cse.h 765 B

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2013 - 2017 Xilinx.
  4. *
  5. * Configuration settings for the Xilinx Zynq CSE board.
  6. * See zynq-common.h for Zynq common configs
  7. */
  8. #ifndef __CONFIG_ZYNQ_CSE_H
  9. #define __CONFIG_ZYNQ_CSE_H
  10. #define CONFIG_SKIP_LOWLEVEL_INIT
  11. #include <configs/zynq-common.h>
  12. /* Undef unneeded configs */
  13. #undef CONFIG_EXTRA_ENV_SETTINGS
  14. #undef CONFIG_SYS_CBSIZE
  15. #define CONFIG_SYS_CBSIZE 1024
  16. #undef CONFIG_SYS_INIT_RAM_ADDR
  17. #undef CONFIG_SYS_INIT_RAM_SIZE
  18. #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000
  19. #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
  20. #undef CONFIG_SPL_BSS_START_ADDR
  21. #undef CONFIG_SPL_BSS_MAX_SIZE
  22. #define CONFIG_SPL_BSS_START_ADDR 0x20000
  23. #define CONFIG_SPL_BSS_MAX_SIZE 0x8000
  24. #endif /* __CONFIG_ZYNQ_CSE_H */