wb45n.h 3.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Configuation settings for the WB45N CPU Module.
  4. */
  5. #ifndef __CONFIG_H__
  6. #define __CONFIG_H__
  7. #include <asm/hardware.h>
  8. #include <linux/stringify.h>
  9. /* ARM asynchronous clock */
  10. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
  11. #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
  12. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  13. #define CONFIG_SETUP_MEMORY_TAGS
  14. #define CONFIG_INITRD_TAG
  15. #define CONFIG_SKIP_LOWLEVEL_INIT
  16. /* general purpose I/O */
  17. #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
  18. /* serial console */
  19. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  20. #define CONFIG_USART_ID ATMEL_ID_SYS
  21. /*
  22. * BOOTP options
  23. */
  24. #define CONFIG_BOOTP_BOOTFILESIZE
  25. /* SDRAM */
  26. #define CONFIG_SYS_SDRAM_BASE 0x20000000
  27. #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */
  28. #define CONFIG_SYS_INIT_SP_ADDR \
  29. (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  30. /* NAND flash */
  31. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  32. #define CONFIG_SYS_NAND_BASE 0x40000000
  33. /* our ALE is AD21 */
  34. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  35. /* our CLE is AD22 */
  36. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  37. #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
  38. #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
  39. #define CONFIG_RBTREE
  40. /* Ethernet */
  41. #define CONFIG_MACB
  42. #define CONFIG_RMII
  43. #define CONFIG_NET_RETRY_COUNT 20
  44. #define CONFIG_MACB_SEARCH_PHY
  45. #define CONFIG_ETHADDR C0:EE:40:00:00:00
  46. /* System */
  47. #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  48. #ifdef CONFIG_SYS_USE_NANDFLASH
  49. /* bootstrap + u-boot + env + linux in nandflash */
  50. #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \
  51. "run _mtd; bootm"
  52. #define MTDIDS_DEFAULT "nand0=atmel_nand"
  53. #define MTDPARTS_DEFAULT "mtdparts=atmel_nand:" \
  54. "128K(at91bs)," \
  55. "512K(u-boot)," \
  56. "128K(u-boot-env)," \
  57. "128K(redund-env)," \
  58. "2560K(kernel-a)," \
  59. "2560K(kernel-b)," \
  60. "38912K(rootfs-a)," \
  61. "38912K(rootfs-b)," \
  62. "46208K(user)," \
  63. "512K(logs)"
  64. #else
  65. #error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
  66. #endif
  67. #define CONFIG_EXTRA_ENV_SETTINGS \
  68. "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
  69. "autoload=no\0" \
  70. "autostart=no\0" \
  71. "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
  72. "\0"
  73. #define CONFIG_SYS_CBSIZE 256
  74. #define CONFIG_SYS_MAXARGS 16
  75. /*
  76. * Size of malloc() pool
  77. */
  78. #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
  79. /* SPL */
  80. #define CONFIG_SPL_MAX_SIZE 0x6000
  81. #define CONFIG_SPL_STACK 0x308000
  82. #define CONFIG_SPL_BSS_START_ADDR 0x20000000
  83. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  84. #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
  85. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
  86. #define CONFIG_SYS_MONITOR_LEN (512 << 10)
  87. #define CONFIG_SYS_MASTER_CLOCK 132096000
  88. #define CONFIG_SYS_AT91_PLLA 0x20c73f03
  89. #define CONFIG_SYS_MCKR 0x1301
  90. #define CONFIG_SYS_MCKR_CSS 0x1302
  91. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
  92. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  93. #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
  94. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  95. #define CONFIG_SYS_NAND_OOBSIZE 64
  96. #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
  97. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
  98. #endif /* __CONFIG_H__ */