ts4800.h 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2015, Savoir-faire Linux Inc.
  4. *
  5. * Derived from MX51EVK code by
  6. * Guennadi Liakhovetski <lg@denx.de>
  7. * Freescale Semiconductor, Inc.
  8. *
  9. * Configuration settings for the TS4800 Board
  10. */
  11. #ifndef __CONFIG_H
  12. #define __CONFIG_H
  13. /* High Level Configuration Options */
  14. #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage bootloader */
  15. #define CONFIG_HW_WATCHDOG
  16. #define CONFIG_MACH_TYPE MACH_TYPE_TS48XX
  17. /* text base address used when linking */
  18. #include <asm/arch/imx-regs.h>
  19. /* enable passing of ATAGs */
  20. #define CONFIG_CMDLINE_TAG
  21. #define CONFIG_SETUP_MEMORY_TAGS
  22. #define CONFIG_INITRD_TAG
  23. #define CONFIG_REVISION_TAG
  24. /*
  25. * Size of malloc() pool
  26. */
  27. #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
  28. /*
  29. * Hardware drivers
  30. */
  31. #define CONFIG_MXC_UART_BASE UART1_BASE
  32. /*
  33. * MMC Configs
  34. * */
  35. #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
  36. /*
  37. * Eth Configs
  38. */
  39. #define CONFIG_FEC_MXC
  40. #define IMX_FEC_BASE FEC_BASE_ADDR
  41. #define CONFIG_ETHPRIME "FEC"
  42. #define CONFIG_FEC_MXC_PHYADDR 0
  43. /***********************************************************
  44. * Command definition
  45. ***********************************************************/
  46. /* Environment variables */
  47. #define CONFIG_LOADADDR 0x91000000 /* loadaddr env var */
  48. #define CONFIG_EXTRA_ENV_SETTINGS \
  49. "script=boot.scr\0" \
  50. "image=zImage\0" \
  51. "fdt_file=imx51-ts4800.dtb\0" \
  52. "fdt_addr=0x90fe0000\0" \
  53. "mmcdev=0\0" \
  54. "mmcpart=2\0" \
  55. "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
  56. "mmcargs=setenv bootargs root=${mmcroot}\0" \
  57. "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
  58. "loadbootscript=" \
  59. "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  60. "bootscript=echo Running bootscript from mmc ...; " \
  61. "source\0" \
  62. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
  63. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  64. "mmcboot=echo Booting from mmc ...; " \
  65. "run mmcargs addtty; " \
  66. "if run loadfdt; then " \
  67. "bootz ${loadaddr} - ${fdt_addr}; " \
  68. "else " \
  69. "echo ERR: cannot load FDT; " \
  70. "fi; "
  71. #define CONFIG_BOOTCOMMAND \
  72. "mmc dev ${mmcdev}; if mmc rescan; then " \
  73. "if run loadbootscript; then " \
  74. "run bootscript; " \
  75. "else " \
  76. "if run loadimage; then " \
  77. "run mmcboot; " \
  78. "fi; " \
  79. "fi; " \
  80. "fi; "
  81. /*
  82. * Miscellaneous configurable options
  83. */
  84. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  85. /*-----------------------------------------------------------------------
  86. * Physical Memory Map
  87. */
  88. #define PHYS_SDRAM_1 CSD0_BASE_ADDR
  89. #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
  90. #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
  91. #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
  92. #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
  93. #define CONFIG_SYS_INIT_SP_OFFSET \
  94. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  95. #define CONFIG_SYS_INIT_SP_ADDR \
  96. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  97. /* Low level init */
  98. #define CONFIG_SYS_DDR_CLKSEL 0
  99. #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
  100. #define CONFIG_SYS_MAIN_PWR_ON
  101. /*-----------------------------------------------------------------------
  102. * Environment organization
  103. */
  104. #endif