r2dplus.h 1.5 KB

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  1. #ifndef __CONFIG_H
  2. #define __CONFIG_H
  3. #define CONFIG_CPU_SH7751 1
  4. #define __LITTLE_ENDIAN__ 1
  5. #define CONFIG_DISPLAY_BOARDINFO
  6. /* SCIF */
  7. #define CONFIG_CONS_SCIF1 1
  8. /* SDRAM */
  9. #define CONFIG_SYS_SDRAM_BASE 0x8C000000
  10. #define CONFIG_SYS_SDRAM_SIZE 0x04000000
  11. #define CONFIG_SYS_PBSIZE 256
  12. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
  13. /* Address of u-boot image in Flash */
  14. #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
  15. #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
  16. /* Size of DRAM reserved for malloc() use */
  17. #define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
  18. #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
  19. /*
  20. * NOR Flash ( Spantion S29GL256P )
  21. */
  22. #define CONFIG_SYS_FLASH_BASE (0xA0000000)
  23. #define CONFIG_SYS_MAX_FLASH_BANKS (1)
  24. #define CONFIG_SYS_MAX_FLASH_SECT 256
  25. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  26. /*
  27. * SuperH Clock setting
  28. */
  29. #define CONFIG_SYS_CLK_FREQ 60000000
  30. #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
  31. /*
  32. * IDE support
  33. */
  34. #define CONFIG_IDE_RESET 1
  35. #define CONFIG_SYS_PIO_MODE 1
  36. #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
  37. #define CONFIG_SYS_IDE_MAXDEVICE 1
  38. #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
  39. #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
  40. #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
  41. #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
  42. #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
  43. #define CONFIG_IDE_SWAP_IO
  44. /*
  45. * SuperH PCI Bridge Configration
  46. */
  47. #define CONFIG_SH7751_PCI
  48. #endif /* __CONFIG_H */