s6e8ax0.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2012 Samsung Electronics
  4. *
  5. * Author: Donghwa Lee <dh09.lee@samsung.com>
  6. */
  7. #include <common.h>
  8. #include <asm/arch/mipi_dsim.h>
  9. #include <linux/delay.h>
  10. #include "exynos/exynos_mipi_dsi_lowlevel.h"
  11. #include "exynos/exynos_mipi_dsi_common.h"
  12. static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
  13. {
  14. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  15. int reverse = dsim_dev->dsim_lcd_dev->reverse_panel;
  16. static const unsigned char data_to_send[] = {
  17. 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
  18. 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
  19. 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
  20. 0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
  21. 0xff, 0xff, 0xc8
  22. };
  23. static const unsigned char data_to_send_reverse[] = {
  24. 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
  25. 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
  26. 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
  27. 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
  28. 0xf6, 0xf6, 0xc1
  29. };
  30. if (reverse) {
  31. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  32. data_to_send_reverse,
  33. ARRAY_SIZE(data_to_send_reverse));
  34. } else {
  35. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  36. data_to_send, ARRAY_SIZE(data_to_send));
  37. }
  38. }
  39. static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
  40. {
  41. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  42. static const unsigned char data_to_send[] = {
  43. 0xf2, 0x80, 0x03, 0x0d
  44. };
  45. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  46. data_to_send, ARRAY_SIZE(data_to_send));
  47. }
  48. static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
  49. {
  50. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  51. /* 7500K 2.2 Set : 30cd */
  52. static const unsigned char data_to_send[] = {
  53. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad,
  54. 0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1,
  55. 0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
  56. };
  57. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  58. data_to_send, ARRAY_SIZE(data_to_send));
  59. }
  60. static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
  61. {
  62. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  63. static const unsigned char data_to_send[] = {
  64. 0xf7, 0x03
  65. };
  66. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
  67. ARRAY_SIZE(data_to_send));
  68. }
  69. static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
  70. {
  71. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  72. static const unsigned char data_to_send[] = {
  73. 0xf6, 0x00, 0x02, 0x00
  74. };
  75. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  76. data_to_send, ARRAY_SIZE(data_to_send));
  77. }
  78. static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
  79. {
  80. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  81. static const unsigned char data_to_send[] = {
  82. 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
  83. 0x00
  84. };
  85. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  86. data_to_send, ARRAY_SIZE(data_to_send));
  87. }
  88. static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)
  89. {
  90. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  91. static const unsigned char data_to_send[] = {
  92. 0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
  93. };
  94. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  95. data_to_send, ARRAY_SIZE(data_to_send));
  96. }
  97. static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)
  98. {
  99. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  100. static const unsigned char data_to_send[] = {
  101. 0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
  102. };
  103. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  104. data_to_send, ARRAY_SIZE(data_to_send));
  105. }
  106. static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)
  107. {
  108. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  109. static const unsigned char data_to_send[] = {
  110. 0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
  111. };
  112. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  113. data_to_send, ARRAY_SIZE(data_to_send));
  114. }
  115. static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)
  116. {
  117. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  118. static const unsigned char data_to_send[] = {
  119. 0xe3, 0x40
  120. };
  121. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
  122. ARRAY_SIZE(data_to_send));
  123. }
  124. static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)
  125. {
  126. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  127. static const unsigned char data_to_send[] = {
  128. 0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
  129. };
  130. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  131. data_to_send, ARRAY_SIZE(data_to_send));
  132. }
  133. static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)
  134. {
  135. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  136. static const unsigned char data_to_send[] = {
  137. 0xb1, 0x04, 0x00
  138. };
  139. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  140. data_to_send, ARRAY_SIZE(data_to_send));
  141. }
  142. static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)
  143. {
  144. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  145. static const unsigned char data_to_send[] = {
  146. 0x29, 0x00
  147. };
  148. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
  149. ARRAY_SIZE(data_to_send));
  150. }
  151. static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)
  152. {
  153. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  154. static const unsigned char data_to_send[] = {
  155. 0x11, 0x00
  156. };
  157. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
  158. ARRAY_SIZE(data_to_send));
  159. }
  160. static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)
  161. {
  162. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  163. static const unsigned char data_to_send[] = {
  164. 0xf0, 0x5a, 0x5a
  165. };
  166. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  167. data_to_send, ARRAY_SIZE(data_to_send));
  168. }
  169. static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)
  170. {
  171. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  172. static const unsigned char data_to_send[] = {
  173. 0xf1, 0x5a, 0x5a
  174. };
  175. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  176. data_to_send, ARRAY_SIZE(data_to_send));
  177. }
  178. static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)
  179. {
  180. /*
  181. * in case of setting gamma and panel condition at first,
  182. * it shuold be setting like below.
  183. * set_gamma() -> set_panel_condition()
  184. */
  185. s6e8ax0_apply_level1_key(dsim_dev);
  186. s6e8ax0_apply_mtp_key(dsim_dev);
  187. s6e8ax0_sleep_out(dsim_dev);
  188. mdelay(5);
  189. s6e8ax0_panel_cond(dsim_dev);
  190. s6e8ax0_display_cond(dsim_dev);
  191. s6e8ax0_gamma_cond(dsim_dev);
  192. s6e8ax0_gamma_update(dsim_dev);
  193. s6e8ax0_etc_source_control(dsim_dev);
  194. s6e8ax0_elvss_set(dsim_dev);
  195. s6e8ax0_etc_pentile_control(dsim_dev);
  196. s6e8ax0_etc_mipi_control1(dsim_dev);
  197. s6e8ax0_etc_mipi_control2(dsim_dev);
  198. s6e8ax0_etc_power_control(dsim_dev);
  199. s6e8ax0_etc_mipi_control3(dsim_dev);
  200. s6e8ax0_etc_mipi_control4(dsim_dev);
  201. }
  202. static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)
  203. {
  204. s6e8ax0_panel_init(dsim_dev);
  205. return 0;
  206. }
  207. static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)
  208. {
  209. s6e8ax0_display_on(dsim_dev);
  210. }
  211. static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
  212. .name = "s6e8ax0",
  213. .id = -1,
  214. .mipi_panel_init = s6e8ax0_panel_set,
  215. .mipi_display_on = s6e8ax0_display_enable,
  216. };
  217. void s6e8ax0_init(void)
  218. {
  219. exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);
  220. }