rk3399_vop.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
  4. * Copyright (c) 2015 Google, Inc
  5. * Copyright 2014 Rockchip Inc.
  6. */
  7. #include <common.h>
  8. #include <display.h>
  9. #include <dm.h>
  10. #include <log.h>
  11. #include <regmap.h>
  12. #include <video.h>
  13. #include <asm/arch-rockchip/hardware.h>
  14. #include <asm/io.h>
  15. #include "rk_vop.h"
  16. DECLARE_GLOBAL_DATA_PTR;
  17. static void rk3399_set_pin_polarity(struct udevice *dev,
  18. enum vop_modes mode, u32 polarity)
  19. {
  20. struct rk_vop_priv *priv = dev_get_priv(dev);
  21. struct rk3288_vop *regs = priv->regs;
  22. /*
  23. * The RK3399 VOPs (v3.5 and v3.6) require a per-mode setting of
  24. * the polarity configuration (in ctrl1).
  25. */
  26. switch (mode) {
  27. case VOP_MODE_HDMI:
  28. clrsetbits_le32(&regs->dsp_ctrl1,
  29. M_RK3399_DSP_HDMI_POL,
  30. V_RK3399_DSP_HDMI_POL(polarity));
  31. break;
  32. case VOP_MODE_EDP:
  33. clrsetbits_le32(&regs->dsp_ctrl1,
  34. M_RK3399_DSP_EDP_POL,
  35. V_RK3399_DSP_EDP_POL(polarity));
  36. break;
  37. case VOP_MODE_MIPI:
  38. clrsetbits_le32(&regs->dsp_ctrl1,
  39. M_RK3399_DSP_MIPI_POL,
  40. V_RK3399_DSP_MIPI_POL(polarity));
  41. break;
  42. default:
  43. debug("%s: unsupported output mode %x\n", __func__, mode);
  44. }
  45. }
  46. /*
  47. * Try some common regulators. We should really get these from the
  48. * device tree somehow.
  49. */
  50. static const char * const rk3399_regulator_names[] = {
  51. "vcc33_lcd"
  52. };
  53. static int rk3399_vop_probe(struct udevice *dev)
  54. {
  55. /* Before relocation we don't need to do anything */
  56. if (!(gd->flags & GD_FLG_RELOC))
  57. return 0;
  58. /* Probe regulators required for the RK3399 VOP */
  59. rk_vop_probe_regulators(dev, rk3399_regulator_names,
  60. ARRAY_SIZE(rk3399_regulator_names));
  61. return rk_vop_probe(dev);
  62. }
  63. struct rkvop_driverdata rk3399_lit_driverdata = {
  64. .set_pin_polarity = rk3399_set_pin_polarity,
  65. };
  66. struct rkvop_driverdata rk3399_big_driverdata = {
  67. .features = VOP_FEATURE_OUTPUT_10BIT,
  68. .set_pin_polarity = rk3399_set_pin_polarity,
  69. };
  70. static const struct udevice_id rk3399_vop_ids[] = {
  71. { .compatible = "rockchip,rk3399-vop-big",
  72. .data = (ulong)&rk3399_big_driverdata },
  73. { .compatible = "rockchip,rk3399-vop-lit",
  74. .data = (ulong)&rk3399_lit_driverdata },
  75. { }
  76. };
  77. static const struct video_ops rk3399_vop_ops = {
  78. };
  79. U_BOOT_DRIVER(rk3399_vop) = {
  80. .name = "rk3399_vop",
  81. .id = UCLASS_VIDEO,
  82. .of_match = rk3399_vop_ids,
  83. .ops = &rk3399_vop_ops,
  84. .bind = rk_vop_bind,
  85. .probe = rk3399_vop_probe,
  86. .priv_auto_alloc_size = sizeof(struct rk_vop_priv),
  87. };