am335x-fb.h 2.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2013-2018 Hannes Schmelzer <oe5hpm@oevsv.at> -
  4. * B&R Industrial Automation GmbH - http://www.br-automation.com
  5. */
  6. #ifndef AM335X_FB_H
  7. #define AM335X_FB_H
  8. #if !CONFIG_IS_ENABLED(DM_VIDEO)
  9. #define HSVS_CONTROL BIT(25) /*
  10. * 0 = lcd_lp and lcd_fp are driven on
  11. * opposite edges of pixel clock than
  12. * the lcd_pixel_o
  13. * 1 = lcd_lp and lcd_fp are driven
  14. * according to bit 24 Note that this
  15. * bit MUST be set to '0' for Passive
  16. * Matrix displays the edge timing is
  17. * fixed
  18. */
  19. #define HSVS_RISEFALL BIT(24) /*
  20. * 0 = lcd_lp and lcd_fp are driven on
  21. * the rising edge of pixel clock (bit
  22. * 25 must be set to 1)
  23. * 1 = lcd_lp and lcd_fp are driven on
  24. * the falling edge of pixel clock (bit
  25. * 25 must be set to 1)
  26. */
  27. #define DE_INVERT BIT(23) /*
  28. * 0 = DE is low-active
  29. * 1 = DE is high-active
  30. */
  31. #define PXCLK_INVERT BIT(22) /*
  32. * 0 = pix-clk is high-active
  33. * 1 = pic-clk is low-active
  34. */
  35. #define HSYNC_INVERT BIT(21) /*
  36. * 0 = HSYNC is active high
  37. * 1 = HSYNC is avtive low
  38. */
  39. #define VSYNC_INVERT BIT(20) /*
  40. * 0 = VSYNC is active high
  41. * 1 = VSYNC is active low
  42. */
  43. struct am335x_lcdpanel {
  44. unsigned int hactive; /* Horizontal active area */
  45. unsigned int vactive; /* Vertical active area */
  46. unsigned int bpp; /* bits per pixel */
  47. unsigned int hfp; /* Horizontal front porch */
  48. unsigned int hbp; /* Horizontal back porch */
  49. unsigned int hsw; /* Horizontal Sync Pulse Width */
  50. unsigned int vfp; /* Vertical front porch */
  51. unsigned int vbp; /* Vertical back porch */
  52. unsigned int vsw; /* Vertical Sync Pulse Width */
  53. unsigned int pxl_clk; /* Pixel clock */
  54. unsigned int pol; /* polarity of sync, clock signals */
  55. unsigned int pup_delay; /*
  56. * time in ms after power on to
  57. * initialization of lcd-controller
  58. * (VCC ramp up time)
  59. */
  60. unsigned int pon_delay; /*
  61. * time in ms after initialization of
  62. * lcd-controller (pic stabilization)
  63. */
  64. void (*panel_power_ctrl)(int); /* fp for power on/off display */
  65. };
  66. int am335xfb_init(struct am335x_lcdpanel *panel);
  67. #endif /* CONFIG_DM_VIDEO */
  68. #endif /* AM335X_FB_H */