ds1337.c 8.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2001-2008
  4. * Copyright 2020 NXP
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. * Keith Outwater, keith_outwater@mvis.com`
  7. */
  8. /*
  9. * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
  10. * DS1337 Real Time Clock (RTC).
  11. */
  12. #include <common.h>
  13. #include <command.h>
  14. #include <dm.h>
  15. #include <log.h>
  16. #include <rtc.h>
  17. #include <i2c.h>
  18. /*
  19. * RTC register addresses
  20. */
  21. #if defined CONFIG_RTC_DS1337
  22. #define RTC_SEC_REG_ADDR 0x0
  23. #define RTC_MIN_REG_ADDR 0x1
  24. #define RTC_HR_REG_ADDR 0x2
  25. #define RTC_DAY_REG_ADDR 0x3
  26. #define RTC_DATE_REG_ADDR 0x4
  27. #define RTC_MON_REG_ADDR 0x5
  28. #define RTC_YR_REG_ADDR 0x6
  29. #define RTC_CTL_REG_ADDR 0x0e
  30. #define RTC_STAT_REG_ADDR 0x0f
  31. #define RTC_TC_REG_ADDR 0x10
  32. #elif defined CONFIG_RTC_DS1388
  33. #define RTC_SEC_REG_ADDR 0x1
  34. #define RTC_MIN_REG_ADDR 0x2
  35. #define RTC_HR_REG_ADDR 0x3
  36. #define RTC_DAY_REG_ADDR 0x4
  37. #define RTC_DATE_REG_ADDR 0x5
  38. #define RTC_MON_REG_ADDR 0x6
  39. #define RTC_YR_REG_ADDR 0x7
  40. #define RTC_CTL_REG_ADDR 0x0c
  41. #define RTC_STAT_REG_ADDR 0x0b
  42. #define RTC_TC_REG_ADDR 0x0a
  43. #endif
  44. /*
  45. * RTC control register bits
  46. */
  47. #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
  48. #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
  49. #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
  50. #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
  51. #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
  52. #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
  53. /*
  54. * RTC status register bits
  55. */
  56. #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
  57. #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
  58. #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
  59. #if !CONFIG_IS_ENABLED(DM_RTC)
  60. static uchar rtc_read (uchar reg);
  61. static void rtc_write (uchar reg, uchar val);
  62. /*
  63. * Get the current time from the RTC
  64. */
  65. int rtc_get (struct rtc_time *tmp)
  66. {
  67. int rel = 0;
  68. uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
  69. control = rtc_read (RTC_CTL_REG_ADDR);
  70. status = rtc_read (RTC_STAT_REG_ADDR);
  71. sec = rtc_read (RTC_SEC_REG_ADDR);
  72. min = rtc_read (RTC_MIN_REG_ADDR);
  73. hour = rtc_read (RTC_HR_REG_ADDR);
  74. wday = rtc_read (RTC_DAY_REG_ADDR);
  75. mday = rtc_read (RTC_DATE_REG_ADDR);
  76. mon_cent = rtc_read (RTC_MON_REG_ADDR);
  77. year = rtc_read (RTC_YR_REG_ADDR);
  78. /* No century bit, assume year 2000 */
  79. #ifdef CONFIG_RTC_DS1388
  80. mon_cent |= 0x80;
  81. #endif
  82. debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
  83. "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
  84. year, mon_cent, mday, wday, hour, min, sec, control, status);
  85. if (status & RTC_STAT_BIT_OSF) {
  86. printf ("### Warning: RTC oscillator has stopped\n");
  87. /* clear the OSF flag */
  88. rtc_write (RTC_STAT_REG_ADDR,
  89. rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
  90. rel = -1;
  91. }
  92. tmp->tm_sec = bcd2bin (sec & 0x7F);
  93. tmp->tm_min = bcd2bin (min & 0x7F);
  94. tmp->tm_hour = bcd2bin (hour & 0x3F);
  95. tmp->tm_mday = bcd2bin (mday & 0x3F);
  96. tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
  97. tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
  98. tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
  99. tmp->tm_yday = 0;
  100. tmp->tm_isdst= 0;
  101. debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  102. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  103. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  104. return rel;
  105. }
  106. /*
  107. * Set the RTC
  108. */
  109. int rtc_set (struct rtc_time *tmp)
  110. {
  111. uchar century;
  112. debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  113. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  114. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  115. rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
  116. century = (tmp->tm_year >= 2000) ? 0x80 : 0;
  117. rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
  118. rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
  119. rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
  120. rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
  121. rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
  122. rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
  123. return 0;
  124. }
  125. /*
  126. * Reset the RTC. We also enable the oscillator output on the
  127. * SQW/INTB* pin and program it for 32,768 Hz output. Note that
  128. * according to the datasheet, turning on the square wave output
  129. * increases the current drain on the backup battery from about
  130. * 600 nA to 2uA. Define CONFIG_RTC_DS1337_NOOSC if you wish to turn
  131. * off the OSC output.
  132. */
  133. #ifdef CONFIG_RTC_DS1337_NOOSC
  134. #define RTC_DS1337_RESET_VAL \
  135. (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
  136. #else
  137. #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
  138. #endif
  139. void rtc_reset (void)
  140. {
  141. #ifdef CONFIG_RTC_DS1337
  142. rtc_write (RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL);
  143. #elif defined CONFIG_RTC_DS1388
  144. rtc_write(RTC_CTL_REG_ADDR, 0x0); /* hw default */
  145. #endif
  146. #ifdef CONFIG_RTC_DS1339_TCR_VAL
  147. rtc_write (RTC_TC_REG_ADDR, CONFIG_RTC_DS1339_TCR_VAL);
  148. #endif
  149. #ifdef CONFIG_RTC_DS1388_TCR_VAL
  150. rtc_write(RTC_TC_REG_ADDR, CONFIG_RTC_DS1388_TCR_VAL);
  151. #endif
  152. }
  153. /*
  154. * Helper functions
  155. */
  156. static
  157. uchar rtc_read (uchar reg)
  158. {
  159. return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
  160. }
  161. static void rtc_write (uchar reg, uchar val)
  162. {
  163. i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  164. }
  165. #else
  166. static uchar rtc_read(struct udevice *dev, uchar reg)
  167. {
  168. return dm_i2c_reg_read(dev, reg);
  169. }
  170. static void rtc_write(struct udevice *dev, uchar reg, uchar val)
  171. {
  172. dm_i2c_reg_write(dev, reg, val);
  173. }
  174. static int ds1337_rtc_get(struct udevice *dev, struct rtc_time *tmp)
  175. {
  176. int rel = 0;
  177. uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
  178. control = rtc_read(dev, RTC_CTL_REG_ADDR);
  179. status = rtc_read(dev, RTC_STAT_REG_ADDR);
  180. sec = rtc_read(dev, RTC_SEC_REG_ADDR);
  181. min = rtc_read(dev, RTC_MIN_REG_ADDR);
  182. hour = rtc_read(dev, RTC_HR_REG_ADDR);
  183. wday = rtc_read(dev, RTC_DAY_REG_ADDR);
  184. mday = rtc_read(dev, RTC_DATE_REG_ADDR);
  185. mon_cent = rtc_read(dev, RTC_MON_REG_ADDR);
  186. year = rtc_read(dev, RTC_YR_REG_ADDR);
  187. /* No century bit, assume year 2000 */
  188. #ifdef CONFIG_RTC_DS1388
  189. mon_cent |= 0x80;
  190. #endif
  191. debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x\n",
  192. year, mon_cent, mday, wday);
  193. debug("hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
  194. hour, min, sec, control, status);
  195. if (status & RTC_STAT_BIT_OSF) {
  196. printf("### Warning: RTC oscillator has stopped\n");
  197. /* clear the OSF flag */
  198. rtc_write(dev, RTC_STAT_REG_ADDR,
  199. rtc_read(dev, RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
  200. rel = -1;
  201. }
  202. tmp->tm_sec = bcd2bin(sec & 0x7F);
  203. tmp->tm_min = bcd2bin(min & 0x7F);
  204. tmp->tm_hour = bcd2bin(hour & 0x3F);
  205. tmp->tm_mday = bcd2bin(mday & 0x3F);
  206. tmp->tm_mon = bcd2bin(mon_cent & 0x1F);
  207. tmp->tm_year = bcd2bin(year) + ((mon_cent & 0x80) ? 2000 : 1900);
  208. tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
  209. tmp->tm_yday = 0;
  210. tmp->tm_isdst = 0;
  211. debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  212. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  213. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  214. return rel;
  215. }
  216. static int ds1337_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
  217. {
  218. uchar century;
  219. debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  220. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  221. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  222. rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
  223. century = (tmp->tm_year >= 2000) ? 0x80 : 0;
  224. rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon) | century);
  225. rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
  226. rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
  227. rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
  228. rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
  229. rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
  230. return 0;
  231. }
  232. #ifdef CONFIG_RTC_DS1337_NOOSC
  233. #define RTC_DS1337_RESET_VAL \
  234. (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
  235. #else
  236. #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
  237. #endif
  238. static int ds1337_rtc_reset(struct udevice *dev)
  239. {
  240. #ifdef CONFIG_RTC_DS1337
  241. rtc_write(dev, RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL);
  242. #elif defined CONFIG_RTC_DS1388
  243. rtc_write(dev, RTC_CTL_REG_ADDR, 0x0); /* hw default */
  244. #endif
  245. #ifdef CONFIG_RTC_DS1339_TCR_VAL
  246. rtc_write(dev, RTC_TC_REG_ADDR, CONFIG_RTC_DS1339_TCR_VAL);
  247. #endif
  248. #ifdef CONFIG_RTC_DS1388_TCR_VAL
  249. rtc_write(dev, RTC_TC_REG_ADDR, CONFIG_RTC_DS1388_TCR_VAL);
  250. #endif
  251. return 0;
  252. }
  253. static const struct rtc_ops ds1337_rtc_ops = {
  254. .get = ds1337_rtc_get,
  255. .set = ds1337_rtc_set,
  256. .reset = ds1337_rtc_reset,
  257. };
  258. static const struct udevice_id ds1337_rtc_ids[] = {
  259. { .compatible = "ds1337" },
  260. { .compatible = "ds1338" },
  261. { .compatible = "ds1338" },
  262. { }
  263. };
  264. U_BOOT_DRIVER(rtc_ds1337) = {
  265. .name = "rtc-ds1337",
  266. .id = UCLASS_RTC,
  267. .of_match = ds1337_rtc_ids,
  268. .ops = &ds1337_rtc_ops,
  269. };
  270. #endif