stm32-reset.c 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
  4. * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <errno.h>
  9. #include <log.h>
  10. #include <malloc.h>
  11. #include <reset-uclass.h>
  12. #include <stm32_rcc.h>
  13. #include <asm/io.h>
  14. #include <linux/bitops.h>
  15. /* reset clear offset for STM32MP RCC */
  16. #define RCC_CL 0x4
  17. struct stm32_reset_priv {
  18. fdt_addr_t base;
  19. };
  20. static int stm32_reset_request(struct reset_ctl *reset_ctl)
  21. {
  22. return 0;
  23. }
  24. static int stm32_reset_free(struct reset_ctl *reset_ctl)
  25. {
  26. return 0;
  27. }
  28. static int stm32_reset_assert(struct reset_ctl *reset_ctl)
  29. {
  30. struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
  31. int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
  32. int offset = reset_ctl->id % BITS_PER_LONG;
  33. debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
  34. reset_ctl->id, bank, offset);
  35. if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
  36. /* reset assert is done in rcc set register */
  37. writel(BIT(offset), priv->base + bank);
  38. else
  39. setbits_le32(priv->base + bank, BIT(offset));
  40. return 0;
  41. }
  42. static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
  43. {
  44. struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
  45. int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
  46. int offset = reset_ctl->id % BITS_PER_LONG;
  47. debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
  48. reset_ctl->id, bank, offset);
  49. if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
  50. /* reset deassert is done in rcc clr register */
  51. writel(BIT(offset), priv->base + bank + RCC_CL);
  52. else
  53. clrbits_le32(priv->base + bank, BIT(offset));
  54. return 0;
  55. }
  56. static const struct reset_ops stm32_reset_ops = {
  57. .request = stm32_reset_request,
  58. .rfree = stm32_reset_free,
  59. .rst_assert = stm32_reset_assert,
  60. .rst_deassert = stm32_reset_deassert,
  61. };
  62. static int stm32_reset_probe(struct udevice *dev)
  63. {
  64. struct stm32_reset_priv *priv = dev_get_priv(dev);
  65. priv->base = dev_read_addr(dev);
  66. if (priv->base == FDT_ADDR_T_NONE) {
  67. /* for MFD, get address of parent */
  68. priv->base = dev_read_addr(dev->parent);
  69. if (priv->base == FDT_ADDR_T_NONE)
  70. return -EINVAL;
  71. }
  72. return 0;
  73. }
  74. U_BOOT_DRIVER(stm32_rcc_reset) = {
  75. .name = "stm32_rcc_reset",
  76. .id = UCLASS_RESET,
  77. .probe = stm32_reset_probe,
  78. .priv_auto_alloc_size = sizeof(struct stm32_reset_priv),
  79. .ops = &stm32_reset_ops,
  80. };