mcfmii.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
  4. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  5. */
  6. #include <common.h>
  7. #include <config.h>
  8. #include <net.h>
  9. #include <netdev.h>
  10. #include <linux/delay.h>
  11. #ifdef CONFIG_MCF547x_8x
  12. #include <asm/fsl_mcdmafec.h>
  13. #else
  14. #include <asm/fec.h>
  15. #endif
  16. #include <asm/immap.h>
  17. #include <linux/mii.h>
  18. DECLARE_GLOBAL_DATA_PTR;
  19. #if defined(CONFIG_CMD_NET)
  20. #undef MII_DEBUG
  21. #undef ET_DEBUG
  22. /*extern int fecpin_setclear(struct eth_device *dev, int setclear);*/
  23. #if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
  24. #include <miiphy.h>
  25. /* Make MII read/write commands for the FEC. */
  26. #define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \
  27. (REG & 0x1f) << 18))
  28. #define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \
  29. (REG & 0x1f) << 18) | (VAL & 0xffff))
  30. #ifndef CONFIG_SYS_UNSPEC_PHYID
  31. # define CONFIG_SYS_UNSPEC_PHYID 0
  32. #endif
  33. #ifndef CONFIG_SYS_UNSPEC_STRID
  34. # define CONFIG_SYS_UNSPEC_STRID 0
  35. #endif
  36. typedef struct phy_info_struct {
  37. u32 phyid;
  38. char *strid;
  39. } phy_info_t;
  40. phy_info_t phyinfo[] = {
  41. {0x0022561B, "AMD79C784VC"}, /* AMD 79C784VC */
  42. {0x00406322, "BCM5222"}, /* Broadcom 5222 */
  43. {0x02a80150, "Intel82555"}, /* Intel 82555 */
  44. {0x0016f870, "LSI80225"}, /* LSI 80225 */
  45. {0x0016f880, "LSI80225/B"}, /* LSI 80225/B */
  46. {0x78100000, "LXT970"}, /* LXT970 */
  47. {0x001378e0, "LXT971"}, /* LXT971 and 972 */
  48. {0x00221619, "KS8721BL"}, /* Micrel KS8721BL/SL */
  49. {0x00221512, "KSZ8041NL"}, /* Micrel KSZ8041NL */
  50. {0x20005CE1, "N83640"}, /* National 83640 */
  51. {0x20005C90, "N83848"}, /* National 83848 */
  52. {0x20005CA2, "N83849"}, /* National 83849 */
  53. {0x01814400, "QS6612"}, /* QS6612 */
  54. #if defined(CONFIG_SYS_UNSPEC_PHYID) && defined(CONFIG_SYS_UNSPEC_STRID)
  55. {CONFIG_SYS_UNSPEC_PHYID, CONFIG_SYS_UNSPEC_STRID},
  56. #endif
  57. {0, 0}
  58. };
  59. /*
  60. * mii_init -- Initialize the MII for MII command without ethernet
  61. * This function is a subset of eth_init
  62. */
  63. void mii_reset(fec_info_t *info)
  64. {
  65. volatile FEC_T *fecp = (FEC_T *) (info->miibase);
  66. int i;
  67. fecp->ecr = FEC_ECR_RESET;
  68. for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
  69. udelay(1);
  70. }
  71. if (i == FEC_RESET_DELAY)
  72. printf("FEC_RESET_DELAY timeout\n");
  73. }
  74. /* send command to phy using mii, wait for result */
  75. uint mii_send(uint mii_cmd)
  76. {
  77. #ifdef CONFIG_DM_ETH
  78. struct udevice *dev;
  79. #else
  80. struct eth_device *dev;
  81. #endif
  82. fec_info_t *info;
  83. volatile FEC_T *ep;
  84. uint mii_reply;
  85. int j = 0;
  86. /* retrieve from register structure */
  87. dev = eth_get_dev();
  88. info = dev->priv;
  89. ep = (FEC_T *) info->miibase;
  90. ep->mmfr = mii_cmd; /* command to phy */
  91. /* wait for mii complete */
  92. while (!(ep->eir & FEC_EIR_MII) && (j < info->to_loop)) {
  93. udelay(1);
  94. j++;
  95. }
  96. if (j >= info->to_loop) {
  97. printf("MII not complete\n");
  98. return -1;
  99. }
  100. mii_reply = ep->mmfr; /* result from phy */
  101. ep->eir = FEC_EIR_MII; /* clear MII complete */
  102. #ifdef ET_DEBUG
  103. printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
  104. __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
  105. #endif
  106. return (mii_reply & 0xffff); /* data read from phy */
  107. }
  108. #endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */
  109. #if defined(CONFIG_SYS_DISCOVER_PHY)
  110. int mii_discover_phy(fec_info_t *info)
  111. {
  112. #define MAX_PHY_PASSES 11
  113. int phyaddr, pass;
  114. uint phyno, phytype;
  115. int i, found = 0;
  116. if (info->phyname_init)
  117. return info->phy_addr;
  118. phyaddr = -1; /* didn't find a PHY yet */
  119. for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
  120. if (pass > 1) {
  121. /* PHY may need more time to recover from reset.
  122. * The LXT970 needs 50ms typical, no maximum is
  123. * specified, so wait 10ms before try again.
  124. * With 11 passes this gives it 100ms to wake up.
  125. */
  126. udelay(10000); /* wait 10ms */
  127. }
  128. for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
  129. phytype = mii_send(mk_mii_read(phyno, MII_PHYSID1));
  130. #ifdef ET_DEBUG
  131. printf("PHY type 0x%x pass %d\n", phytype, pass);
  132. #endif
  133. if (phytype == 0xffff)
  134. continue;
  135. phyaddr = phyno;
  136. phytype <<= 16;
  137. phytype |=
  138. mii_send(mk_mii_read(phyno, MII_PHYSID2));
  139. #ifdef ET_DEBUG
  140. printf("PHY @ 0x%x pass %d\n", phyno, pass);
  141. #endif
  142. for (i = 0; (i < ARRAY_SIZE(phyinfo))
  143. && (phyinfo[i].phyid != 0); i++) {
  144. if (phyinfo[i].phyid == phytype) {
  145. #ifdef ET_DEBUG
  146. printf("phyid %x - %s\n",
  147. phyinfo[i].phyid,
  148. phyinfo[i].strid);
  149. #endif
  150. strcpy(info->phy_name, phyinfo[i].strid);
  151. info->phyname_init = 1;
  152. found = 1;
  153. break;
  154. }
  155. }
  156. if (!found) {
  157. #ifdef ET_DEBUG
  158. printf("0x%08x\n", phytype);
  159. #endif
  160. strcpy(info->phy_name, "unknown");
  161. info->phyname_init = 1;
  162. break;
  163. }
  164. }
  165. }
  166. if (phyaddr < 0)
  167. printf("No PHY device found.\n");
  168. return phyaddr;
  169. }
  170. #endif /* CONFIG_SYS_DISCOVER_PHY */
  171. void mii_init(void) __attribute__((weak,alias("__mii_init")));
  172. void __mii_init(void)
  173. {
  174. #ifdef CONFIG_DM_ETH
  175. struct udevice *dev;
  176. #else
  177. struct eth_device *dev;
  178. #endif
  179. fec_info_t *info;
  180. volatile FEC_T *fecp;
  181. int miispd = 0, i = 0;
  182. u16 status = 0;
  183. u16 linkgood = 0;
  184. /* retrieve from register structure */
  185. dev = eth_get_dev();
  186. info = dev->priv;
  187. fecp = (FEC_T *) info->miibase;
  188. fecpin_setclear(info, 1);
  189. mii_reset(info);
  190. /* We use strictly polling mode only */
  191. fecp->eimr = 0;
  192. /* Clear any pending interrupt */
  193. fecp->eir = 0xffffffff;
  194. /* Set MII speed */
  195. miispd = (gd->bus_clk / 1000000) / 5;
  196. fecp->mscr = miispd << 1;
  197. #ifdef CONFIG_SYS_DISCOVER_PHY
  198. info->phy_addr = mii_discover_phy(info);
  199. #endif
  200. if (info->phy_addr == -1)
  201. return;
  202. while (i < info->to_loop) {
  203. status = 0;
  204. i++;
  205. /* Read PHY control register */
  206. miiphy_read(dev->name, info->phy_addr, MII_BMCR, &status);
  207. /* If phy set to autonegotiate, wait for autonegotiation done,
  208. * if phy is not autonegotiating, just wait for link up.
  209. */
  210. if ((status & BMCR_ANENABLE) == BMCR_ANENABLE) {
  211. linkgood = (BMSR_ANEGCOMPLETE | BMSR_LSTATUS);
  212. } else {
  213. linkgood = BMSR_LSTATUS;
  214. }
  215. /* Read PHY status register */
  216. miiphy_read(dev->name, info->phy_addr, MII_BMSR, &status);
  217. if ((status & linkgood) == linkgood)
  218. break;
  219. udelay(1);
  220. }
  221. if (i >= info->to_loop)
  222. printf("Link UP timeout\n");
  223. /* adapt to the duplex and speed settings of the phy */
  224. info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
  225. info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
  226. }
  227. /*
  228. * Read and write a MII PHY register, routines used by MII Utilities
  229. *
  230. * FIXME: These routines are expected to return 0 on success, but mii_send
  231. * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
  232. * no PHY connected...
  233. * For now always return 0.
  234. * FIXME: These routines only work after calling eth_init() at least once!
  235. * Otherwise they hang in mii_send() !!! Sorry!
  236. */
  237. int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
  238. {
  239. short rdreg; /* register working value */
  240. #ifdef MII_DEBUG
  241. printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
  242. #endif
  243. rdreg = mii_send(mk_mii_read(addr, reg));
  244. #ifdef MII_DEBUG
  245. printf("0x%04x\n", rdreg);
  246. #endif
  247. return rdreg;
  248. }
  249. int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
  250. u16 value)
  251. {
  252. #ifdef MII_DEBUG
  253. printf("miiphy_write(0x%x) @ 0x%x = 0x%04x\n", reg, addr, value);
  254. #endif
  255. mii_send(mk_mii_write(addr, reg, value));
  256. return 0;
  257. }
  258. #endif /* CONFIG_CMD_NET */