rockchip_dw_mmc.c 5.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2013 Google, Inc
  4. */
  5. #include <common.h>
  6. #include <clk.h>
  7. #include <dm.h>
  8. #include <dt-structs.h>
  9. #include <dwmmc.h>
  10. #include <errno.h>
  11. #include <log.h>
  12. #include <mapmem.h>
  13. #include <pwrseq.h>
  14. #include <syscon.h>
  15. #include <asm/gpio.h>
  16. #include <asm/arch-rockchip/clock.h>
  17. #include <asm/arch-rockchip/periph.h>
  18. #include <linux/delay.h>
  19. #include <linux/err.h>
  20. struct rockchip_mmc_plat {
  21. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  22. struct dtd_rockchip_rk3288_dw_mshc dtplat;
  23. #endif
  24. struct mmc_config cfg;
  25. struct mmc mmc;
  26. };
  27. struct rockchip_dwmmc_priv {
  28. struct clk clk;
  29. struct dwmci_host host;
  30. int fifo_depth;
  31. bool fifo_mode;
  32. u32 minmax[2];
  33. };
  34. static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
  35. {
  36. struct udevice *dev = host->priv;
  37. struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  38. int ret;
  39. ret = clk_set_rate(&priv->clk, freq);
  40. if (ret < 0) {
  41. debug("%s: err=%d\n", __func__, ret);
  42. return ret;
  43. }
  44. return freq;
  45. }
  46. static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
  47. {
  48. #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  49. struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  50. struct dwmci_host *host = &priv->host;
  51. host->name = dev->name;
  52. host->ioaddr = dev_read_addr_ptr(dev);
  53. host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
  54. host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
  55. host->priv = dev;
  56. /* use non-removeable as sdcard and emmc as judgement */
  57. if (dev_read_bool(dev, "non-removable"))
  58. host->dev_index = 0;
  59. else
  60. host->dev_index = 1;
  61. priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0);
  62. if (priv->fifo_depth < 0)
  63. return -EINVAL;
  64. priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
  65. #ifdef CONFIG_SPL_BUILD
  66. if (!priv->fifo_mode)
  67. priv->fifo_mode = dev_read_bool(dev, "u-boot,spl-fifo-mode");
  68. #endif
  69. /*
  70. * 'clock-freq-min-max' is deprecated
  71. * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b)
  72. */
  73. if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) {
  74. int val = dev_read_u32_default(dev, "max-frequency", -EINVAL);
  75. if (val < 0)
  76. return val;
  77. priv->minmax[0] = 400000; /* 400 kHz */
  78. priv->minmax[1] = val;
  79. } else {
  80. debug("%s: 'clock-freq-min-max' property was deprecated.\n",
  81. __func__);
  82. }
  83. #endif
  84. return 0;
  85. }
  86. static int rockchip_dwmmc_probe(struct udevice *dev)
  87. {
  88. struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
  89. struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
  90. struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  91. struct dwmci_host *host = &priv->host;
  92. struct udevice *pwr_dev __maybe_unused;
  93. int ret;
  94. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  95. struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
  96. host->name = dev->name;
  97. host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
  98. host->buswidth = dtplat->bus_width;
  99. host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
  100. host->priv = dev;
  101. host->dev_index = 0;
  102. priv->fifo_depth = dtplat->fifo_depth;
  103. priv->fifo_mode = 0;
  104. priv->minmax[0] = 400000; /* 400 kHz */
  105. priv->minmax[1] = dtplat->max_frequency;
  106. ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
  107. if (ret < 0)
  108. return ret;
  109. #else
  110. ret = clk_get_by_index(dev, 0, &priv->clk);
  111. if (ret < 0)
  112. return ret;
  113. #endif
  114. host->fifoth_val = MSIZE(0x2) |
  115. RX_WMARK(priv->fifo_depth / 2 - 1) |
  116. TX_WMARK(priv->fifo_depth / 2);
  117. host->fifo_mode = priv->fifo_mode;
  118. #ifdef CONFIG_PWRSEQ
  119. /* Enable power if needed */
  120. ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
  121. &pwr_dev);
  122. if (!ret) {
  123. ret = pwrseq_set_power(pwr_dev, true);
  124. if (ret)
  125. return ret;
  126. }
  127. #endif
  128. dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
  129. host->mmc = &plat->mmc;
  130. host->mmc->priv = &priv->host;
  131. host->mmc->dev = dev;
  132. upriv->mmc = host->mmc;
  133. return dwmci_probe(dev);
  134. }
  135. static int rockchip_dwmmc_bind(struct udevice *dev)
  136. {
  137. struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
  138. return dwmci_bind(dev, &plat->mmc, &plat->cfg);
  139. }
  140. static const struct udevice_id rockchip_dwmmc_ids[] = {
  141. { .compatible = "rockchip,rk2928-dw-mshc" },
  142. { .compatible = "rockchip,rk3288-dw-mshc" },
  143. { }
  144. };
  145. U_BOOT_DRIVER(rockchip_rk3288_dw_mshc) = {
  146. .name = "rockchip_rk3288_dw_mshc",
  147. .id = UCLASS_MMC,
  148. .of_match = rockchip_dwmmc_ids,
  149. .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
  150. .ops = &dm_dwmci_ops,
  151. .bind = rockchip_dwmmc_bind,
  152. .probe = rockchip_dwmmc_probe,
  153. .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
  154. .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
  155. };
  156. U_BOOT_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3328_dw_mshc)
  157. U_BOOT_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3368_dw_mshc)
  158. #ifdef CONFIG_PWRSEQ
  159. static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
  160. {
  161. struct gpio_desc reset;
  162. int ret;
  163. ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
  164. if (ret)
  165. return ret;
  166. dm_gpio_set_value(&reset, 1);
  167. udelay(1);
  168. dm_gpio_set_value(&reset, 0);
  169. udelay(200);
  170. return 0;
  171. }
  172. static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
  173. .set_power = rockchip_dwmmc_pwrseq_set_power,
  174. };
  175. static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
  176. { .compatible = "mmc-pwrseq-emmc" },
  177. { }
  178. };
  179. U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
  180. .name = "mmc_pwrseq_emmc",
  181. .id = UCLASS_PWRSEQ,
  182. .of_match = rockchip_dwmmc_pwrseq_ids,
  183. .ops = &rockchip_dwmmc_pwrseq_ops,
  184. };
  185. #endif