s3c24x0_i2c.h 1.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2012 Samsung Electronics
  4. */
  5. #ifndef _S3C24X0_I2C_H
  6. #define _S3C24X0_I2C_H
  7. struct s3c24x0_i2c {
  8. u32 iiccon;
  9. u32 iicstat;
  10. u32 iicadd;
  11. u32 iicds;
  12. u32 iiclc;
  13. };
  14. struct exynos5_hsi2c {
  15. u32 usi_ctl;
  16. u32 usi_fifo_ctl;
  17. u32 usi_trailing_ctl;
  18. u32 usi_clk_ctl;
  19. u32 usi_clk_slot;
  20. u32 spi_ctl;
  21. u32 uart_ctl;
  22. u32 res1;
  23. u32 usi_int_en;
  24. u32 usi_int_stat;
  25. u32 usi_modem_stat;
  26. u32 usi_error_stat;
  27. u32 usi_fifo_stat;
  28. u32 usi_txdata;
  29. u32 usi_rxdata;
  30. u32 res2;
  31. u32 usi_conf;
  32. u32 usi_auto_conf;
  33. u32 usi_timeout;
  34. u32 usi_manual_cmd;
  35. u32 usi_trans_status;
  36. u32 usi_timing_hs1;
  37. u32 usi_timing_hs2;
  38. u32 usi_timing_hs3;
  39. u32 usi_timing_fs1;
  40. u32 usi_timing_fs2;
  41. u32 usi_timing_fs3;
  42. u32 usi_timing_sla;
  43. u32 i2c_addr;
  44. };
  45. struct s3c24x0_i2c_bus {
  46. bool active; /* port is active and available */
  47. int node; /* device tree node */
  48. int bus_num; /* i2c bus number */
  49. struct s3c24x0_i2c *regs;
  50. struct exynos5_hsi2c *hsregs;
  51. int is_highspeed; /* High speed type, rather than I2C */
  52. unsigned clock_frequency;
  53. int id;
  54. unsigned clk_cycle;
  55. unsigned clk_div;
  56. };
  57. #define I2C_WRITE 0
  58. #define I2C_READ 1
  59. #define I2C_OK 0
  60. #define I2C_NOK 1
  61. #define I2C_NACK 2
  62. #define I2C_NOK_LA 3 /* Lost arbitration */
  63. #define I2C_NOK_TOUT 4 /* time out */
  64. /* S3C I2C Controller bits */
  65. #define I2CSTAT_BSY 0x20 /* Busy bit */
  66. #define I2CSTAT_NACK 0x01 /* Nack bit */
  67. #define I2CCON_ACKGEN 0x80 /* Acknowledge generation */
  68. #define I2CCON_IRPND 0x10 /* Interrupt pending bit */
  69. #define I2C_MODE_MT 0xC0 /* Master Transmit Mode */
  70. #define I2C_MODE_MR 0x80 /* Master Receive Mode */
  71. #define I2C_START_STOP 0x20 /* START / STOP */
  72. #define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */
  73. #define I2C_TIMEOUT_MS 10 /* 10 ms */
  74. #endif /* _S3C24X0_I2C_H */