i2c-cortina.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2020
  4. * Arthur Li, Cortina Access, arthur.li@cortina-access.com.
  5. */
  6. #include <common.h>
  7. #include <i2c.h>
  8. #include <log.h>
  9. #include <asm/io.h>
  10. #include <dm.h>
  11. #include <mapmem.h>
  12. #include "i2c-cortina.h"
  13. static void set_speed(struct i2c_regs *regs, int i2c_spd)
  14. {
  15. union ca_biw_cfg i2c_cfg;
  16. i2c_cfg.wrd = readl(&regs->i2c_cfg);
  17. i2c_cfg.bf.core_en = 0;
  18. writel(i2c_cfg.wrd, &regs->i2c_cfg);
  19. switch (i2c_spd) {
  20. case IC_SPEED_MODE_FAST_PLUS:
  21. i2c_cfg.bf.prer = CORTINA_PER_IO_FREQ /
  22. (5 * I2C_SPEED_FAST_PLUS_RATE) - 1;
  23. break;
  24. case IC_SPEED_MODE_STANDARD:
  25. i2c_cfg.bf.prer = CORTINA_PER_IO_FREQ /
  26. (5 * I2C_SPEED_STANDARD_RATE) - 1;
  27. break;
  28. case IC_SPEED_MODE_FAST:
  29. default:
  30. i2c_cfg.bf.prer = CORTINA_PER_IO_FREQ /
  31. (5 * I2C_SPEED_FAST_RATE) - 1;
  32. break;
  33. }
  34. i2c_cfg.bf.core_en = 1;
  35. writel(i2c_cfg.wrd, &regs->i2c_cfg);
  36. }
  37. static int ca_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  38. {
  39. struct ca_i2c *priv = dev_get_priv(bus);
  40. int i2c_spd;
  41. if (speed >= I2C_SPEED_FAST_PLUS_RATE) {
  42. i2c_spd = IC_SPEED_MODE_FAST_PLUS;
  43. priv->speed = I2C_SPEED_FAST_PLUS_RATE;
  44. } else if (speed >= I2C_SPEED_FAST_RATE) {
  45. i2c_spd = IC_SPEED_MODE_FAST;
  46. priv->speed = I2C_SPEED_FAST_RATE;
  47. } else {
  48. i2c_spd = IC_SPEED_MODE_STANDARD;
  49. priv->speed = I2C_SPEED_STANDARD_RATE;
  50. }
  51. set_speed(priv->regs, i2c_spd);
  52. return 0;
  53. }
  54. static int ca_i2c_get_bus_speed(struct udevice *bus)
  55. {
  56. struct ca_i2c *priv = dev_get_priv(bus);
  57. return priv->speed;
  58. }
  59. static void ca_i2c_init(struct i2c_regs *regs)
  60. {
  61. union ca_biw_cfg i2c_cfg;
  62. i2c_cfg.wrd = readl(&regs->i2c_cfg);
  63. i2c_cfg.bf.core_en = 0;
  64. i2c_cfg.bf.biw_soft_reset = 1;
  65. writel(i2c_cfg.wrd, &regs->i2c_cfg);
  66. mdelay(10);
  67. i2c_cfg.bf.biw_soft_reset = 0;
  68. writel(i2c_cfg.wrd, &regs->i2c_cfg);
  69. set_speed(regs, IC_SPEED_MODE_STANDARD);
  70. i2c_cfg.wrd = readl(&regs->i2c_cfg);
  71. i2c_cfg.bf.core_en = 1;
  72. writel(i2c_cfg.wrd, &regs->i2c_cfg);
  73. }
  74. static int i2c_wait_complete(struct i2c_regs *regs)
  75. {
  76. union ca_biw_ctrl i2c_ctrl;
  77. unsigned long start_time_bb = get_timer(0);
  78. i2c_ctrl.wrd = readl(&regs->i2c_ctrl);
  79. while (i2c_ctrl.bf.biwdone == 0) {
  80. i2c_ctrl.wrd = readl(&regs->i2c_ctrl);
  81. if (get_timer(start_time_bb) >
  82. (unsigned long)(I2C_BYTE_TO_BB)) {
  83. printf("%s not done!!!\n", __func__);
  84. return -ETIMEDOUT;
  85. }
  86. }
  87. /* Clear done bit */
  88. writel(i2c_ctrl.wrd, &regs->i2c_ctrl);
  89. return 0;
  90. }
  91. static void i2c_setaddress(struct i2c_regs *regs, unsigned int i2c_addr,
  92. int write_read)
  93. {
  94. writel(i2c_addr | write_read, &regs->i2c_txr);
  95. writel(BIW_CTRL_START | BIW_CTRL_WRITE,
  96. &regs->i2c_ctrl);
  97. i2c_wait_complete(regs);
  98. }
  99. static int i2c_wait_for_bus_busy(struct i2c_regs *regs)
  100. {
  101. union ca_biw_ack i2c_ack;
  102. unsigned long start_time_bb = get_timer(0);
  103. i2c_ack.wrd = readl(&regs->i2c_ack);
  104. while (i2c_ack.bf.biw_busy) {
  105. i2c_ack.wrd = readl(&regs->i2c_ack);
  106. if (get_timer(start_time_bb) >
  107. (unsigned long)(I2C_BYTE_TO_BB)) {
  108. printf("%s: timeout!\n", __func__);
  109. return -ETIMEDOUT;
  110. }
  111. }
  112. return 0;
  113. }
  114. static int i2c_xfer_init(struct i2c_regs *regs, uint8_t chip, uint addr,
  115. int alen, int write_read)
  116. {
  117. int addr_len = alen;
  118. if (i2c_wait_for_bus_busy(regs))
  119. return 1;
  120. /* First cycle must write addr + offset */
  121. chip = ((chip & 0x7F) << 1);
  122. if (alen == 0 && write_read == I2C_CMD_RD)
  123. i2c_setaddress(regs, chip, I2C_CMD_RD);
  124. else
  125. i2c_setaddress(regs, chip, I2C_CMD_WT);
  126. while (alen) {
  127. alen--;
  128. writel(addr, &regs->i2c_txr);
  129. if (write_read == I2C_CMD_RD)
  130. writel(BIW_CTRL_WRITE | BIW_CTRL_STOP,
  131. &regs->i2c_ctrl);
  132. else
  133. writel(BIW_CTRL_WRITE, &regs->i2c_ctrl);
  134. i2c_wait_complete(regs);
  135. }
  136. /* Send address again with Read flag if it's read command */
  137. if (write_read == I2C_CMD_RD && addr_len > 0)
  138. i2c_setaddress(regs, chip, I2C_CMD_RD);
  139. return 0;
  140. }
  141. static int i2c_xfer_finish(struct i2c_regs *regs)
  142. {
  143. /* Dummy read makes bus free */
  144. writel(BIW_CTRL_READ | BIW_CTRL_STOP, &regs->i2c_ctrl);
  145. i2c_wait_complete(regs);
  146. if (i2c_wait_for_bus_busy(regs)) {
  147. printf("Timed out waiting for bus\n");
  148. return -ETIMEDOUT;
  149. }
  150. return 0;
  151. }
  152. static int ca_i2c_read(struct i2c_regs *regs, uint8_t chip, uint addr,
  153. int alen, uint8_t *buffer, int len)
  154. {
  155. unsigned long start_time_rx;
  156. int rc = 0;
  157. rc = i2c_xfer_init(regs, chip, addr, alen, I2C_CMD_RD);
  158. if (rc)
  159. return rc;
  160. start_time_rx = get_timer(0);
  161. while (len) {
  162. /* ACK_IN is ack value to send during read.
  163. * ack high only on the very last byte!
  164. */
  165. if (len == 1)
  166. writel(BIW_CTRL_READ | BIW_CTRL_ACK_IN | BIW_CTRL_STOP,
  167. &regs->i2c_ctrl);
  168. else
  169. writel(BIW_CTRL_READ, &regs->i2c_ctrl);
  170. rc = i2c_wait_complete(regs);
  171. udelay(1);
  172. if (rc == 0) {
  173. *buffer++ =
  174. (uchar) readl(&regs->i2c_rxr);
  175. len--;
  176. start_time_rx = get_timer(0);
  177. } else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
  178. return -ETIMEDOUT;
  179. }
  180. }
  181. i2c_xfer_finish(regs);
  182. return rc;
  183. }
  184. static int ca_i2c_write(struct i2c_regs *regs, uint8_t chip, uint addr,
  185. int alen, uint8_t *buffer, int len)
  186. {
  187. int rc, nb = len;
  188. unsigned long start_time_tx;
  189. rc = i2c_xfer_init(regs, chip, addr, alen, I2C_CMD_WT);
  190. if (rc)
  191. return rc;
  192. start_time_tx = get_timer(0);
  193. while (len) {
  194. writel(*buffer, &regs->i2c_txr);
  195. if (len == 1)
  196. writel(BIW_CTRL_WRITE | BIW_CTRL_STOP,
  197. &regs->i2c_ctrl);
  198. else
  199. writel(BIW_CTRL_WRITE, &regs->i2c_ctrl);
  200. rc = i2c_wait_complete(regs);
  201. if (rc == 0) {
  202. len--;
  203. buffer++;
  204. start_time_tx = get_timer(0);
  205. } else if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) {
  206. return -ETIMEDOUT;
  207. }
  208. }
  209. return 0;
  210. }
  211. static int ca_i2c_probe_chip(struct udevice *bus, uint chip_addr,
  212. uint chip_flags)
  213. {
  214. struct ca_i2c *priv = dev_get_priv(bus);
  215. int ret;
  216. u32 tmp;
  217. /* Try to read the first location of the chip */
  218. ret = ca_i2c_read(priv->regs, chip_addr, 0, 1, (uchar *)&tmp, 1);
  219. if (ret)
  220. ca_i2c_init(priv->regs);
  221. return ret;
  222. }
  223. static int ca_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
  224. {
  225. struct ca_i2c *priv = dev_get_priv(bus);
  226. int ret;
  227. debug("i2c_xfer: %d messages\n", nmsgs);
  228. for (; nmsgs > 0; nmsgs--, msg++) {
  229. debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
  230. if (msg->flags & I2C_M_RD)
  231. ret = ca_i2c_read(priv->regs, msg->addr, 0, 0,
  232. msg->buf, msg->len);
  233. else
  234. ret = ca_i2c_write(priv->regs, msg->addr, 0, 0,
  235. msg->buf, msg->len);
  236. if (ret) {
  237. printf("i2c_xfer: %s error\n",
  238. msg->flags & I2C_M_RD ? "read" : "write");
  239. return ret;
  240. }
  241. }
  242. return 0;
  243. }
  244. static const struct dm_i2c_ops ca_i2c_ops = {
  245. .xfer = ca_i2c_xfer,
  246. .probe_chip = ca_i2c_probe_chip,
  247. .set_bus_speed = ca_i2c_set_bus_speed,
  248. .get_bus_speed = ca_i2c_get_bus_speed,
  249. };
  250. static const struct udevice_id ca_i2c_ids[] = {
  251. { .compatible = "cortina,ca-i2c", },
  252. { }
  253. };
  254. static int ca_i2c_probe(struct udevice *bus)
  255. {
  256. struct ca_i2c *priv = dev_get_priv(bus);
  257. ca_i2c_init(priv->regs);
  258. return 0;
  259. }
  260. static int ca_i2c_ofdata_to_platdata(struct udevice *bus)
  261. {
  262. struct ca_i2c *priv = dev_get_priv(bus);
  263. priv->regs = map_sysmem(dev_read_addr(bus), sizeof(struct i2c_regs));
  264. if (!priv->regs) {
  265. printf("I2C: base address is invalid\n");
  266. return -EINVAL;
  267. }
  268. return 0;
  269. }
  270. U_BOOT_DRIVER(i2c_cortina) = {
  271. .name = "i2c_cortina",
  272. .id = UCLASS_I2C,
  273. .of_match = ca_i2c_ids,
  274. .ofdata_to_platdata = ca_i2c_ofdata_to_platdata,
  275. .probe = ca_i2c_probe,
  276. .priv_auto_alloc_size = sizeof(struct ca_i2c),
  277. .ops = &ca_i2c_ops,
  278. .flags = DM_FLAG_PRE_RELOC,
  279. };